IRFR4615PbF Tube/Bulk 75 IRFR4615PbF D-PAK IRFR4615TRLPbF Tape and Reel Left 3000 IRFR4615TRLPbF IRFU4615PbF I-PAK Tube/Bulk 75 IRFU4615PbF

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1 IRFR465PbF IRFU465PbF HEXFET Power MOSFET Applications l High Efficiency Synchronous Rectification in SMPS l Uninterruptible Power Supply l High Speed Power Switching l Hard Switched and High Frequency Circuits G D S V DSS 50V R DS(on) typ. 34m: max. 42m: 33A I D D D Benefits l Improved Gate, Avalanche and Dynamic dv/dt Ruggedness l Fully Characterized Capacitance and Avalanche SOA l Enhanced body diode dv/dt and di/dt Capability l Lead-Free G S DPak IRFR465PbF S D G IPAK IRFU465PbF G D S Gate Drain Source Standard Pack Orderable Part Number Base Part Number Package Type Form Quantity IRFR465PbF Tube/Bulk 75 IRFR465PbF D-PAK IRFR465TRLPbF Tape and Reel Left 3000 IRFR465TRLPbF IRFU465PbF I-PAK Tube/Bulk 75 IRFU465PbF Absolute Maximum Ratings Symbol Parameter Max. Units I T C = 25 C Continuous Drain Current, V V 33 I T C = 0 C Continuous Drain Current, V V 24 A I DM Pulsed Drain Current c 40 P C = 25 C Maximum Power Dissipation 44 W Linear Derating Factor 0.96 W/ C V GS Gate-to-Source Voltage ± 20 V dv/dt Peak Diode Recovery e 38 V/ns Operating Junction and -55 to 75 T J T STG Avalanche Characteristics Notes through ˆ are on page Storage Temperature Range Soldering Temperature, for seconds (.6mm from case) E AS (Thermally limited) Single Pulse Avalanche Energy d 9 mj I AR Avalanche Current c See Fig. 4, 5, 22a, 22b, A E AR Repetitive Avalanche Energy c mj Thermal Resistance Symbol Parameter Typ. Max. Units R θjc Junction-to-Case j.045 R θja Junction-to-Ambient (PCB Mount) i 50 R θja Junction-to-Ambient 300 C C/W International Rectifier May 6, 203

2 (unless otherwise specified) Symbol Parameter Min. Typ. Max. Units V (BR)DSS Drain-to-Source Breakdown Voltage 50 V ΔV (BR)DSS /ΔT J Breakdown Voltage Temp. Coefficient 9 V/ C R DS(on) Static Drain-to-Source On-Resistance mω V GS(th) Gate Threshold Voltage V I DSS Drain-to-Source Leakage Current I GSS Gate-to-Source Forward Leakage 0 Gate-to-Source Reverse Leakage -0 R G(int) Internal Gate Resistance 2.7 Ω (unless otherwise specified) Symbol Parameter Min. Typ. Max. Units Conditions gfs Forward Transconductance 35 S V DS = 50V, I D = 2A Q g Total Gate Charge 26 I D = 2A Q gs Gate-to-Source Charge 8.6 Q gd Gate-to-Drain ("Miller") Charge 9.0 Q sync Total Gate Charge Sync. (Q g - Q gd ) 7 t d(on) Turn-On Delay Time 5 t r Rise Time 35 t d(off) Turn-Off Delay Time 25 t f Fall Time 20 C iss Input Capacitance 750 C oss Output Capacitance 55 C rss Reverse Transfer Capacitance 40 C oss eff. (ER) Effective Output Capacitance (Energy Related)h 79 C oss eff. (TR) Effective Output Capacitance (Time Related)g 382 Diode Characteristics Symbol Parameter Min. Typ. Max. Units Conditions I S Continuous Source Current MOSFET symbol D 33 (Body Diode) showing the A G I SM Pulsed Source Current integral reverse 40 S (Body Diode)c p-n junction diode. V SD Diode Forward Voltage.3 V, I S = 2A, V GS = 0V f t rr Reverse Recovery Time 70 V R = 0V, ns 83 T J = 25 C I F = 2A Q rr Reverse Recovery Charge 77 di/dt = 0A/μs f nc 247 T J = 25 C I RRM Reverse Recovery Current 4.9 A t on Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LSLD) μa na nc ns pf Conditions V GS = 0V, I D = 250μA Reference to 25 C, I D = 5mAc V GS = V, I D = 2A f V DS = V GS, I D = 0μA V DS = 50V, V GS = 0V V DS = 50V, V GS = 0V, T J = 25 C V GS = 20V V GS = -20V V DS = 75V V GS = V f I D = 2A, V DS =0V, V GS = V V DD = 98V I D = 2A R G = 7.3Ω V GS = V f V GS = 0V V DS = 50V ƒ =.0MHz (See Fig.5) V GS = 0V, V DS = 0V to 20V h(see Fig.) V GS = 0V, V DS = 0V to 20V g International Rectifier May 6, 203

3 C, Capacitance (pf) V GS, Gate-to-Source Voltage (V) I D, Drain-to-Source Current (A) R DS(on), Drain-to-Source On Resistance (Normalized) I D, Drain-to-Source Current (A) I D, Drain-to-Source Current (A) IRFR/U465PbF 00 0 VGS TOP 5V 2V V 8.0V 7.0V 6.0V 5.5V BOTTOM 5.0V 00 0 VGS TOP 5V 2V V 8.0V 7.0V 6.0V 5.5V BOTTOM 5.0V 5.0V 5.0V 60μs PULSE WIDTH Tj = 25 C V DS, Drain-to-Source Voltage (V) 60μs PULSE WIDTH Tj = 75 C 0 V DS, Drain-to-Source Voltage (V) Fig. Typical Output Characteristics Fig 2. Typical Output Characteristics 00 0 T J = 75 C I D = 2A V GS = V V DS = 50V 60μs PULSE WIDTH V GS, Gate-to-Source Voltage (V) Fig 3. Typical Transfer Characteristics T J, Junction Temperature ( C) Fig 4. Normalized On-Resistance vs. Temperature V GS = 0V, f = MHZ C iss = C gs C gd, C ds SHORTED C rss = C gd C oss = C ds C gd I D = 2A V DS = 20V V DS = 75V VDS= 30V 00 C iss C oss C rss V DS, Drain-to-Source Voltage (V) Fig 5. Typical Capacitance vs. Drain-to-Source Voltage Q G, Total Gate Charge (nc) Fig 6. Typical Gate Charge vs. Gate-to-Source Voltage International Rectifier May 6, 203

4 Energy (μj) E AS, Single Pulse Avalanche Energy (mj) V (BR)DSS, I D, Drain Current (A) Drain-to-Source Breakdown Voltage (V) I SD, Reverse Drain Current (A) I D, Drain-to-Source Current (A) IRFR/U465PbF OPERATION IN THIS AREA LIMITED BY R DS (on) 0 0 msec 0μsec T J = 75 C msec V GS = 0V V SD, Source-to-Drain Voltage (V) Fig 7. Typical Source-Drain Diode Forward Voltage Tc = 25 C Tj = 75 C Single Pulse DC 0 00 V DS, Drain-to-Source Voltage (V) Fig 8. Maximum Safe Operating Area Id = 5mA T C, Case Temperature ( C) Fig 9. Maximum Drain Current vs. Case Temperature T J, Temperature ( C ) Fig. Drain-to-Source Breakdown Voltage I D TOP 2.8A 5.3A BOTTOM 2A V Starting T J, Junction Temperature ( C) DS, Drain-to-Source Voltage (V) Fig. Typical C OSS Stored Energy Fig 2. Maximum Avalanche Energy vs. DrainCurrent International Rectifier May 6, 203

5 E AR, Avalanche Energy (mj) Avalanche Current (A) IRFR/U465PbF D = 0.50 Thermal Response ( Z thjc ) C/W SINGLE PULSE ( THERMAL RESPONSE ) R R R 2 R 2 R 3 R 3 τ J τ J τ τ τ 2 τ 2 τ 3 τ 3 Ci= τi/ri Ci i Ri R 4 Ri ( C/W) τi (sec) R Notes:. Duty Factor D = t/t2 2. Peak Tj = P dm x Zthjc Tc 0.00 E-006 E t, Rectangular Pulse Duration (sec) Fig 3. Maximum Effective Transient Thermal Impedance, Junction-to-Case τ 4 τ 4 τ C τ Duty Cycle = Single Pulse Allowed avalanche Current vs avalanche pulsewidth, tav, assuming ΔTj = 50 C and Tstart =25 C (Single Pulse) Allowed avalanche Current vs avalanche pulsewidth, tav, assuming ΔΤ j = 25 C and Tstart = 50 C..0E-06.0E-05.0E-04.0E-03.0E-02.0E-0 tav (sec) Fig 4. Typical Avalanche Current vs.pulsewidth TOP Single Pulse BOTTOM.0% Duty Cycle I D = 2A Notes on Repetitive Avalanche Curves, Figures 4, 5: (For further info, see AN-05 at Avalanche failures assumption: Purely a thermal phenomenon and failure occurs at a temperature far in excess of T jmax. This is validated for every part type. 2. Safe operation in Avalanche is allowed as long ast jmax is not exceeded. 3. Equation below based on circuit and waveforms shown in Figures 6a, 6b. 4. P D (ave) = Average power dissipation per single avalanche pulse. 5. BV = Rated breakdown voltage (.3 factor accounts for voltage increase during avalanche). 6. I av = Allowable avalanche current. 7. ΔT = Allowable rise in junction temperature, not to exceed T jmax (assumed as 25 C in Figure 4, 5). t av = Average time in avalanche. D = Duty cycle in avalanche = t av f Z thjc (D, t av ) = Transient thermal resistance, see Figures 3) Starting T J, Junction Temperature ( C) Fig 5. Maximum Avalanche Energy vs. Temperature P D (ave) = /2 (.3 BV I av ) = DT/ Z thjc I av = 2DT/ [.3 BV Z th ] E AS (AR) = P D (ave) t av International Rectifier May 6, 203

6 Q RR (A) I RRM (A) Q RR (A) V GS(th), Gate threshold Voltage (V) I RRM (A) IRFR/U465PbF I F = 4A V R = 0V T J = 25 C I D = 0μA I D = 250uA ID =.0mA ID =.0A T J, Temperature ( C ) Fig 6. Threshold Voltage vs. Temperature di F /dt (A/μs) Fig. 7 - Typical Recovery Current vs. di f /dt 35 I F = 2A 800 I F = 4A 30 V R = 0V 700 V R = 0V 25 T J = 25 C 600 T J = 25 C di F /dt (A/μs) di F /dt (A/μs) Fig. 8 - Typical Recovery Current vs. di f /dt Fig. 9 - Typical Stored Charge vs. di f /dt I F = 2A V R = 0V T J = 25 C di F /dt (A/μs) Fig Typical Stored Charge vs. di f /dt International Rectifier May 6, 203

7 - D.U.T ƒ - Circuit Layout Considerations Low Stray Inductance Ground Plane Low Leakage Inductance Current Transformer - Reverse Recovery Current Driver Gate Drive Period P.W. D.U.T. I SD Waveform Body Diode Forward Current di/dt D.U.T. V DS Waveform Diode Recovery dv/dt D = P.W. Period V GS =V V DD * R G dv/dt controlled by RG Driver same type as D.U.T. I SD controlled by Duty Factor "D" D.U.T. - Device Under Test V DD - Re-Applied Voltage Body Diode Inductor Curent Current Forward Drop Ripple 5% I SD * V GS = 5V for Logic Level Devices Fig 2. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET Power MOSFETs 5V tp V (BR)DSS V DS L DRIVER R G 20V V GS tp D.U.T IAS 0.0Ω - V DD A I AS Fig 22a. Unclamped Inductive Test Circuit Fig 22b. Unclamped Inductive Waveforms V DS R D V DS V GS D.U.T. 90% R G - V DD VV GS Pulse Width µs Duty Factor % % V GS t d(on) t r t d(off) t f Fig 23a. Switching Time Test Circuit Fig 23b. Switching Time Waveforms Current Regulator Same Type as D.U.T. Vds Id 50KΩ Vgs 2V.2μF.3μF V GS D.U.T. V - DS Vgs(th) 3mA I G I D Current Sampling Resistors Qgs Qgs2 Qgd Qgodr Fig 24a. Gate Charge Test Circuit Fig 24b. Gate Charge Waveform International Rectifier May 6, 203

8 D-Pak (TO-252AA) Package Outline Dimensions are shown in millimeters (inches) D-Pak (TO-252AA) Part Marking Information EXAMPLE: THIS IS AN IRFR20 WITH ASSEMBLY LOT CODE 234 ASSEMBLED ON WW 6, 200 IN THE ASSEMBLY LINE "A" Note: "P" in assembly line position indicates "Lead-Free" "P" in assembly line position indicates "Lead-Free" qualification to the consumer-level INTERNATIONAL RECTIFIER LOGO AS S E MB LY LOT CODE IRFR20 6A 2 34 PART NUMBER DATE CODE YEAR = 200 WEEK 6 LINE A OR INTERNATIONAL RECT IFIER LOGO ASSEMBLY LOT CODE IRFR PART NUMBER DATE CODE P = DESIGNATES LEAD-FREE PRODUCT (OPTIONAL) P = DESIGNATES LEAD-FREE PRODUCT QUALIFIED TO THE CONSUMER LEVEL (OPTIONAL) YEAR = 200 WEEK 6 A = AS S E MBL Y S IT E CODE Note: For the most current drawing please refer to IR website at International Rectifier May 6, 203

9 I-Pak (TO-25AA) Package Outline Dimensions are shown in millimeters (inches) I-Pak (TO-25AA) Part Marking Information EXAMPLE: THIS IS AN IRFU20 WITH ASSEMBLY LOT CODE 5678 ASSEMBLED ON WW 9, 200 IN THE ASSEMBLY LINE "A" Note: "P" in assembly line position indicates Lead-Free" INTERNATIONAL RECTIFIER LOGO AS S EMB LY LOT CODE IRFU20 9A PART NUMBER DATE CODE YEAR = 200 WEEK 9 LINE A OR INTERNATIONAL RECTIFIER LOGO AS S EMBLY LOT CODE IRFU PART NUMBER DATE CODE P = DESIGNATES LEAD-FREE PRODUCT (OPTIONAL) YEAR = 200 WEEK 9 A = ASSEMBLY SITE CODE Note: For the most current drawing please refer to IR website at International Rectifier May 6, 203

10 D-Pak (TO-252AA) Tape & Reel Information Dimensions are shown in millimeters (inches) TR TRR TRL 6.3 (.64 ) 5.7 (.69 ) 6.3 (.64 ) 5.7 (.69 ) 2. (.476 ).9 (.469 ) FEED DIRECTION 8. (.38 ) 7.9 (.32 ) FEED DIRECTION NOTES :. CONTROLLING DIMENSION : MILLIMETER. 2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ). 3. OUTLINE CONFORMS TO EIA-48 & EIA INCH NOTES :. OUTLINE CONFORMS TO EIA mm Note: For the most current drawing please refer to IR website at International Rectifier May 6, 203

11 Qualification Information Qualification level Moisture Sensitivity Level RoHS Compliant Industrial (per JEDEC JESD47F guidelines) MSL D-PAK (per JEDEC J-STD-020D ) I-PAK Not applicable Yes Qualification standards can be found at International Rectifier s web site Applicable version of JEDEC standard at the time of product release. Notes: Repetitive rating; pulse width limited by max. junction temperature. Limited by T Jmax, starting, L = 0.5mH R G = 25Ω, I AS = 2A, V GS =V. Part not recommended for use above this value. ƒ I SD 2A, di/dt 549A/μs, V DD V (BR)DSS, T J 75 C. Pulse width 400μs; duty cycle 2%. C oss eff. (TR) is a fixed capacitance that gives the same charging time as C oss while V DS is rising from 0 to 80% V DSS. C oss eff. (ER) is a fixed capacitance that gives the same energy as C oss while V DS is rising from 0 to 80% V DSS. When mounted on " square PCB (FR-4 or G- Material). For recom mended footprint and soldering techniques refer to application note #AN-994 ˆ R θ is measured at T J approximately 90 C Revision History Date 5/6/203 Comments ÃUpdated datasheet to new IR corporate formatting template ÃUpdated Orderable part number from "IRFR465TRPbF" to "IRFR465TRLPbF", on page IR WORLD HEADQUARTERS: N. Sepulveda Blvd., El Segundo, California 90245, USA To contact International Rectifier, please visit International Rectifier May 6, 203