C Soldering Temperature, for 10 seconds 300 (1.6mm from case )
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1 Advanced Process Technoogy Utra Low On-Resistance Dynamic dv/dt Rating 75 C Operating Temperature Fast Switching Fuy Avaanche Rated Automotive Quaified (Q0) Description Seventh Generation HEXFET Power MOSFETs from Internationa Rectifier utiize advanced processing techniques to achieve extremey ow on-resistance per siicon area. This benefit, combined with the fast switching speed and ruggedized device design that HEXFET power MOSFETs are we known for, provides the designer with an extremey efficient and reiabe device for use in a wide variety of appications incuding automotive. G IRF404 HEXFET Power MOSFET D S PD-9896F V DSS = 40V R DS(on) = 0.004Ω I D = 202A The TO-220 package is universay preferred for a automotive-commercia-industria appications at power dissipation eves to approximatey 50 watts. The ow therma resistance and ow package cost of the TO-220 contribute to its wide acceptance throughout the industry. Absoute Maximum Ratings Therma Resistance TO-220AB Parameter Max. Units I T C = 25 C Continuous Drain Current, V 0V 202 I T C = C Continuous Drain Current, V 0V 43 A I DM Pused Drain Current 808 P C = 25 C Power Dissipation 333 W Linear Derating Factor 2.2 W/ C V GS Gate-to-Source Votage ± 20 V E AS Singe Puse Avaanche Energy 620 mj I AR Avaanche Current See Fig.2a, 2b, 5, 6 A E AR Repetitive Avaanche Energy mj dv/dt Peak Diode Recovery dv/dt ƒ.5 V/ns T J Operating Junction and -55 to 75 T STG Storage Temperature Range -55 to 75 C Sodering Temperature, for 0 seconds 300 (.6mm from case ) Mounting Torque, 6-32 or M3 screw 0 bf in (.N m) Parameter Typ. Max. Units R θjc Junction-to-Case 0.45 R θcs Case-to-Sink, Fat, Greased Surface 0.50 C/W R θja Junction-to-Ambient /0/03
2 IRF404 Eectrica T J = 25 C (uness otherwise specified) Parameter Min. Typ. Max. Units Conditions V (BR)DSS Drain-to-Source Breakdown Votage 40 V V GS = 0V, I D = 250µA V (BR)DSS/ T J Breakdown Votage Temp. Coefficient V/ C Reference to 25 C, I D = ma R DS(on) Static Drain-to-Source On-Resistance Ω V GS = 0V, I D = 2A V GS(th) Gate Threshod Votage V V DS = 0V, I D = 250µA g fs Forward Transconductance 76 S V DS = 25V, I D = 2A I DSS Drain-to-Source Leakage Current 20 V µa DS = 40V, V GS = 0V 250 V DS = 32V, V GS = 0V, T J = 50 C I GSS Gate-to-Source Forward Leakage 200 V GS = 20V na Gate-to-Source Reverse Leakage -200 V GS = -20V Q g Tota Gate Charge 3 96 I D = 2A Q gs Gate-to-Source Charge 36 nc V DS = 32V Q gd Gate-to-Drain ("Mier") Charge V GS = 0V t d(on) Turn-On Deay Time 7 V DD = 20V t r Rise Time 90 I D = 2A ns t d(off) Turn-Off Deay Time 46 R G = 2.5Ω t f Fa Time 33 R D = 0.2Ω Between ead, D L D Interna Drain Inductance 4.5 6mm (0.25in.) nh G from package L S Interna Source Inductance 7.5 and center of die contact S C iss Input Capacitance 5669 V GS = 0V C oss Output Capacitance 659 pf V DS = 25V C rss Reverse Transfer Capacitance 223 ƒ =.0MHz, See Fig. 5 C oss Output Capacitance 6205 V GS = 0V, V DS =.0V, ƒ =.0MHz C oss Output Capacitance 467 V GS = 0V, V DS = 32V, ƒ =.0MHz C oss eff. Effective Output Capacitance 2249 V GS = 0V, V DS = 0V to 32V Source-Drain Ratings and Characteristics Parameter Min. Typ. Max. Units Conditions D I S Continuous Source Current MOSFET symbo 202 (Body Diode) showing the A G I SM Pused Source Current integra reverse 808 (Body Diode) p-n junction diode. S V SD Diode Forward Votage.5 V T J = 25 C, I S = 2A, V GS = 0V t rr Reverse Recovery Time 78 7 ns T J = 25 C, I F = 2A Q rr Reverse RecoveryCharge nc di/dt = A/µs t on Forward Turn-On Time Intrinsic turn-on time is negigibe (turn-on is dominated by L S L D ) Notes: Repetitive rating; puse width imited by max. junction temperature. (See fig. ) Starting T J = 25 C, L = 85µH R G = 25Ω, I AS = 2A. (See Figure 2) ƒ I SD 2A, di/dt 30A/µs, V DD V (BR)DSS, T J 75 C Puse width 400µs; duty cyce 2%. C oss eff. is a fixed capacitance that gives the same charging time as C oss whie V DS is rising from 0 to 80% V DSS Cacuated continuous current based on maximum aowabe junction temperature. Package imitation current is 75A. 2
3 IRF404 I D, Drain-to-Source Current (A) 0 0 VGS TOP 5V 0V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM4.5V 4.5V I D, Drain-to-Source Current (A) 0 0 VGS TOP 5V 0V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM4.5V 4.5V 20µs PULSE WIDTH T J = 25 C 0. 0 V DS, Drain-to-Source Votage (V) 20µs PULSE WIDTH T J = 75 C 0. 0 V DS, Drain-to-Source Votage (V) Fig. Typica Output Characteristics Fig 2. Typica Output Characteristics I D, Drain-to-Source Current (A) 0 T J = 25 C T J = 75 C V DS= 25V 20µs PULSE WIDTH V GS, Gate-to-Source Votage (V) R DS(on), Drain-to-Source On Resistance (Normaized) 2.5 I D = 202A V GS= 0V T J, Junction Temperature ( C) Fig 3. Typica Transfer Characteristics Fig 4. Normaized On-Resistance Vs. Temperature 3
4 C, Capacitance(pF) IRF V GS = 0V, f = MHZ C iss = C gs C gd, C ds SHORTED C rss = C gd C oss = C ds C gd Ciss Coss Crss 0 V DS, Drain-to-Source Votage (V) V GS, Gate-to-Source Votage (V) I = D 2A V DS= 32V V DS= 20V FOR TEST CIRCUIT SEE FIGURE Q G, Tota Gate Charge (nc) Fig 5. Typica Capacitance Vs. Drain-to-Source Votage Fig 6. Typica Gate Charge Vs. Gate-to-Source Votage I SD, Reverse Drain Current (A) 0 0 T J = 75 C T J = 25 C V GS = 0 V V SD,Source-to-Drain Votage (V) 00 I D, Drain Current (A) 0 0 OPERATION IN THIS AREA LIMITED BY R DS(on) 0us us ms 0ms TC = 25 C TJ = 75 C Singe Puse 0 V DS, Drain-to-Source Votage (V) Fig 7. Typica Source-Drain Diode Forward Votage Fig 8. Maximum Safe Operating Area 4
5 IRF404 I D, Drain Current (A) LIMITED BY PACKAGE R G V GS 0V V DS Puse Width µs Duty Factor 0. % R D D.U.T. Fig 0a. Switching Time Test Circuit - V DD V DS 90% T C, Case Temperature ( C) Fig 9. Maximum Drain Current Vs. Case Temperature 0% V GS t d(on) t r t d(off) t f Fig 0b. Switching Time Waveforms Therma Response (Z thjc ) D = SINGLE PULSE (THERMAL RESPONSE) Notes:. Duty factor D = t / t 2 2. Peak T J = P DM x Z thjc TC t, Rectanguar Puse Duration (sec) PDM t t2 Fig. Maximum Effective Transient Therma Impedance, Junction-to-Case 5
6 -V GS(th) Gate threshod Votage (V) IRF404 5V V DS L DRIVER R G 20V D.U.T I AS - V DD A tp 0.0Ω Fig 2a. Uncamped Inductive Test Circuit V (BR)DSS tp I AS Fig 2b. Uncamped Inductive Waveforms Q G E AS, Singe Puse Avaanche Energy (mj) I D TOP 49A 0A BOTTOM 2A Starting T, Junction Temperature ( J C) Fig 2c. Maximum Avaanche Energy Vs. Drain Current 0 V Q GS Q GD 4.0 V G Current Reguator Same Type as D.U.T. Charge Fig 3a. Basic Gate Charge Waveform I D = -250µA 50KΩ 2V.2µF.3µF V GS 3mA D.U.T. V - DS T J, Temperature ( C ) I G I D Current Samping Resistors Fig 4. Threshod Votage Vs. Temperature Fig 3b. Gate Charge Test Circuit 6
7 Avaanche Current (A) E AR, Avaanche Energy (mj) IRF404 0 Duty Cyce = Singe Puse Aowed avaanche Current vs avaanche pusewidth, tav assuming Tj = 25 C due to avaanche osses E-08.0E-07.0E-06.0E-05.0E-04.0E-03.0E-02.0E-0 tav (sec) Fig 5. Typica Avaanche Current Vs.Pusewidth TOP Singe Puse BOTTOM 0% Duty Cyce I D = 2A Starting T J, Junction Temperature ( C) Notes on Repetitive Avaanche Curves, Figures 5, 6: (For further info, see AN-5 at Avaanche faiures assumption: Purey a therma phenomenon and faiure occurs at a temperature far in excess of T jmax. This is vaidated for every part type. 2. Safe operation in Avaanche is aowed as ong ast jmax is not exceeded. 3. Equation beow based on circuit and waveforms shown in Figures 2a, 2b. 4. P D (ave) = Average power dissipation per singe avaanche puse. 5. BV = Rated breakdown votage (.3 factor accounts for votage increase during avaanche). 6. I av = Aowabe avaanche current. 7. T = Aowabe rise in junction temperature, not to exceed T jmax (assumed as 25 C in Figure 5, 6). t av = Average time in avaanche. D = Duty cyce in avaanche = t av f Z thjc (D, t av ) = Transient therma resistance, see figure ) Fig 6. Maximum Avaanche Energy Vs. Temperature P D (ave) = /2 (.3 BV I av ) = DT/ Z thjc I av = 2DT/ [.3 BV Z th ] E AS (AR) = P D (ave) t av 7
8 IRF404 Peak Diode Recovery dv/dt Test Circuit D.U.T ƒ - Circuit Layout Considerations Low Stray Inductance Ground Pane Low Leakage Inductance Current Transformer - - R G dv/dt controed by R G Driver same type as D.U.T. I SD controed by Duty Factor "D" D.U.T. - Device Under Test - V DD Driver Gate Drive Period P.W. D = P.W. Period V GS =0V * D.U.T. I SD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. V DS Waveform Diode Recovery dv/dt V DD Re-Appied Votage Inductor Curent Body Diode Forward Drop Rippe 5% I SD * V GS = 5V for Logic Leve Devices Fig 7. For N-channe HEXFET Power MOSFETs 8
9 TO-220AB Package Outine Dimensions are shown in miimeters 2.87 (.3) 2.62 (.03) 5.24 (.600) 4.84 (.584) 4.09 (.555) 3.47 (.530) 0.54 (.45) 0.29 (.405) (.255) 6.0 (.240) 3.78 (.49) 3.54 (.39) - A -.5 (.045) MIN 4.06 (.60) 3.55 (.40) 4.69 (.85) 4.20 (.65) - B -.32 (.052).22 (.048) LEAD ASSIGNMENTS - GATE 2 - DRAIN 3 - SOURCE 4 - DRAIN IRF (.055) 3X.5 (.045) 2.54 (.) 2X 3X 0.93 (.037) 0.69 (.027) 0.36 (.04) M B A M 0.55 (.022) 3X 0.46 (.08) 2.92 (.5) 2.64 (.04) NOTES: DIMENSIONING & TOLERANCING PER ANSI Y4.5M, OUTLINE CONFORMS TO JEDEC OUTLINE TO-220AB. 2 CONTROLLING DIMENSION : INCH 4 HEATSINK & LEAD MEASUREMENTS DO NOT INCLUDE BURRS. TO-220AB Part Marking Information EXAMPLE: THIS IS AN IRF00 LOT CODE 789 ASS EMBLED ON WW 9, 997 IN THE ASSEMBLY LINE "C" Note: "P" in assemby ine position indicates "Lead-Free" INTERNATIONAL RECTIFIER LOGO AS S E MBLY LOT CODE PART NUMBER DATE CODE YEAR 7 = 997 WEEK 9 LINE C For GB Production EXAMPLE: THIS IS AN IRF00 LOT CODE 789 AS SEMBLED ON WW 9, 997 IN THE ASSEMBLY LINE "C" INTERNATIONAL RECTIFIER LOGO LOT CODE PART NUMBER DATE CODE TO-220AB package is not recommended for Surface Mount Appication. Data and specifications subject to change without notice. This product has been designed and quaified for the automotive [Q0] market. Quaification Standards can be found on IR s Web site. IR WORLD HEADQUARTERS: 233 Kansas St., E Segundo, Caifornia 90245, USA Te: (30) TAC Fax: (30) Visit us at for saes contact information.0/0 9
10 Note: For the most current drawings pease refer to the IR website at:
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l dvanced Process Technology l Surface Mount (IRF5305S) l Lowprofile throughhole (IRF5305L) l 175 C Operating Temperature l Fast Switching l PChannel l Fully valanche Rated Description Fifth Generation
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