SMPS MOSFET. V DSS Rds(on) max I D

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1 Applications l Switch Mode Power Supply ( SMPS ) l Uninterruptable Power Supply l High speed power switching SMPS MOSFET PD IRF740A HEXFET Power MOSFET V DSS Rds(on) max I D 400V 0.55Ω A Benefits l Low Gate Charge Qg results in Simple Drive Requirement l Improved Gate, Avalanche and dynamic dv/dt Ruggedness l Fully Characterized Capacitance and Avalanche Voltage and Current l Effective Coss specified ( See AN 0) TO220AB G D S Absolute Maximum Ratings Parameter Max. Units I T C = 25 C Continuous Drain Current, V V I T C = 0 C Continuous Drain Current, V V 6.3 A I DM Pulsed Drain Current 40 P C = 25 C Power Dissipation 25 W Linear Derating Factor.0 W/ C V GS GatetoSource Voltage ± 30 V dv/dt Peak Diode Recovery dv/dt ƒ 5.9 V/ns T J Operating Junction and 55 to 50 T STG Storage Temperature Range C Soldering Temperature, for seconds 300 (.6mm from case ) Mounting torqe, 632 or M3 screw lbf in (.N m) Typical SMPS Topologies: l l Single transistor Flyback Xfmr. Reset Single Transistor Forward Xfmr. Reset ( Both for US Line Input only ) Notes through are on page 8 9/4/99

2 T J = 25 C (unless otherwise specified) Parameter Min. Typ. Max. Units Conditions V (BR)DSS DraintoSource Breakdown Voltage 400 V V GS = 0V, I D = 250µA V (BR)DSS / T J Breakdown Voltage Temp. Coefficient 0.48 V/ C Reference to 25 C, I D = ma R DS(on) Static DraintoSource OnResistance 0.55 Ω V GS = V, I D = 6.0A V GS(th) Gate Threshold Voltage V V DS = V GS, I D = 250µA I DSS DraintoSource Leakage Current 25 V µa DS = 400V, V GS = 0V 250 V DS = 320V, V GS = 0V, T J = 25 C I GSS GatetoSource Forward Leakage 0 V GS = 30V na GatetoSource Reverse Leakage 0 V GS = 30V T J = 25 C (unless otherwise specified) Parameter Min. Typ. Max. Units Conditions g fs Forward Transconductance 4.9 S V DS = 50V, I D = 6.0A Q g Total Gate Charge 36 I D = A Q gs GatetoSource Charge 9.9 nc V DS = 320V Q gd GatetoDrain ("Miller") Charge 6 V GS = V, See Fig. 6 and 3 t d(on) TurnOn Delay Time V DD = 200V t r Rise Time 35 ns I D = A t d(off) TurnOff Delay Time 24 R G = Ω t f Fall Time 22 R D = 9.5Ω,See Fig. C iss Input Capacitance 30 V GS = 0V C oss Output Capacitance 70 V DS = 25V C rss Reverse Transfer Capacitance 7.7 pf ƒ =.0MHz, See Fig. 5 C oss Output Capacitance 490 V GS = 0V, V DS =.0V, ƒ =.0MHz C oss Output Capacitance 52 V GS = 0V, V DS = 320V, ƒ =.0MHz C oss eff. Effective Output Capacitance 6 V GS = 0V, V DS = 0V to 320V Avalanche Characteristics Parameter Typ. Max. Units E AS Single Pulse Avalanche Energy 630 mj I AR Avalanche Current A E AR Repetitive Avalanche Energy 2.5 mj Thermal Resistance Parameter Typ. Max. Units R θjc JunctiontoCase.0 R θcs CasetoSink, Flat, Greased Surface 0.50 C/W R θja JunctiontoAmbient 62 Diode Characteristics Parameter Min. Typ. Max. Units Conditions D I S Continuous Source Current MOSFET symbol (Body Diode) showing the A G I SM Pulsed Source Current integral reverse 40 (Body Diode) pn junction diode. S V SD Diode Forward Voltage 2.0 V T J = 25 C, I S = A, V GS = 0V t rr Reverse Recovery Time ns T J = 25 C, I F = A Q rr Reverse RecoveryCharge µc di/dt = 0A/µs t on Forward TurnOn Time Intrinsic turnon time is negligible (turnon is dominated by L S L D ) 2

3 I D, DraintoSource Current (A) 0 0. VGS TOP 5V V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V 4.5V I D, DraintoSource Current (A) 0 VGS TOP 5V V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V 4.5V 20µs PULSE WIDTH T J = 25 C V DS, DraintoSource Voltage (V) 20µs PULSE WIDTH T J = 50 C V DS, DraintoSource Voltage (V) Fig. Typical Output Characteristics Fig 2. Typical Output Characteristics I D, DraintoSource Current (A) 0 T J = 50 C T J = 25 C V DS = 50V 20µs PULSE WIDTH V GS, GatetoSource Voltage (V) R DS(on), DraintoSource On Resistance (Normalized) 3.0 I D = A V GS = V T J, Junction Temperature ( C) Fig 3. Typical Transfer Characteristics Fig 4. Normalized OnResistance Vs. Temperature 3

4 C, Capacitance(pF) IRF740A V GS = 0V, f = MHZ C iss = C gs C gd, C ds SHORTED C rss = C gd C oss = C ds C gd Ciss Coss Crss 0 00 V DS, DraintoSource Voltage (V) V GS, GatetoSource Voltage (V) I = D A V DS = 320V V DS = 200V V DS = 80V FOR TEST CIRCUIT SEE FIGURE Q G, Total Gate Charge (nc) Fig 5. Typical Capacitance Vs. DraintoSource Voltage Fig 6. Typical Gate Charge Vs. GatetoSource Voltage I SD, Reverse Drain Current (A) 0 T J = 50 C T J = 25 C V GS = 0 V V SD,SourcetoDrain Voltage (V) I D, Drain Current (A) 0 OPERATION IN THIS AREA LIMITED BY R DS(on) us 0us ms TC = 25 C TJ = 50 C Single Pulse ms 0 00 V DS, DraintoSource Voltage (V) Fig 7. Typical SourceDrain Diode Forward Voltage Fig 8. Maximum Safe Operating Area 4

5 .0 V DS R D I D, Drain Current (A) Fig a. Switching Time Test Circuit V DS 90% R G V GS V Pulse Width µs Duty Factor 0. % D.U.T. V DD T C, Case Temperature ( C) Fig 9. Maximum Drain Current Vs. Case Temperature % V GS t d(on) t r t d(off) t f Fig b. Switching Time Waveforms Thermal Response (Z thjc ) D = SINGLE PULSE (THERMAL RESPONSE) Notes:. Duty factor D = t / t 2 2. Peak T J = P DM x Z thjc TC t, Rectangular Pulse Duration (sec) PDM t t2 Fig. Maximum Effective Transient Thermal Impedance, JunctiontoCase 5

6 V DSav, Avalanche Voltage ( V ) IRF740A R G V DS 20V tp Fig 2a. Unclamped Inductive Test Circuit tp L D.U.T I AS 0.0Ω V (BR)DSS 5V DRIVER V DD A E AS, Single Pulse Avalanche Energy (mj) TOP BOTTOM I D 4.5A 6.3A A Starting T, Junction Temperature ( J C) I AS Fig 2b. Unclamped Inductive Waveforms Q G Fig 2c. Maximum Avalanche Energy Vs. Drain Current V Q GS Q GD 580 V G 560 Current Regulator Same Type as D.U.T. Charge Fig 3a. Basic Gate Charge Waveform KΩ 500 2V.2µF.3µF D.U.T. V DS V GS I AV, Avalanche Current ( A) 3mA I G I D Current Sampling Resistors Fig 2d. Typical DraintoSource Voltage Fig 3b. Gate Charge Test Circuit Vs. Avalanche Current 6

7 Peak Diode Recovery dv/dt Test Circuit D.U.T ƒ Circuit Layout Considerations Low Stray Inductance Ground Plane Low Leakage Inductance Current Transformer R G dv/dt controlled by R G Driver same type as D.U.T. I SD controlled by Duty Factor "D" D.U.T. Device Under Test V DD Driver Gate Drive Period P.W. D = P.W. Period V GS =V * D.U.T. I SD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. V DS Waveform Diode Recovery dv/dt V DD ReApplied Voltage Inductor Curent Body Diode Forward Drop Ripple 5% I SD * V GS = 5V for Logic Level Devices Fig 4. For NChannel HEXFETS 7

8 Package Outline TO220AB Outline Dimensions are shown in millimeters (inches) 2.87 (.3) 2.62 (.3) 5.24 (.600) 4.84 (.584) 4.09 (.555) 3.47 (.530).54 (.45).29 (.405) (.255) 6. (.240) 3.78 (.49) 3.54 (.39) A.5 (.045) MIN 4.06 (.60) 3.55 (.40) 4.69 (.85) 4.20 (.65) B.32 (.052).22 (.048) LEAD ASSIGNMENTS GATE 2 DRAIN 3 SOURCE 4 DRAIN.40 (.055) 3X.5 (.045) 2.54 (.0) 2X 3X 0.93 (.037) 0.69 (.027) 0.36 (.04) M B A M 0.55 (.022) 3X 0.46 (.08) 2.92 (.5) 2.64 (.4) NOTES: DIMENSIONING & TOLERANCING PER ANSI Y4.5M, OUTLINE CONFORMS TO JEDEC OUTLINE TO220AB. 2 CONTROLLING DIMENSION : INCH 4 HEATSINK & LEAD MEASUREMENTS DO NOT INCLUDE BURRS. Part Marking Information TO220AB EXAMPLE : THIS IS AN IRF W ITH ASSEMBLY LOT CODE 9BM Notes: Repetitive rating; pulse width limited by max. junction temperature. ( See fig. ) Starting T J = 25 C, L = 2.6mH R G = 25Ω, I AS = A. (See Figure 2) ƒ I SD A, di/dt 330A/µs, V DD V (BR)DSS, T J 50 C INTERNATIONAL RECTIFIER LO GO ASSEMBLY LOT CODE IRF B M Pulse width 300µs; duty cycle 2%. A PART NUMBER DATE CODE (YYWW) YY = YEAR WW = WEEK C oss eff. is a fixed capacitance that gives the same charging time as C oss while V DS is rising from 0 to 80% V DSS WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: (3) IR GREAT BRITAIN: Hurst Green, Oxted, Surrey RH8 9BB, UK Tel: IR CANADA: 5 Lincoln Court, Brampton, Ontario L6T3Z2, Tel: (905) IR GERMANY: Saalburgstrasse 57, 6350 Bad Homburg Tel: IR ITALY: Via Liguria 49, 07 Borgaro, Torino Tel: IR FAR EAST: K&H Bldg., 2F, 304 NishiIkebukuro 3Chome, ToshimaKu, Tokyo Japan 7 Tel: IR SOUTHEAST ASIA: Kim Seng Promenade, Great World City West Tower, 3, Singapore Tel: IR TAIWAN:6 Fl. Suite D. 207, Sec. 2, Tun Haw South Road, Taipei, 673, Taiwan Tel: Data and specifications subject to change without notice. 9/99 8

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