IRFP450. N - CHANNEL 500V Ω - 14A - TO-247 PowerMESH MOSFET

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1 IRFP450 N - CHANNEL 500V Ω - 14A - TO-247 PowerMESH MOSFET TYPE V DSS R DS(on) I D IRFP V < 0.4 Ω 14 A TYPICAL R DS(on) = 0.33 Ω EXTREMELY HIGH dv/dt CAPABILITY 100% AVALANCHE TESTED VERY LOW INTRINSIC CAPACITANCES GATE CHARGE MINIMIZED DESCRIPTION This power MOSFET is designed using the company s coolidated strip layout-based MESH OVERLAY process. This technology matches and improves the performances compared with standard parts from various sources. TO APPLICATIONS HIGH CURRENT SWITCHING UNINTERRUPTIBLE POWER SUPPLY (UPS) DC/DC COVERTERS FOR TELECOM, INDUSTRIAL, AND LIGHTING EQUIPMENT. INTERNAL SCHEMATIC DIAGRAM ABSOLUTE MAXIMUM RATINGS Symbol Parameter Value Unit VDS Drain-source Voltage (VGS =0) 500 V V DGR Drain- gate Voltage (RGS =20kΩ) 500 V V GS Gate-source Voltage ± 20 V ID Drain Current (continuous) at Tc =25 o C 14 A ID Drain Current (continuous) at Tc =100 o C 8.7 A I DM ( ) Drain Current (pulsed) 56 A P tot Total Dissipation at T c =25 o C 190 W Derating Factor 1.5 W/ o C dv/dt(1) Peak Diode Recovery voltage slope 3.5 V/ T stg Storage Temperature -65 to 150 o C T j Max. Operating Junction Temperature 150 o C ( ) Pulse width limited by safe operating area (1) I SD 14 A, di/dt 130 A/µs, V DD V (BR)DSS, Tj T JMAX August /8

2 THERMAL DATA R thj-case Rthj-amb R thc-sink Tl Thermal Resistance Junction-case Max Thermal Resistance Junction-ambient Max Thermal Resistance Case-sink Typ Maximum Lead Temperature For Soldering Purpose o C/W oc/w o C/W o C AVALANCHE CHARACTERISTICS Symbol Parameter Max Value Unit IAR Avalanche Current, Repetitive or Not-Repetitive 14 A (pulse width limited by T j max) EAS Single Pulse Avalanche Energy (starting T j =25 o C, I D =I AR,V DD =50V) 800 mj ELECTRICAL CHARACTERISTICS (T case =25 o C unless otherwise specified) OFF V(BR)DSS Drain-source Breakdown Voltage ID =250µA VGS =0 500 V IDSS I GSS Zero Gate Voltage Drain Current (V GS =0) Gate-body Leakage Current (VDS =0) VDS =MaxRating V DS =MaxRating T c =125 o C VGS = ± 20 V ± 100 na 1 50 µa µa ON ( ) VGS(th) Gate Threshold V DS =V GS I D =250µA V Voltage R DS(on) Static Drain-source On V GS =10V I D = 8.4 A Ω Resistance I D(on) On State Drain Current V DS >I D(on) xr DS(on)max VGS =10V 14 A DYNAMIC gfs ( ) Ciss C oss Crss Forward Traconductance Input Capacitance Output Capacitance Reverse Trafer Capacitance VDS >ID(on) xrds(on)max ID =8.4A S VDS =25V f=1mhz VGS = pf pf pf 2/8

3 ELECTRICAL CHARACTERISTICS (continued) SWITCHING ON td(on) t r Qg Q gs Qgd Turn-on Time Rise Time Total Gate Charge Gate-Source Charge Gate-Drain Charge VDD =250V ID=7A RG=4.7 Ω VGS =10V (see test circuit, figure 1) VDD =400V ID=14A VGS =10V nc nc nc SWITCHING OFF t r(voff) tf t c Off-voltage Rise Time Fall Time Cross-over Time V DD =400V I D =14A R G =4.7 Ω V GS =10V (see test circuit, figure 3) SOURCE DRAIN DIODE I SD I SDM ( ) Source-drain Current Source-drain Current (pulsed) VSD ( ) Forward On Voltage ISD =14A VGS =0 1.4 V trr Reverse Recovery I SD = 14 A di/dt = 100 A/µs 680 Time VDD =100V Tj=150 o C Qrr IRRM Reverse Recovery Charge Reverse Recovery (see test circuit, figure 3) 9 26 µc A Current ( ) Pulsed: Pulse duration = 300 µs, duty cycle 1.5 % ( ) Pulse width limited by safe operating area A A Safe Operating Area Thermal Impedance 3/8

4 Output Characteristics Trafer Characteristics Traconductance Static Drain-source On Resistance Gate Charge vs Gate-source Voltage Capacitance Variatio 4/8

5 Normalized Gate Threshold Voltage vs Temperature Normalized On Resistance vs Temperature Source-drain Diode Forward Characteristics 5/8

6 Fig. 1: Unclamped Inductive Load Test Circuit Fig. 1: Unclamped Inductive Waveform Fig. 3: Switching Times Test Circuits For Resistive Load Fig. 4: Gate Charge test Circuit Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times 6/8

7 TO-247 MECHANICAL DATA DIM. mm inch MIN. TYP. MAX. MIN. TYP. MAX. A D E F F F G H L L L L M Dia P025P 7/8

8 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no respoibility for the coequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No licee is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics 1998 STMicroelectronics Printed in Italy All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - France - Germany - Italy - Japan - Korea - Malaysia - Malta - Mexico - Morocco - The Netherlands - Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A.. 8/8

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