Features. Description. Table 1. Device summary. Order code Marking Package Packing. STP110N8F6 110N8F6 TO-220 Tube

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1 N-channel 80 V, Ω typ.,110 A, STripFET F6 Power MOSFET in a TO-220 package Features Datasheet - production data Order code V DS R DS(on)max I D P TOT TAB STP110N8F6 80 V Ω 110 A 200 W TO Very low on-resistance Very low gate charge High avalanche ruggedness Low gate drive power loss Figure 1. Internal schematic diagram Applications Switching applications Description This device is an N-channel Power MOSFET developed using the STripFET F6 technology with a new trench gate structure. The resulting Power MOSFET exhibits very low R DS(on) in all packages. Table 1. Device summary Order code Marking Package Packing STP110N8F6 110N8F6 TO-220 Tube December 2014 DocID Rev 2 1/13 This is information on a product in full production.

2 Contents STP110N8F6 Contents 1 Electrical ratings Electrical characteristics Electrical characteristics (curves) Test circuits Package information TO-220 package information Revision history /13 DocID Rev 2

3 Electrical ratings 1 Electrical ratings Table 2. Absolute maximum ratings Symbol Parameter Value Unit V DS Drain-source voltage 80 V V GS Gate-source voltage ±20 V I D Drain current (continuous) at T C = 25 C 110 A I D Drain current (continuous) at T C = 100 C 85 A (1) I DM Drain current (pulsed) 440 A P TOT Total dissipation at T C = 25 C 200 W E (2) AS Single pulse avalanche energy 180 mj T J Operating junction temperature C -55 to 175 T stg Storage temperature C 1. Pulse width is limited by safe operating area 2. Starting T J = 25 C, I D = 55 A, V DD = 60 V Table 3. Thermal data Symbol Parameter Value Unit R thj-case Thermal resistance junction-case max C/W R thj-amb Thermal resistance junction-ambient max C/W DocID Rev 2 3/13 13

4 Electrical characteristics STP110N8F6 2 Electrical characteristics (T C = 25 C unless otherwise specified) Table 4. On/off-state Symbol Parameter Test conditions Min. Typ. Max. Unit V (BR)DSS I DSS Drain-source breakdown voltage Zero-gate voltage drain current V GS = 0, I D = 1 ma 80 V V GS = 0, V DS = 80 V 1 µa V GS = 0, V DS = 80 V, T C = 125 C 100 µa I GSS Gate-body leakage current V DS = 0, V GS = +20 V 100 na V GS(th) Gate threshold voltage V DS = V GS, I D = 250 µa V R DS(on) Static drain-source on- resistance V GS = 10 V, I D = 55 A Ω Table 5. Dynamic Symbol Parameter Test conditions Min. Typ. Max. Unit C iss Input capacitance pf C oss Output capacitance V DS = 40 V, f = 1 MHz, pf C rss V GS = 0 Reverse transfer capacitance pf Q g Total gate charge V DD = 40 V, I D = 110 A, nc Q gs Gate-source charge V GS = 10 V nc Q gd Gate-drain charge (see Figure 14) nc Table 6. Switching times Symbol Parameter Test conditions Min. Typ. Max. Unit t d(on) Turn-on delay time ns V DD = 40 V, I D = 55 A, t r Rise time ns R G = 4.7 Ω, V GS = 10 V t d(off) Turn-off delay time (see Figure 13) ns t f Fall time ns 4/13 DocID Rev 2

5 Electrical characteristics Table 7. Source-drain diode Symbol Parameter Test conditions Min. Typ. Max. Unit (1) V SD Forward on voltage I SD = 110 A, V GS = V t rr Reverse recovery time - 30 ns Q rr Reverse recovery charge I SD = 110 A, di/dt = 100 A/µs V DD = 64 V (see Figure 15) - 34 nc I RRM Reverse recovery current A 1. Pulsed: pulse duration = 300 µs, duty cycle 1.5% DocID Rev 2 5/13 13

6 Electrical characteristics STP110N8F6 2.1 Electrical characteristics (curves) Figure 2. Safe operating area Figure 3. Thermal impedance Figure 4. Output characteristics Figure 5. Transfer characteristics Figure 6. Gate charge vs gate-source Figure 7. Static drain-source on-resistance 6/13 DocID Rev 2

7 Electrical characteristics Figure 8. Capacitance variations Figure 9. Normalized gate threshold voltage vs temperature Figure 10. Normalized on-resistance Figure 11. Normalized V (BR)DSS vs temperature Figure 12. Drain-source diode forward characteristics DocID Rev 2 7/13 13

8 Test circuits STP110N8F6 3 Test circuits Figure 13. Switching times test circuit for resistive load Figure 14. Gate charge test circuit VDD VGS VD RG RL D.U.T μf 3.3 μf VDD Vi=20V=VGMAX 2200 μf 12V IG=CONST 2.7kΩ 47kΩ 100Ω 100nF D.U.T. 1kΩ VG PW 47kΩ PW 1kΩ AM01468v1 AM01469v1 Figure 15. Test circuit for inductive load switching and diode recovery times Figure 16. Unclamped inductive load test circuit G 25 Ω D S A D.U.T. B A FAST DIODE B A B D L=100μH μf μf VDD VD ID L 2200 μf 3.3 μf VDD G RG S Vi D.U.T. AM01470v1 Pw AM01471v1 Figure 17. Unclamped inductive waveform Figure 18. Switching time waveform V(BR)DSS ton toff VD tdon tr tdoff tf ID IDM 0 90% 10% VDS 10% 90% VDD VDD VGS 90% AM01472v1 0 10% AM01473v1 8/13 DocID Rev 2

9 Package information 4 Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: ECOPACK is an ST trademark. DocID Rev 2 9/13 13

10 Package information STP110N8F6 4.1 TO-220 package information Figure 19. TO-220 type A outline 10/13 DocID Rev 2

11 Package information Table 8. TO-220 type A mechanical data Dim. mm Min. Typ. Max. A b b c D D E e e F H J L L L L øp Q DocID Rev 2 11/13 13

12 Revision history STP110N8F6 5 Revision history Table 9. Document revision history Date Revision Changes 26-Sep First release. 05-Dec Updated in cover page the title and features. Product status promoted from preliminary to production data. Updated E AS parameter in Table 2 and R DS(on) in Table 4. Updated Table 5, Table 6 and Table 7. Inserted Section /13 DocID Rev 2

13 IMPORTANT NOTICE PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries ( ST ) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document STMicroelectronics All rights reserved DocID Rev 2 13/13 13

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