Power Dissipation (Note 1a) 1.5 P D Power Dissipation (Note 1b) 0.7

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1 FDMA38N Dual N-Channel PowerTrench MOSFET 3 V, 3.8 A, 68 mω Features Max r DS(on) = 68 mω at V GS =.5 V, I D = 3.8 A Max r DS(on) = 88 mω at V GS =.5 V, I D = 3. A Max r DS(on) = 3 mω at V GS =.8 V, I D =.9 A Low profile -.8 mm maximum - in the new package MicroFET x mm RoHS Compliant PIN S G D D D General Description June This device is designed specifically as a single package solution for dual switching requirements in cellular handset and other ultra-portable applications. It features two independent N-Channel MOSFETs with low on-state resistance for minimum conduction losses. The MicroFET x package offers exceptional thermal performance for its physical size and is well suited to linear mode applications. S G 6 5 D G D G S D 3 S Top Bottom MOSFET Maximum Ratings T A = 5 C unless otherwise noted Symbol Parameter Ratings Units V DS Drain to Source Voltage 3 V V GS Gate to Source Voltage ± V Drain Current -Continuous (Note a) 3.8 I D -Pulsed 6 A Power Dissipation (Note a).5 P D Power Dissipation (Note b).7 W T J, T STG Operating and Storage Junction Temperature Range -55 to +5 C Thermal Characteristics MicroFET x Thermal Resistance for Single Operation, Junction to Ambient (Note a) 86 Thermal Resistance for Single Operation, Junction to Ambient (Note b) 73 R θja Thermal Resistance for Dual Operation, Junction to Ambient (Note c) 69 Thermal Resistance for Dual Operation, Junction to Ambient (Note d) 5 Thermal Resistance for Single Operation, Junction to Ambient (Note e) 6 Thermal Resistance for Dual Operation, Junction to Ambient (Note f) 33 Package Marking and Ordering Information C/W Device Marking Device Package Reel Size Tape Width Quantity 38 FDMA38N MicroFET X 7 8 mm 3 units Fairchild Semiconductor Corporation

2 Electrical Characteristics T J = 5 C unless otherwise noted Symbol Parameter Test Conditions Min Typ Max Units Off Characteristics BV DSS Drain to Source Breakdown Voltage I D = 5 μa, V GS = V 3 V ΔBV DSS Breakdown Voltage Temperature ΔT J Coefficient I D = 5 μa, referenced to 5 C 3 mv/ C I DSS Zero Gate Voltage Drain Current V DS = V, V GS = V μa I GSS Gate to Source Leakage Current V GS = ± V, V DS = V ± na On Characteristics V GS(th) Gate to Source Threshold Voltage V GS = V DS, I D = 5 μa V ΔV GS(th) ΔT J Gate to Source Threshold Voltage Temperature Coefficient Dynamic Characteristics I D = 5 μa, referenced to 5 C -3 mv/ C V GS =.5 V, I D = 3.8 A 6 68 V r DS(on) Static Drain to Source On Resistance GS =.5 V, I D = 3. A mω V GS =.8 V, I D =.9 A 8 3 V GS =.5 V, I D = 3.8 A, T J = 5 C 7 8 g FS Forward Transconductance V DS = 5 V, I D = 3.8 A 5 S C iss Input Capacitance pf V DS = 5 V, V GS = V, C oss Output Capacitance 55 pf f = MHz C rss Reverse Transfer Capacitance 9 5 pf R g Gate Resistance. Ω Switching Characteristics t d(on) Turn-On Delay Time 5.3 ns t r Rise Time V DD = 5 V, I D = 3.8 A, 3 ns t d(off) Turn-Off Delay Time V GS =.5 V, R GEN = 6 Ω 5 7 ns t f Fall Time.5 ns Q g(tot) Total Gate Charge nc V DD = 5 V, I D = 3.8 A Q gs Gate to Source Charge. nc V GS = 5 V Q gd Gate to Drain Miller Charge nc Drain-Source Diode Characteristics V SD Source to Drain Diode Forward Voltage V GS = V, I S =.3 A (Note ).7. V t rr Reverse Recovery Time ns I F = 3.8 A, di/dt = A/μs Q rr Reverse Recovery Charge 3.3 nc Fairchild Semiconductor Corporation

3 Electrical Characteristics T J = 5 C unless otherwise noted Notes:. R θja is determined with the device mounted on a in oz. copper pad on a.5 x.5 in. board of FR- material. R θjc is guaranteed by design while R θja is determined by the user's board design. (a) R θja = 86 C/W when mounted on a in pad of oz copper,.5 " x.5 " x.6 " thick PCB. For single operation. (b) R θja = 73 C/W when mounted on a minimum pad of oz copper. For single operation. (c) R θja = 69 o C/W when mounted on a in pad of oz copper,.5 x.5 x.6 thick PCB. For dual operation. (d) R θja = 5 o C/W when mounted on a minimum pad of oz copper. For dual operation. (e) R θja = 6 o C/W when mounted on a 3mm pad of oz copper. For single operation. (f) R θja = 33 o C/W when mounted on a 3mm pad of oz copper. For dual operation. a. 86 C/W when mounted on a in pad of oz copper c. 69 C/W when mounted on a in pad of oz copper b. 73 C/W when mounted on a minimum pad of oz copper d. 5 C/W when mounted on a minimum pad of oz copper e. 6 C/W when mounted on 3mm pad of oz copper f. 33 C/W when mounted on 3mm of oz copper. Pulse Test : Pulse Width < 3 us, Duty Cycle <.% Fairchild Semiconductor Corporation 3

4 Typical Characteristics T J = 5 C unless otherwise noted ID, DRAIN CURRENT (A) NORMALIZED DRAIN TO SOURCE ON-RESISTANCE 6 8 V GS =.5 V V GS = 3.5 V V GS = 3 V V GS =.5 V V GS =.8 V PULSE DURATION = 8μs DUTY CYCLE =.5%MAX V DS, DRAIN TO SOURCE VOLTAGE (V) Figure. I D = 3.8 A V GS =.5 V NORMALIZED DRAIN TO SOURCE ON-RESISTANCE I D, DRAIN CURRENT(A) On Region Characteristics Figure. Normalized On-Resistance vs Drain Current and Gate Voltage T J, JUNCTION TEMPERATURE ( o C) rds(on), DRAIN TO SOURCE ON-RESISTANCE (mω) V GS =.8 V V GS =.5 V V GS = 3 V T J = 5 o C T J = 5 o C PULSE DURATION = 8μs DUTY CYCLE =.5%MAX V GS = 3.5 V I D = 3.8 A V GS =.5 V PULSE DURATION = 8 μs DUTY CYCLE =.5% MAX V GS, GATE TO SOURCE VOLTAGE (V) Figure 3. Normalized On Resistance vs Junction Temperature Figure. On-Resistance vs Gate to Source Voltage I D, DRAIN CURRENT (A) 6 8 PULSE DURATION = 8 μs DUTY CYCLE =.5% MAX V DS = 5 V T J = 5 o C T J = 5 o C T J = -55 o C 3 V GS, GATE TO SOURCE VOLTAGE (V) IS, REVERSE DRAIN CURRENT (A).. V GS = V T J = 5 o C T J = 5 o C T J = -55 o C V SD, BODY DIODE FORWARD VOLTAGE (V) Figure 5. Transfer Characteristics Figure 6. Source to Drain Diode Forward Voltage vs Source Current Fairchild Semiconductor Corporation

5 Typical Characteristics T J = 5 C unless otherwise noted ID, DRAIN CURRENT (A) VGS, GATE TO SOURCE VOLTAGE (V) 5 3 I D = 3.8 A 3 Q g, GATE CHARGE (nc) Figure 7. V DD = 5 V V DD = V V DD = V f = MHz V GS = V. 3 V DS, DRAIN TO SOURCE VOLTAGE (V) Gate Charge Characteristics Figure 8. Capacitance vs Drain to Source Voltage μs ms THIS AREA IS LIMITED BY r DS(on) ms. SINGLE PULSE ms T J = MAX RATED s R θja = 73 o C/W s T A = 5 o C DC.. V DS, DRAIN to SOURCE VOLTAGE (V) CAPACITANCE (pf) P(PK), PEAK TRANSIENT POWER (W) 5 C iss C oss C rss SINGLE PULSE R θja = 73 o C/W T A = 5 o C t, PULSE WIDTH (sec) Figure 9. Forward Bias Safe Operating Area Figure. Single Pulse Maximum Power Dissipation DUTY CYCLE-DESCENDING ORDER NORMALIZED THERMAL IMPEDANCE, Z θja.. D = SINGLE PULSE R θja = 73 o C/W P DM t t NOTES: DUTY FACTOR: D = t /t PEAK T J = P DM x Z θja x R θja + T A t, RECTANGULAR PULSE DURATION (sec) Figure. Junction-to-Ambient Transient Thermal Response Curve Fairchild Semiconductor Corporation 5

6 Dimensional Outline and Pad Layout Fairchild Semiconductor Corporation 6

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