Outline. Sequential Logic Design. Models of Sequential Circuits. Why sequential circuits?

Transcription

1 Outline Sequential Logic esign ES-- Lecture 3 C Why sequential circuits? Models of sequential circuits Sequential circuit analysis Sequential circuit design 2 Why sequential circuits? Sequential circuits has an etra dimension time Combinational circuit output depends only on the present inputs Sequential circuit output depends on the history of past inputs as well More powerful than combinational circuit ble to model situations that cannot be modeled by combinational circuits Models of Sequential Circuits Moore model feedback from memory M to input subcircuit C ; output subcircuit C 2 receives its inputs from M only Net state Y + is a function of both inputs X & present state Y Outputs Z still depend only on present state Y X C M FF FF 2 FF p Y C 2 Z(Y) 3 CLK Feedback 4

2 Models of Sequential Circuits Mealy model oth net state Y + and outputs Z are functions of inputs X and present state Y X C M FF FF 2 FF p Y(X) C 2 Z(X,Y) Sequential Circuit nalysis Given a sequential circuit diagram, analyze its behaviour by deriving its state table and hence its state diagram Requires state equations to be derived for the flip-flop inputs, as well as output functions for the circuit outputs other than the flip-flops (if any) We use (t) and (t+) to represent the present state and net state, respectively, of a flip-flop represented by lternatively, we could simply use and + for the present state and net state respectively CLK Feedback 5 6 Sequential Circuit nalysis Sequential Circuit nalysis Eample (using flip-flops) State equations + = + + = ' ' ' From the state equations and output function, we derive the state table, consisting of all possible binary combinations of present states and inputs State table Similar to truth table Inputs and present state on the left side Output function y = ( + ) ' ' ' Outputs and net state on the right side m flip-flops and n inputs? 2 m+n rows y 7 8 2

3 Sequential Circuit nalysis Sequential Circuit nalysis State equations + = + + = ' Output function y = ( + ) ' State table for the circuit of Eample Net State Input State Output + + y 9 Net State Input State Output + + y lternate form of state table Net State Output State = = = = y y Sequential Circuit nalysis Sequential Circuit nalysis From the state table, we can draw the state diagram State diagram Each state is denoted by a circle Each arrow (between two circles) denotes a transition of the sequential circuit (a row in state table) label of the form a/b is attached to each arrow where a denotes the inputs while b denotes the outputs of the circuit in that transition Net State Output State = = = = y y State diagram of the circuit / / / Each combination of the flip-flop values represents a state Hence, m flip-flops? up to 2 m states / / / / / 2 3

4 Flip-flop Input Functions The outputs of a sequential circuit are functions of the present states of the flip-flops and the inputs These are described algebraically by the circuit output functions Flip-flop Input Functions From the flip-flop input functions and the characteristic tables of the flip-flops, we obtain the net states of the flip-flops In Eample y = ( + ) ' The part of the circuit that generates inputs to the flipflops are described algebraically by the flip-flop input functions (or flip-flop input equations) The flip-flop input functions determine the net state generation 3 4 Flip-flop Input Functions Eample 2 circuit with a JK flip-flop We use 2 letters to denote each flip-flop input the first letter denotes the input of the flip-flop (J or K for JK flipflop, S or R for SR flip-flop, for flip-flop, T for T flip - flop) and the second letter denotes the name of the flipflop nalysis Eample 3 Given a sequential circuit with two JK flip-flops and, and one input J K ' J K ' J = C' + ' C K = + y C' ' C ' y J K ' 5 Obtain the flip-flop input functions from the circuit J = J = ' K = ' K = ' + ' =? 6 4

5 nalysis Eample 3 Flip-flop input functions J = J = ' K = ' K = + ' =? Fill the state table using the above functions, knowing the characteristics of the flip-flops used J K (t+) Comments (t) No change Reset Set (t)' Toggle Net state Input state Flip-flop inputs + + J K J K 7 nalysis Eample 3 raw the state diagram from the state table Net state Input state Flip-flop inputs + + J K J K 8 Flip-flop Ecitation Tables nalysis Starting from a circuit diagram, derive the state table or state diagram Flip-flop Ecitation Tables Ecitation tables given the required transition from present state to net state, determine the flip-flop input(s) esign Starting from a set of specifications (in the form of state equations, state table, or state diagram), derive the logic circuit Characteristic tables are used in analysis Ecitation tables are used in design 9 + J K X X X X JK Flip-flop + Flip-flop + S R X X SR Flip-flop + T T Flip-flop 2 5

6 Sequential Circuit esign esign procedure Start with circuit specifications description of circuit behavior erive the state table Perform state reduction if necessary Perform state assignment etermine number of flip-flops and label them Choose the type of flip-flop to be used erive circuit ecitation and output tables from the state table erive circuit output functions and flip-flop input functions raw the logic diagram Eample Specification We want to design the controller for a robot that can move around obstacles Robot has a sensor whose output = whenever it hits an obstacle; = otherwise Robot has two control lines z = turns robot left z 2 = turns robot right 2 22 Eample Specification esign Eample 4 The robot controller uses 4 states State no obstacle and last turn was left State obstacle detected, turn right State C no obstacle and last turn was right State obstacle detected, turn left / / / / / C / / / Possible state ssignment = = C= = 23 Given the following state diagram, design the sequential circuit using JK flip-flops 24 6

7 esign Eample 4 Circuit state/ecitation table, using JK flip-flops Net State State = = esign Eample 4 lock diagram ' ' K J K J K J K J + J K X X X X JK Flip-flop s ecitation table Net state Input state Flip-flop inputs + + J K J K X X X X X X X X X X X X X X X X 25 What are to go in here? ' ' Combinational circuit Eternal input(s) Eternal output(s) (none) 26 esign Eample 4 esign Eample 4 From state table, get flip-flop input functions Net state Input state Flip-flop inputs + + J K J K X X X X X X X X X X X X X X X X X X J = X X X X X X K = (? )' X X X X J = ' X X X X K = 27 Flip-flop input functions J = ' K = Logic diagram ' K J J = K = (? )' ' K J 28 7

8 esign Eample 5 esign, using flip-flops, the circuit based on the state table below (Eercise esign it using JK flip-flops) Net state Input state Output + + y 29 esign Eample 5 etermine epressions for flip-flop inputs and the circuit output y Net state Input state Output + + y (,, ) =? m(2,4,5,6) (,, ) =? m(,3,5,6) y(,, ) =? m(,5) = ' + ' = ' + ' + ' y = ' 3 esign Eample 5 From derived epressions, draw logic diagram = ' + ' = ' + ' + ' y = ' ' ' ' ' y Conclusions / Key Ideas Sequential circuits have memory! More powerful than combinational circuits! How to analyse a circuit Flip-Flop characteristic table State Table State diagram How to design a circuit Flip-flop ecitation table State assignment Circuit output function Flip-flop input function