Sequential Logic. (Materials taken from: Principles of Computer Hardware by Alan Clements )


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1 Sequential Logic (Materials taken from: Principles of Computer Hardware by Alan Clements )
2 Sequential vs. Combinational Circuits Combinatorial circuits: their outputs are computed entirely from their present inputs Sequential circuits: their outputs are computed using both the present input and their previous output The idea of a next state A clock input triggers the transition from the current state to next state.
3 The Big Picture
4 Sequential Logic Elements Sequential logic can perform as many different functions as combinational logic Certain functions have been given names. Latch: a 1bit memory element Register : m latches in a row and is able to store an mbit word Shift register: specialpurpose register that moves the bits of the word left or right Counter: specialpurpose register that when triggered (i.e. clocked) increases its contents by 1 State machines: moves from one state to another each time it is triggered
5 The FlipFlop Basic building block of sequential circuits
6 Analysis by Assuming Initial Conditions
7 Truth Table
8 RS FlipFlop
9 NAND Gate Implementation
10 Clocked RS FlipFlop NOR gate implementation NAND gate implementation
11 D FlipFlop D = 1 sets the RS flipflop and D = 0 clears it
12 D FlipFlop Chip 2 active low inputs called preset and clear  Unconditional  Set high in normal usage  Used on powerup
13 Registers Registers transmit and receive data from buses Flipflops are clocked to latch the data
14 Registers The most common sequential building block is the register. A register is N bits wide and has a load line for loading in a new value into the register. Note that DFF simply loads old value when LD = 0. DFF is loaded devery clock cycle. Copyright Thomson/Delmar Learning, All rights reserved. V
15 Ways of Clocking a FlipFlop A clocked flipflop captures a digital value and holds it; three ways of clocking: 1. Whenever the clock is asserted (i.e. a leveltriggered flipflop). 2. Whenever the clock is changing state (i.e. an edgetriggered flipflop). 3. Capture data on one edge of the clock and transfer it to output on the following edge (i.e. a master slave flipflop)
16 LevelTriggered FF The type of FF we have discussed so far Not appropriate for all applications
17 EdgeTriggered FF An edgetriggered flipflop is clocked not by the level of the clock (i.e. high or low), but by the transition of the clock signal from zero to one, or one to zero. Positive or risingedge sensitive Negative or fallingedge sensitive The rising or falling edge of a pulse can have durations less than 1 ns Like an levelsensitive clock triggered by a infinitesimally short pulse
18 EdgeTriggered FF Positive edgetriggered D flipflop
19 EdgeTriggered FF Variation in the arrival time of clock pulses to FF clock inputs is called clock skew Caused by differences in the paths by which clock pulses reach flipflops Distance Temperature Age
20 MasterSlave FF
21 Timing Diagrams
22 JK FlipFlop Edgetriggered flipflops When a JK flipflop is clocked, it behaves like an RS flipflop (where J = S, K = R) for all input conditions except J = K = 1
23 Summary Flipflops have internal state as well as external inputsthey are memory elements The most common forms of flipflop are: D flipflop, RS flipflop, and JK flipflop Flipflops have two outputs: Q and Q Most flipflops are clocked and the clock is used to trigger the flipflop. Flipflops often have unconditional preset and clear inputs used the set or clear the output
24 Shift Register Shift register: bits can be moved one place right every time the register is clocked Example, the binary pattern becomes after the shift register is clocked once and after it is clocked twice and after it is clocked three times, and so on After the first shift a 0 has been shifted in from the lefthand end and the 1 at the righthand end has been lost Shifting 1 place right has the effect of dividing the number by 2; 1 place left corresponds to multiplying by 2
25 RightShift Register Using D FFs
26 Shift Register Very useful sequential building block. Used to perform either parallel to serial data conversion or serial to parallel data conversion. Copyright Thomson/Delmar Learning, All rights reserved. V
27 Binary Counter Using JK FlipFlops
28 Counter Very useful sequential building block. Used to generate memory addresses, or keep track of the number of times a datapath operation is performed. Copyright Thomson/Delmar Learning, All rights reserved. V
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