CHAPTER IX REGISTER BLOCKS COUNTERS, SHIFT, AND ROTATE REGISTERS


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1 CHAPTER IX1 CHAPTER IX CHAPTER IX COUNTERS, SHIFT, AN ROTATE REGISTERS REA PAGES FROM MANO AN KIME
2 CHAPTER IX2 INTROUCTION INTROUCTION Like combinational building blocks, we can also develop some simple building blocks using registers. These include: Shift registers Rotate registers Counters Implementations of these components can use state machines, but, it is often easier to think of them without the complication of a state machine.
3 CHAPTER IX3 SHIFT REGISTERS INTROUCTION INTROUCTION Logical shift registers take the bits stored and move them up a significant bit or down a significant bit. LOGICAL SHIFT RIGHT (LSR) 0 MSB LSB C out Sign bit ARITHMETIC SHIFT RIGHT replication (ASR) C out LOGICAL SHIFT LEFT (LSL) ARITHMETIC SHIFT LEFT (ASL) C out C out 0 0 Notice that logical and arithmetic shift lefts are the same.
4 CHAPTER IX4 SHIFT REGISTERS LSR SAMPLE SHIFT REGISTERS INTROUCTION A simple implementation of a logical right shift register might look like the following. MSB LSB 0 Shift? CLK z n 1 z n 2 z n 3
5 CHAPTER IX5 SHIFT REGISTERS ASR SAMPLE SHIFT REGISTERS INTROUCTION LSR SAMPLE An arithmetic right shift register might look like the following. MSB LSB Shift? CLK z n 1 z n 2 z n 3
6 CHAPTER IX6 SHIFT REGISTERS 4BIT BIIRECTIONAL SHIFT REGISTERS INTROUCTION LSR SAMPLE ASR SAMPLE The following is a 4bit bidirectional shift register with parallel load. x 3 x 2 x 1 x 0 x l x r x1 MUX x1 MUX x1 MUX x1 MUX c 0 c 1 CLK
7 CHAPTER IX7 SHIFT REGISTERS CASCAING (1) SHIFT REGISTERS LSR SAMPLE ASR SAMPLE 4BIT BIIRECTIONAL Cascading of shift registers can also be done if the discarded bit is used to shift into another shift register module. For instance, the 4bit bidirectional shift register previously presented can be easily cascaded using the (right shift data input) and x r (left shift data input) x l c 0 c 1 x 3 x 2 x 1 x 0 4bit bidirectional shift register x l x r
8 CHAPTER IX8 SHIFT REGISTERS CASCAING (2) SHIFT REGISTERS ASR SAMPLE 4BIT BIIRECTIONAL CASCAING For example, an 8bit bidirectional shift register with parallel load can be formed as follows. x 7 x 6 x 5 x 4 x r x 3 x 2 x 1 x 0 x l c 0 c 1 c 0 c 1 x 3 x 2 x 1 x 0 4bit bidirectional shift register x l x r c 0 c 1 x 3 x 2 x 1 x 0 4bit bidirectional shift register x l x r z 7 z 6 z 5 z 4
9 CHAPTER IX9 ROTATE REGISTERS INTROUCTION SHIFT REGISTERS ASR SAMPLE 4BIT BIIRECTIONAL CASCAING A rotate register is the same as a logical shift register except that the discarded bit is fed back into the empty space from the shift. MSB LSB ROTATE RIGHT ROTATE RIGHT WITH CARRY C ROTATE LEFT ROTATE LEFT WITH CARRY C
10 CHAPTER IX10 ROTATE REGISTERS USING SHIFT REGISTERS SHIFT REGISTERS ROTATE REGISTERS INTROUCTION Rotate registers can actually be implemented using shift registers that have serial data inputs (such as the 4bit bidirectional shift register discussed). For example, a 4bit rotate register can be formed as follows. x 3 x 2 x 1 x 0 c 0 c 1 c 0 c 1 x 3 x 2 x 1 x 0 4bit bidirectional shift register x l x r
11 CHAPTER IX11 COUNTERS INTROUCTION SHIFT REGISTERS ROTATE REGISTERS INTROUCTION USING SHIFT REGISTERS A counter is a register that on each clock pulse counts up or down, usually in binary. Types of counters ripple counters synchronous counters binary counters BC counters Graycode counters Ring counters (a 1 moves in a ring from one flipflop to the next) up/down counters (ability to increment or decrement) counters with a parallel load (load in starting value with parallel input)
12 CHAPTER IX12 COUNTERS MOULOP COUNTERS SHIFT REGISTERS ROTATE REGISTERS COUNTERS INTROUCTION A modulop counter is defined by the following equation. S( t + 1) = ( S() t + x) mod p The state diagram for the modulop counter is as follows S 0 0 S 1 1 S 2 2 S p 1 p
13 CHAPTER IX13 COUNTERS RIPPLE AN SYNCHRONOUS ROTATE REGISTERS COUNTERS INTROUCTION MOULOP COUNTERS An nbit binary counter consists of n flipflops and can count in binary from 0 through 2 n 1. This can be formed with a modulop counter where p =. Two main categories exist for counters: Ripple counters One flipflop transition serves to trigger other flipflops. The clock pulse is usually only sent to the first flipflop. This requires a memory cell that can complement its value. The JK flipflip would be one approach (we have not studied this!) Synchronous counters Change of state is determined from the present state. Clock pulse sent to all flipflops. 2 n
14 CHAPTER IX14 COUNTERS TOGGLE LL COUNTERS INTROUCTION MOULOP COUNTERS RIPPLE & SYNCHRONOUS A toggle cell will be useful for implementing counters. (Count Enable) Transparent Latch Transparent Latch OUT Present Next OUT Latch Value Latch Value Toggle cell X X 0 0? OUT
15 CHAPTER IX15 COUNTERS RIPPLE COUNTER COUNTERS MOULOP COUNTERS RIPPLE & SYNCHRONOUS TOGGLE LL The toggle cell can be used as follows to form a ripple counter. (Count Enable) Toggle cell Toggle cell Toggle cell Toggle cell OUT OUT OUT OUT Notice that the previous toggle cell is connected to the clock input of the next cell. This causes the bits to ripple through the counter.
16 CHAPTER IX16 COUNTERS SYNCHRONOUS COUNTER COUNTERS RIPPLE & SYNCHRONOUS TOGGLE LL RIPPLE COUNTER Below is an example 4bit synchronous counter using toggle cells. (Count Enable) Toggle cell Toggle cell Toggle cell Toggle cell OUT OUT OUT OUT Notice that clock is sent to all toggle cells. A simplified form is in Figure 511, pp. 269 of Mano & Kime.
17 CHAPTER IX17 COUNTERS MORE ON MOULOP COUNTERS TOGGLE LL RIPPLE COUNTER SYNCHRONOUS COUNT. Notice that the counters developed so far can count from 0 to 2 n 1 for n toggle cells. Therefore, for modulep counting, the p is currently limited to. How about if we wish p to be a nonpower of 2? Need to build what can be referred to as a divide by counter. Given the following counter block, a general modulop counter can be constructed by clearing the counter after the desired maximum value. 2 n 4bit counter
18 CHAPTER IX18 COUNTERS BC COUNTER (MOULO10) COUNTERS RIPPLE COUNTER SYNCHRONOUS COUNT. MORE ON MOULOP To illustrate general modulop counters, consider the following implementation of a single digit decimal counter using BC. 4bit binary counter TC Terminal Count Output Notice that the counter is cleared after a value of 9 (1001).
19 CHAPTER IX19 COUNTERS TERMINAL COUNT (TC) COUNTERS SYNCHRONOUS COUNT. MORE ON MOULOP BC COUNTER The previous BC counter was built by deriving a terminal count (TC) output signal. A terminal count output signal for any counter can be useful, so, we will be included in general block diagram for a binary counter. TC 4bit binary counter Notice TC output In this 4bit binary counter example, TC=1 only when the output is 1111.
20 CHAPTER IX20 COUNTERS CASCAING COUNTERS COUNTERS MORE ON MOULOP BC COUNTER TERMINAL COUNT With a terminal count output (TC), counters can be easily cascaded together to form larger counters. For instance, an 8bit binary counter can be formed as follows. 4bit binary counter TC 4bit binary counter TC z 7 z 6 z 5 z 4
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