MODULE 11- DESIGN OF SYNCHRONOUS SEQUENTIAL COUNTERS AND STATE MACHINES

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1 Introduction to Digital Electronics Module 11: Design of Sequential Counters and State Machines 1 MODULE 11- DESIGN OF SYNCHRONOUS SEQUENTIAL COUNTERS AND STATE MACHINES OVERVIEW: A synchronous sequential counter is a counter where each flip flop is clocked at the same time, and has a memory of where it has been and uses that history to progress to its next designed state. This class of counter not only includes counters that count in a strict progression in an ordered sequence, it also includes counters that can count in any possible sequence. The only restraint is that each state or possible counting number can only be used once in a sequence before the sequence is repeated. There can be unused states or numbers that the counter never generates. These are called forbidden states. If the counting circuit even accidentally ends up in one of these forbidden states because of some electrical trauma such as a power fluctuation, the counter is designed to go to the reset or normal starting state on the next clock signal. The family of state machines includes synchronous sequential counters, and a class of counters that have outside generated control variables and can have several different transition paths dictated by the external control variables. The ability to externally change the counter s programmed or designed counting path using external control variables is the basis of the modern computer. There can be a separate state machine counting sequence for each binary combination of the control variables. A state machine with three counter variables (also called state variables), and two input variables (also called control variables), can have four possible counting paths with up to eight possible counts in each path. CONCEPT 11.1: BASIC STATE COUNTERS DO NOT REQUIRE EXTERNAL CONTROL VARIABLES A basic State counter uses one flip flop for each state variable or count variable that is fed back to the inputs of the control logic. There needs to be enough state variables to generate enough combinations to complete the desired number of steps. Each flip flop is parallel clocked or clocked by the same flip flop at the same time. Outside of the clock, the only other external input that the counter may have is a set or clear that is used to start the counter in its reset or desired starting state.

2 Introduction to Digital Electronics Module 11: Design of Sequential Counters and State Machines 2 CONCEPT 11.2: DESIGNING A BASIC STATE COUNTER The design of a basic state counter requires several tools. First you must map out the desired count sequence using a State Graph. A state graph has one circle for every possible state. If the counter has three state variables, the state graph will have eight circle. A four state variable design will start with a state graph that has sixteen circles and so on. The state graph transition path is next converted to a State Table. The state table is a matrix of how the state machine progresses from its present state to the next state as mapped by the state graph. The first set of columns tabulates a straight binary progression of the present state variables in much the same way as a truth table. There is one additional column that maps the states as S0 = 000, S1 = 001, and so on. The columns to the right are the next state columns that contain the destination state as mapped by the state graph. The final set of columns contain the control variables or the inputs to the flip flops or memory devices needed to force them to transition to the next state. For D flip flops, the D inputs must be the same as the next state. To make a state machine that uses D flip flops, the D inputs must have a combinational logic circuit that will cause the correct next state to be present on the D input for each present state. The best way to understand how to design a state counter is to follow a step by step procedure to design one. We will design a state counter that will count up in even steps as , and so on. 1. DRAW THE STATE GRAPH SHOWING THE COUNTER TRANSITION PATH

3 Introduction to Digital Electronics Module 11: Design of Sequential Counters and State Machines 3 2. CREATE A STATE TABLE THAT MAPS THE STATE GRAPH Notice that the D control variables are exactly the same as the next state variables. This is only true for the D flip flop. J-K flip flops must have the right combinations of J and K inputs to make the flip flop transition from the present state to the next state. 3. WRITE THE DESIGN EQUATIONS FOR THE FLIP FLOP INPUTS Here A, B, and C are the outputs of the flip flops which are fed back to the Combinational logic circuits which create the next state inputs on the D control variable inputs of the same flip flops. This is what makes the flip flops transition to the correct next state. 4. SIMPLIFY THE DESIGN LOGIC FOR THE CONTROL VARIABLE INPUTS If you are designing the state machine using programmable logic, there is no need to simplify the combinational logic circuits because the programmable logic device will have more than enough gates and inputs to cover the unsimplified equations. If you are going to build the design using discrete components, you might want to simplify the design using Karnaugh Maps.

4 Introduction to Digital Electronics Module 11: Design of Sequential Counters and State Machines 4 The design equations above simply to: J-K flip flop designs reduce much more than D flip flop designs because the J-K flip flops have don t care variables in their design equations. There would be six control variables for each of the J s and K s for each flip flop, but the control variable equations for each would reduce few or no gates. 5. DESIGN THE LOGIC FROM THE CONTROL VARIABLE EQUATIONS There are no external input variables that will change the counter. It will just continue to count the sequence it was designed to count without ever changing its order.

5 Introduction to Digital Electronics Module 11: Design of Sequential Counters and State Machines 5 CONCEPT 11.3: DESIGNING A STATE COUNTER OR STATE MACHINE WITH INPUT VARIABLES The design process for designing a state machine is basically the same as designing a state counter. The main difference is that the state machine has input variables which allow outside influences to change the state machine transition path. The design equations for the control variable inputs now have to consider input variables as well as state variables. The state graph can have multiple paths dictated by the input variables. The state tables will have separate sections for each combination of input variables. Each unique combination of input variables becomes a separate design problem. When they are combined together, the resulting design is a state machine that has multiple paths selected by external controls. The best way to understand how to complete a state machine design with external input variables is to design such a machine. Add to the earlier design an input variable X. If X=0, the sequence is as before. If X = 1, make the sequence The design steps will be similar to the original design but now much include the input variable X. 1. CREATE THE STATE GRAPH

6 Introduction to Digital Electronics Module 11: Design of Sequential Counters and State Machines 6 2. MAP THE STATE GRAPHS INTO THE STATE TABLE 3. WRITE THE CONTROL VARIABLE DESIGN EQUATIONS 4. DESIGN THE CIRCUIT FROM THE CONTROL VARIABLE EQUATIONS Even after simplifying the equations, the circuit is quite complicated. This is a good candidate for a pal design.