Copyright Peter R. Rony All rights reserved.


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1 Experiment No. 1. THE DIGI DESIGNER Experiment 11. Socket Connections on the Digi Designer Experiment No. 2. LOGIC LEVELS AND THE 7400 QUADRUPLE 2INPUT POSITIVE NAND GATE Experiment 21. Truth Table for a 2input Positive NAND Gate Experiment 22. Construction of an Inverter Experiment 23. What Happens if I Forget to Wire Up an Input Pin to a NAND Gate? Experiment 24. Inverting a Clock Output Experiment 25. What Happens When I Cionnect Both the Normal and Inverted Clock Outputs to a 2Input NAND Gate? Experiment No. 3. BINARY CODED DECIMAL (BCD), THE 7447 BCDTOSEVENSEGMENT DECODER/DRIVER,AND THE SEVENSEGMENT LED DISPLAY Experiment 31. Binary Coded Decimal Using Logic Switches and Lamp Monitors Experiment 32. BinaryCoded Decimal using Logicv Switches, the 7447 BCDtoseven Segment Decoder/Driver, and the Sevensegment LED Display Experiment 33,. Truth Table for a Sevensegment LED Display Experiment 34. Whatr do we mean by a Lamp Test, Blanking Input, Rippleblanking Input, and Rippleblanking Output on the 7447 Integrated Circuit Chip? Experiment 35. Behold the Decimal Point on a Sevensegment LED Display! Experiment 37. Construction of a Binary Counter using a Sevensegment LED Display Experiment No. 4. THE 7490 DECADE COUNTER Experiment 41. A Decade Counter Experiment 42. Dividebytwo, Dividebyfive, and Dividebyten Counters Experiment 43. What do the Reset Inputs do? Experiment 44. Construction of Several Different Types of Counters Experiment 45,. When does the Count Change, on the Leading Edge or the Trailing Edge of the Clock Pulse? Experiment 46. Counting bounces on Mechanical Switches Experiment No. 5. THE 7476 DUAL JK MASTERSLAVE FLIPFLOP WITH PRESET AND CLEAR Experiment 51. A Working FlipFlop Experiment 52. What do the JK Inputs Do? Experiment 53. What do the Clear and Preset Inputs Do? Experiment 54. Truth Table for a JK MasterSlave Flipflop Experiment 55. When does the Flipflop State Change, on the Leading Edge or the Trailing Edge of the Clock Pulse? Experiment 56. Dividebytwo and Dividebyfour circuits using a Pair of FlipFlops Experiment No 6. DIGITAL GATES Experiment 61. Truth Table for a 2Input Positive NAND Gate Experiment 62. Truth Table for a 3Input Positive NAND Gate Experiment 63. Truth Table for a 4Input Positive NAND Gate Experiment 64. Truth Table for an 8Input Positive NAND Gate Experiment 65. Truth Table for an Inverter Copyright Peter R. Rony All rights reserved.
2 Experiment 66. Truth Table for a 2Input Positive NOR Gate Experiment 67. Truth Table for a 3Input Positive AND Gate Experiment 68. Truth Table for a 2wide, 2Input ANDORINVERT Gate Experiment No. 7. PARALLEL AND SERIAL DATA TRANSMISSION AND THE BIT SHIFT REGISTER Experiment 71. Serial Entry of Data into an 8Bit Shift Register Experiment 72. A Circulating 8Bit Shift Register Experiment 73. A Serial Transmitter and Serial Receiver Experiment 74. A Parallel Transmitter and Parallel Receiver Experiment No. 8. OCTAL AND DECIMAL DECODERS Experiment 81. Truth Table for a Simple BCDtoDecimal Decoder Experiment 82. A Decade Sequencer Experiment 83. A Decimal Decoder Experiment No. 9. DATA SELECTOR/MULTIPLEXERS Experiment 91. Truth Table for an 8Lineto1Line Data Selector/Multiplexer Experiment 92. An Eightline, 4Biot BinaryWord Data Selector/Multiplexer Experiment 93. What Do Those Little Open Circles at Pins 6 and 7 in Figure 92 Mean? Experiment 9=4. Truth Table for a 16Lineto1Line Data Selector/Multiplexer Experiment No. 10. CONSTRUCTION OF A MULTIPLEXER THAT CONVERTS BCD TO SERIAL ASCII CHARACTERS Experiment Characteristics of the Synchronous 4Bit Binary Up/Down Counter with Preset Inputs Experiment Construction of a Synchronous Binary Down Counter that Counts from Decimal Eleven to Decimal Zero and Stops Experiment Construction of a Multiplexer that Converts BCD to Serial ASCII Characters Experiment No. 11. RANDOM ACCESS MEMORIES (RAMs) Experiment The 7493 FourBit Binary Counter Experiment Memory in a Minicomputer: the 64Bit RAM Appendix: PIN CONFIGURATIONS OF 7400SERIES INTEGRATEDCIRCUIT CHIPS Copyright Peter R. Rony All rights reserved.
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