MOSFET I-V characteristics: general consideration

Transcription

1 The current through the channel is V I = R MOSFET I-V characteristics: general consideration where V is the DRAIN SOURCE voltage The gate length L V V GS + G S Semiconductor D Here, we are assuming that V << V T (we will see why, later on) The channel resistance, R (W is the device width): R L L = = qn μ aw qn μ W s where n S = (c i /q) (V GS V T ) The channel current is: I = V (q n S μ W) /L = V q μ W (c i /q) (V GS V T )/L I= μ W c i (V GS V T ) V /L 1

2 MOSFET transconductance In most MOSFET applications, an input signal is the gate voltage V G and the output is the drain current I d. The ability of MOSFET to amplify the signal is given by the output/input ratio: the transconductance, g m = di/dv GS. I= μ W c i (V GS V T ) V /L (V is the Drain Source voltage) From this: g m = V μ W c i /L Key factors affecting FET performance (for any FET type): μ L I and g m I and g m High carrier mobility μ and short gate length L are the key features of FETs 2

3 Modern submicron gate FET Gate Source V-groove quantum wire transistor Drain 2 μm Operating frequency up to 300 GHz 3

4 Drain current saturation in MOSFET The gate length L V V GS + G S Semiconductor When no drain voltage V is applied, the entire channel has the same potential as the Source, i.e. V CH = 0. In this case, as we have seen, n S = (c i /q) (V GS V T ) where V GS is the gate source voltage and V T is the threshold voltage When the drain voltage V is applied, the channel potential changes from V CH = 0 on the Source side to V CH = V on the drain side. In this case, the induced concentration in the channel also depends on the position. D 4

5 Drain current saturation in MOSFET The gate length L V V GS + G S Semiconductor With the drain voltage V is applied, the actual induced concentration in any point x of the channel depends on the potential difference between the gate and the channel potential V(x) at this point. This is because this local potential difference defines the voltage that charges the elementary gate channel capacitor. On the source end of the channel (x=0, V CH =0): n S (0) = (c i /q) (V GS V T ). On the drain end of the channel (x=l, V CH = V): n S (L) = (c i /q) (V GS V T -V) < n S (0) At any point between source and drain, n S (L) < n S (x) = (c i /q) [V GS V T V(x)] < n S (0) D 5

6 Drain current saturation in MOSFET S G V GS V D Semiconductor n S V GS > V T I d V=0 V 1 > 0 V 2 > V 1 V 3 = V GS -V T V L x 6

7 1. Constant mobility model MOSFET Modeling Assuming a constant electron mobility, μ n, using the simple charge control model the absolute value of the electron velocity is given by, v n =μ n F =μ n dv dx With the gate voltage above the threshold, the drain current, I d, is given by Rewriting, dv I d = Wqμ n dx n s I dv = d Wμ c ( V V) n i GT dx Where W is the device width Where V GT = V GS V T. dv vs dx dependence represents a series connection of the elementary parts of MOSFET channel (for the series connection, voltages add up whereas current is the same). 7

8 I ( V d GT V ) dv = dx Wμ c Integrating along the channel, from x=0 (V=0) to x=l (V=V DS ), we obtain: n i For, V DS << V GT, I d = W μ n c i L V GT V DS Linear region For, larger V DS, I d = Wμ n c i L V GT V DS 2 V DS Sub-linear region Sub-linear 8

9 Channel pinch off and current saturation Pinch off occurs when V G V CH = V T at the drain end; n S (L) =0; the current I d saturates When, V DS = V SAT = V GS V T where V SAT is the saturation voltage. From the I d V dependence, at V DS =V SAT = V GT, I d = Wμ n c i L V GT V DS 2 V DS The saturation (pinch off) current, I d = I sat = Wμ nc i 2L V 2 GT 9

10 Transconductance Defined as g m = di d dv GS V DS From the equations for the drain current, I d, derived above, we find that g m = βv DS, βv GT, for V DS << V SAT for V DS > V SAT where β=μ n c i W L High transconductance is obtained with high values of the low field electron mobility, thin gate insulator layers (i.e., larger gate insulator capacitance c i = ε i /d i ), and large W/L ratios. 10

11 2. Velocity saturation model In semiconductors, electric field F accelerates electrons, i.e. the drift velocity of electron increases: v=μf However, at high electric fields this velocity saturates In modern short channel devices with channel length of the order of 1 µm or less, the electric field in the channel can easily exceed the characteristic electric, F s field of the velocity saturation F s = v s μ n 11

12 Electric field in the channel the electric field in the channel in the direction parallel to the semiconductorinsulator interface F = I d qμ n n s ( V)W v n =μ n F =μ n dv dx Potential (V) Distance (µm) Electric Field (kv/cm) Distance (µm) Surface Concentration (1012 1/cm2) Distance (µm) Potential, electric field, and surface electron concentration in the channel of a Si MOSFET for V DS = 1 and 1.2 V. L = 5 µm, di = 200 Å, µn = 800 cm2/vs, VGS = 2 V, VT = 1 V. 12

13 Once the electric field at the drain side of the channel (where the electric field is the highest) exceeds Fs, the electron velocity saturates, leading to the current saturation. In short-channel MOSFETs, this occurs at the drain bias smaller than the pinch-off voltage V DS = V GT. I dv = d dx Wμ c ( V V) n i GT Field at drain dv I F( L) = d x= L= dx W μ c ( V V ) n i GT DS Saturation condition, F s = I SAT μ n c i ( V GT V SAT )W 13

14 Saturation current versus gate-to-source voltage for 0.5 µm gate and 5 µm gate MOSFETs. Dashed lines: constant mobility model, solid lines: velocity saturation model. 14

15 MOSFET saturation current accounting for velocity saturation: g I sat = ch V GT V GT where V L = F s L and the channel conductance g ch = q µ n n s W / L, where n s =c i V GT /q V L 2 When F S L>> V GT (MOSFET with long gate or no velocity saturation): I sat = g ch V GT V GT V L 2 I sat g ch 2 V GT I d = I sat = Wμ nc i 2L V 2 GT (Expression obtained before on slide 9) When F S L<< V GT (MOSFET with short gate or early velocity saturation): I sat = g ch V GT V GT V L I 2 sat gchvl (Note that g ch is controlled by V GT ) 15

16 Source and drain series resistances. Source and drain parasitic series resistances, R s and R d, play an important role, especially in short channel devices where the channel resistance is smaller. Gate Source R s R d Drain V = ds I dr s + V + DS I R d d V GS = V gs I d R s V DS = V ds I d ( R s + R d ) 16

17 The measured transconductance (extrinsic) The intrinsic transconductance (V GS and V DS being intrinsic voltages) These parameters are related as g m = Where g d0 is the drain conductance g m = di d dv gs Vds =const g mo = di d dv GS V DS =const g mo ( ) 1 + g mo R s + g do R s + R d g do = di d dv DS VGS =const In the current saturation region (V DS > V SAT ), g d0 0 Similarly, extrinsic drain conductance can be written as, g d = g do 1 + g mo R s + g R do ( s + R d ) 17

18 The saturation current in MOSFET with parasitic resistances: g cho V gt I sat = 1 + g cho R s g cho R s + ( V gt / V L ) 2 Drain Current (ma) where V L = F s L and g cho = c i V gt µ n W/L Drain-to-Source Voltage (V) Drain Current (ma) Drain-to-Source Voltage (V) MOSFET output characteristics calculated for zero parasitic resistances and parasitic resistances of 5 Ω. Gate length is 1 µm 18

19 MOSFET capacitance-voltage characteristics S G V GS V D Semiconductor To simulate MOSFETs in electronic circuits, we need to have models for both the current-voltage and the capacitance-voltage characteristics. As MOSFETs is a three terminal device, we need three capacitances: C gs, C gd and C ds. Capacitance (differential) is defined as C = dq/dv. For example, C gs = dq s /dv gs (where Q s is the channel charge between S and G) Therefore, the total channel charge Q N has to be divided (partitioned) between the source and drain charges. How should we partition Q N between Qs and Q d? It is clear from the device symmetry that at zero drain bias Q s = Q d. If the total channel charge is Q N, then Q s = 0.5 Q N and Q d = 0.5 Q N. 19

20 MOSFET capacitance-voltage characteristics In the saturation regime, the charge distribution is no longer symmetrical: Q s > Q d In this case, we let Q s = F p Q N and Q d = (1 F p )Q N, where F p is the partitioning factor. In saturation, F p > 0.5 The challenge using this model is to determine F p as a function of V gs and V 20

21 Meyer model for MOSFET capacitance (used in SPICE) 2 2 V 1 GT VDS C = C + C 3 2VT VDS gs i f 2 V 1 GT C = C + C 3 2VT VDS gd i f 2 C i = c i W L is the channel capacitance The capacitance C f is the fringing capacitance. C f β c ε s W where βc 0.5 In saturation, V DS has to be replaced by V SAT (where V SAT = V GT ) This results in C GS SAT = (2/3) C i +C f ; C Gd SAT = C f 21

22 Meyer model for MOSFET capacitance (used in SPICE) C GS /C i C/C i C GD /C i V DS /V SAT 22