N-Channel 60-V (D-S) MOSFET

Transcription

1 Nw Product N-Channl 60-V (D-S) MOSFET Si308BDS PRODUCT SUMMARY V DS (V) R DS(on) (Ω) I D (A) a Q g (Typ.) at V GS = 0 V at V GS = 4.5 V..3 nc TO-36 (SSOT3) FEATURES Halogn-fr According to IEC Availabl TrnchFET Powr MOSFET 00 % R g Tstd 00 % UIS Tstd APPLICATIONS Battry Switch DC/DC Convrtr G 3 D S Top Viw Si308BDS (L8)* *Marking Cod Ordring Information: Si308BDS-T-E3 (Lad (Pb)-fr) Si308BDS-T-GE3 (Lad (Pb)-fr and Halogn-fr) ABSOLUTE MAXIMUM RATINGS T A = 5 C, unlss othrwis notd Paramtr Symbol Limit Unit Drain-Sourc Voltag V DS 60 V Gat-Sourc Voltag V GS ± 0 T C = 5 C.3 T Continuous Drain Currnt (T J = 50 C) C = 70 C.8 I T D A = 5 C.9 b, c T A = 70 C.5 b, c A Pulsd Drain Currnt I DM 8 T C = 5 C.39 Continuous Sourc-Drain Diod Currnt I T S A = 5 C 0.9 b, c Avalanch Currnt I L = 0. mh AS 6 Singl-Puls Avalanch Enrgy E AS.8 mj T C = 5 C.66 T C = 70 C.06 Maximum Powr Dissipation P D W T A = 5 C.09 b, c T A = 70 C 0.7 b, c Oprating Junction and Storag Tmpratur Rang T J, T stg - 55 to 50 C THERMAL RESISTANCE RATINGS Paramtr Symbol Typical Maximum Unit Maximum Junction-to-Ambint b, d 5 s R thja 90 5 Maximum Junction-to-Foot (Drain) Stady Stat R thjf C/W Nots: a. Basd on T C = 5 C. b. Surfac Mountd on " x " FR4 board. c. t = 5 s. d. Maximum undr Stady Stat conditions is 30 C/W. Documnt Numbr: S Rv. B, 9-Dc-08

2 Si308BDS Nw Product MOSFET SPECIFICATIONS T J = 5 C, unlss othrwis notd Paramtr Symbol Tst Conditions Min. Typ. Max. Unit Static Drain-Sourc Brakdown Voltag V DS V DS = 0 V, I D = 50 µa 60 V V DS Tmpratur Cofficint ΔV DS /T J 55 V GS(th) Tmpratur Cofficint ΔV GS(th) /T J I D = 50 µa - 5 mv/ C Gat-Sourc Thrshold Voltag V GS(th) V DS = V GS, I D = 50 µa 3 V Gat-Sourc Lakag I GSS V DS = 0 V, V GS = ± 0 V ± 00 na V DS = 60 V, V GS = 0 V Zro Gat Voltag Drain Currnt I DSS V DS = 60 V, V GS = 0 V, T J = 55 C 0 µa On-Stat Drain Currnt a I D(on) V DS 5 V, V GS = 0 V 8 A V GS = 0 V, I D =.9 A Drain-Sourc On-Stat Rsistanc a R DS(on) V GS = 4.5 V, I D =.7 A Ω Forward Transconductanc a g fs V DS = 5V, I D =.9 A 5 S Dynamic b Input Capacitanc C iss 90 Output Capacitanc C oss 6 V DS = 30 V, V GS = 0 V, f = MHz Rvrs Transfr Capacitanc C rss 5 pf V DS = 30 V, V GS = 0 V, I D =.9 A Total Gat Charg Q g nc Gat-Sourc Charg Q gs V DS = 30 V, V GS = 4.5 V, I D =.9 A 0.8 Gat-Drain Charg Q gd Gat Rsistanc R g f = MHz Ω Turn-On Dlay Tim t d(on) 4 6 Ris Tim t r V DD = 30 V, R L = 0 Ω 0 5 Turn-Off Dlay Tim t d(off) I D.5 A, V GEN = 0 V, R G = Ω 0 5 ns Fall Tim t f Turn-On Dlay Tim t d(on) 5 3 Ris Tim t r V DD = 30 V, R L = 0 Ω 6 4 Turn-Off Dlay Tim t d(off) I D =.5 A, V GEN = 4.5 V, R G = Ω 7 ns Fall Tim t f 7 Drain-Sourc Body Diod Charactristics Continuous Sourc-Drain Diod Currnt I S T C = 5 C.39 Puls Diod Forward Currnt a I SM 8 A Body Diod Voltag V SD I S =.5 A 0.8. V Body Diod Rvrs Rcovry Tim t rr 5 3 ns Body Diod Rvrs Rcovry Charg Q rr 0 5 nc I F =.5 A, di/dt = 00 A/µs, T J = 5 C Rvrs Rcovry Fall Tim t a ns Rvrs Rcovry Ris Tim t b 3 Nots: a. Puls tst; puls width 300 µs, duty cycl %. b. Guarantd by dsign, not subjct to production tsting. Strsss byond thos listd undr Absolut Maximum Ratings may caus prmannt damag to th dvic. Ths ar strss ratings only, and functional opration of th dvic at ths or any othr conditions byond thos indicatd in th oprational sctions of th spcifications is not implid. Exposur to absolut maximum rating conditions for xtndd priods may affct dvic rliability. Documnt Numbr: S Rv. B, 9-Dc-08

3 Nw Product Si308BDS TYPICAL CHARACTERISTICS 5 C, unlss othrwis notd 0 4 V GS =0thru 5 V I D - Drain Currnt (A) V GS =4V V GS =3V I D - Drain Currnt (A) 3 T C = 5 C T C =5 C T C = - 55 C V GS =V V DS - Drain-to-Sourc Voltag (V) Output Charactristics V GS - Gat-to-Sourc Voltag (V) Transfr Charactristics On-Rsistanc (Ω) R DS(on) V GS =4.5V V GS =0V C - Capacitanc (pf) C iss C oss I D - Drain Currnt (A) On-Rsistanc vs. Drain Currnt and Gat Voltag C rss V DS - Drain-to-Sourc Voltag (V) Capacitanc 0 I D =.9A.0 - Gat-to-Sourc Voltag (V) V GS V DS =30V V DS =48V - On-Rsistanc R DS(on) (Normalizd) V GS =0V, I D =.9A V GS =4.5V, I D =.7A Q g - Total Gat Charg (nc) Gat Charg T J -Junction Tmpratur ( C) On-Rsistanc vs. Junction Tmpratur Documnt Numbr: S Rv. B, 9-Dc-08 3

4 Si308BDS Nw Product TYPICAL CHARACTERISTICS 5 C, unlss othrwis notd I D =.9A - Sourc Currnt (A) I S T J = 50 C T J = 5 C - On-Rsistanc (Ω) R DS(on) T J = 5 C T J = 5 C V SD -Sourc-to-Drain Voltag (V) Sourc-Drain Diod Forward Voltag V GS - Gat-to-Sourc Voltag (V) On-Rsistanc vs. Gat-to-Sourc Voltag 0. 8 (V) I D = 50 µa (W) 6 T A = 5 C Singl Puls V GS(th).8 Powr T J - Tmpratur ( C) Thrshold Voltag Tim (s) Singl Puls Powr 0 Limitd byr DS(on) * 00 µs - Drain Currnt (A) I D 0. ms 0 ms 00 ms T A = 5 C Singl Puls BVDSS Limitd V DS - Drain-to-Sourc Voltag (V) * V GS > minimum V GS at which R DS(on) is spcifid Saf Oprating Ara s,0s DC 00 4 Documnt Numbr: S Rv. B, 9-Dc-08

5 Nw Product Si308BDS TYPICAL CHARACTERISTICS 5 C, unlss othrwis notd I D - Drain Currnt (A) T C - Cas Tmpratur ( C) Currnt Drating* Powr (W). 0.8 Powr (W) T C - Cas Tmpratur ( C) T A -Ambint Tmpratur ( C) Powr Drating, Junction-to-Cas Powr Drating, Junction-to-Ambint * Th powr dissipation P D is basd on T J(max.) = 50 C, using junction-to-cas thrmal rsistanc, and is mor usful in sttling th uppr dissipation limit for cass whr additional hatsinking is usd. It is usd to dtrmin th currnt rating, whn this rating falls blow th packag limit. Documnt Numbr: S Rv. B, 9-Dc-08 5

6 i t l i f f t i i t Si308BDS Nw Product TYPICAL CHARACTERISTICS 5 C, unlss othrwis notd Duty Cycl = 0.5 n s n f f t i a l i r T c n a d v p c m l I d E m a r N o r m a T z h Nots: P DM 0.0 t t. Duty Cycl, D = t t. Pr Unit Bas = R thja = 30 C/W Singl Puls 3. T JM - T A = P DM Z (t) thja 4. Surfac Mountd Squar Wav Puls Duration (s) Normalizd Thrmal Transint Impdanc, Junction-to-Ambint n s n a r T c n a d v p c m l I d E m a r N o r m a T z h 0. Duty Cycl = Singl Puls Squar Wav Puls Duration (s) Normalizd Thrmal Transint Impdanc, Junction-to-Foot 0 - maintains worldwid manufacturing capability. Products may b manufacturd at on of svral qualifid locations. Rliability data for Silicon Tchnology and Packag Rliability rprsnt a composit of all qualifid locations. For rlatd documnts such as packag/tap drawings, part marking, and rliability data, s /ppg? Documnt Numbr: S Rv. B, 9-Dc-08

7 Packag Information SOT-3 (TO-36): 3-LEAD b 3 E E S D A A 0.0 mm C 0.004" Sating Plan C q 0.5 mm Gaug Plan Sating Plan A C L L Dim MILLIMETERS INCHES Min Max Min Max A A A b c D E E BSC Rf.90 BSC Rf L L 0.64 Rf 0.05 Rf S 0.50 Rf 0.00 Rf q ECN: S Rv. K, 09-Jul-0 DWG: 5479 Documnt Numbr: Jul-0

8 AN807 Mounting LITTLE FOOT SOT-3 Powr MOSFETs Wharton McDanil Surfac-mountd LITTLE FOOT powr MOSFETs us intgratd circuit and small-signal packags which hav bn bn modifid to provid th hat transfr capabilitis rquird by powr dvics. Ladfram matrials and dsign, molding compounds, and di attach matrials hav bn changd, whil th footprint of th packags rmains th sam. ambint air. This pattrn uss all th availabl ara undrnath th body for this purpos S Application Not 86, Rcommndd Minimum Pad Pattrns With Outlin Drawing Accss for MOSFETs, ( for th basis of th pad dsign for a LITTLE FOOT SOT-3 powr MOSFET footprint. In convrting this footprint to th pad st for a powr dvic, dsignrs must mak two connctions: an lctrical connction and a thrmal connction, to draw hat away from th packag FIGURE. Footprint With Coppr Sprading Th lctrical connctions for th SOT-3 ar vry simpl. Pin is th gat, pin is th sourc, and pin 3 is th drain. As in th othr LITTLE FOOT packags, th drain pin srvs th additional function of providing th thrmal connction from th packag to th PC board. Th total cross sction of a coppr trac connctd to th drain may b adquat to carry th currnt rquird for th application, but it may b inadquat thrmally. Also, hat sprads in a circular fashion from th hat sourc. In this cas th drain pin is th hat sourc whn looking at hat sprad on th PC board. Sinc surfac-mountd packags ar small, and rflow soldring is th most common way in which ths ar affixd to th PC board, thrmal connctions from th planar coppr to th pads hav not bn usd. Evn if additional planar coppr ara is usd, thr should b no problms in th soldring procss. Th actual soldr connctions ar dfind by th soldr mask opnings. By combining th basic footprint with th coppr plan on th drain pins, th soldr mask gnration occurs automatically. Figur shows th footprint with coppr sprading for th SOT-3 packag. This pattrn shows th starting point for utilizing th board ara availabl for th hat sprading coppr. To crat this pattrn, a plan of coppr ovrlis th drain pin and provids planar coppr to draw hat from th drain lad and start th procss of sprading th hat so it can b dissipatd into th A final itm to kp in mind is th width of th powr tracs. Th absolut minimum powr trac width must b dtrmind by th amount of currnt it has to carry. For thrmal rasons, this minimum width should b at last 0.00 inchs. Th us of wid tracs connctd to th drain plan provids a low-impdanc path for hat to mov away from th dvic. Documnt Numbr: Nov-03

9 Application Not 86 RECOMMENDED MINIMUM PADS FOR SOT (0.950) 0.0 (0.559) 0.09 (0.74) 0.06 (.69) (.45) (.34) (.459) Rcommndd Minimum Pads Dimnsions in Inchs/(mm) Rturn to Indx Rturn to Indx APPLICATION NOTE Documnt Numbr: 7609 Rvision: -Jan-08 5

10 Lgal Disclaimr Notic Vishay Disclaimr ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE. Vishay Intrtchnology, Inc., its affiliats, agnts, and mploys, and all prsons acting on its or thir bhalf (collctivly, Vishay ), disclaim any and all liability for any rrors, inaccuracis or incompltnss containd in any datasht or in any othr disclosur rlating to any product. Vishay maks no warranty, rprsntation or guarant rgarding th suitability of th products for any particular purpos or th continuing production of any product. To th maximum xtnt prmittd by applicabl law, Vishay disclaims (i) any and all liability arising out of th application or us of any product, (ii) any and all liability, including without limitation spcial, consquntial or incidntal damags, and (iii) any and all implid warrantis, including warrantis of fitnss for particular purpos, non-infringmnt and mrchantability. Statmnts rgarding th suitability of products for crtain typs of applications ar basd on Vishay s knowldg of typical rquirmnts that ar oftn placd on Vishay products in gnric applications. Such statmnts ar not binding statmnts about th suitability of products for a particular application. It is th customr s rsponsibility to validat that a particular product with th proprtis dscribd in th product spcification is suitabl for us in a particular application. Paramtrs providd in datashts and / or spcifications may vary in diffrnt applications and prformanc may vary ovr tim. All oprating paramtrs, including typical paramtrs, must b validatd for ach customr application by th customr s tchnical xprts. Product spcifications do not xpand or othrwis modify Vishay s trms and conditions of purchas, including but not limitd to th warranty xprssd thrin. Excpt as xprssly indicatd in writing, Vishay products ar not dsignd for us in mdical, lif-saving, or lif-sustaining applications or for any othr application in which th failur of th Vishay product could rsult in prsonal injury or dath. Customrs using or slling Vishay products not xprssly indicatd for us in such applications do so at thir own risk. Plas contact authorizd Vishay prsonnl to obtain writtn trms and conditions rgarding products dsignd for such applications. No licns, xprss or implid, by stoppl or othrwis, to any intllctual proprty rights is grantd by this documnt or by any conduct of Vishay. Product nams and markings notd hrin may b tradmarks of thir rspctiv ownrs. Rvision: 3-Jun-6 Documnt Numbr: 9000