Exercise 6-1. The Power MOSFET EXERCISE OBJECTIVES

Transcription

1 Exercise 6-1 The Power MOSFET EXERCISE OBJECTIVES At the completion of this exercise, you will know the behaviour of the power MOSFET during switching operation. You will be able to explain how MOSFET switching can be improved. You will also understand why ripples can be observed on the drain-source voltage when the transistor turns off. DISCUSSION MOSFET switching times are determined primarily by the device capacitances. The gate structure has capacitance C DG to the drain and C GS to the source. The MOSFET also has a capacitance C DS between the drain and source. To clearly understand the behaviour of the MOSFET, it is important to understand the role of these three capacitances. However, note that the device data sheets typically specify C iss, C oss and C rss because these capacitances can be most readily measured. These values are related to the interelectrode capacitances by the relationships: C iss = C DG + C GS (in parallel) C oss = C DG + C DS (in parallel) C rss = C DG 6-9

2 The input capacitance C iss is important in driving a MOSFET because it must be charged and discharged to switch the device. Using this circuit, you will first study MOSFET turn-on. Before time t 0, the circuit is closed to the 0 V terminal and is in steady state. The current I L circulates in the load and in the free wheeling diode. The MOSFET supports the full circuit voltage V CC, and the gate voltage and drain current are zero. Switch S is permutated to V (DR) at time t 0 ; the gate-source capacitance C GS starts to charge, and the gate-to-source voltage V GS increases. No current flows in the drain until the gate reaches the threshold voltage V GS(th) at t 1. The delay between times t 0 and t 1 is the turn-on delay period t d(on). 6-10

3 During periode t 1 to t 2, the gate-source capacitance C GS continues to charge, the gate-to-source voltage V GS continues to rise and the drain current I D rises also. So long as the actual drain current I D is still building up towards the available load current I L, the freewheeling diode remains in conduction, the voltage across it remains low, and the voltage V DS across the MOSFET continues to be virtually the full circuit voltage V CC. At time t 2, the drain current reaches I L, and the freewheeling diode shuts off. The potential V DS of the drain is no longer tied to the supply voltage V CC. The period during which the drain current increases up to an amplitude I L, that is from t 1 to t 2, corresponds to the rise time period t r. 6-11

4 At time t 2, the drain current stays constant at the value I L. The gate-to-source voltage V GS also stays constant because the drive current I G does not affect the capacitance C GS, it now contributes exclusively to discharge the capacitance C DG. The drain-to-source voltage V DS falls at the same time that drain-to-gate voltage V DG (discharge of the capacitance C DG ). At time t 3, the drain-to-source voltage V DS falls to a value equal to I D x R DS(on) (static drain-source on-state resistance), and the MOSFET is completely ON. The gate-to-source voltage V GS is now free to increase up to the drive voltage V (DR) at time t 4 while charging the gate-source capacitance C GS. 6-12

5 Using the same circuit, you will now study MOSFET turn-off. Before time t 0, the switch S is connected to the drive source V (DR) ; the gate-source capacitance C GS supports the full drive voltage V (DR), and the MOSFET is completely ON. S is switched to the 0 V terminal at time t 0 ; the gate-to-source voltage V GS falls and nothing occurs in the drain circuit until V GS falls to a level that just sustains the drain current (a little over V GS(th) ). 6-13

6 During period t 1 to t 2, the drain-to-source voltage V DS rises to V CC while the drain current remains constant at I L. Until the drain voltage just exceeds the circuit voltage V CC, the freewheeling diode remains reverse biased; all of I L must, therefore, continue to flow into the drain of the MOSFET. The gate-to-source voltage V GS remains constant, because the drive current I G does not affect the gate-source capacitance C GS, it contributes exclusively to charge the drain-gate capacitance C DG. The delay between times t 0 and t 2 corresponds to the turn-off delay period t d(off). 6-14

7 At time t 2, the drain-to-source voltage V DS is equal to the circuit voltage V CC, while the current I D is equal to the full load value I L. The freewheeling diode is now at its equilibrium point of conduction, ready to receive the load current I L in exchange with the current in the drain. The interval t 2 to t 3 ends when the drain current I D falls to zero, and corresponds to the fall time period t f. After time t 3, the gate-to-source voltage V GS decreases down to the final value of the driving voltage (0 V). Note that the switching speed can be controlled by varying the value of the gate resistor R G. It allows the increase or decrease of current I G and thus, control of the charge or discharge of the input capacitance. 6-15

8 The MOSFET turn-off can also be improved if a bipolar control signal is used rather than a unipolar one. With a bipolar signal V (DR) of +/- 15 V, voltage V GS will pass from +15 V to -15 V, which means a still faster discharge of the input capacitance. The turn-on and turn-off curves previously explained are valid for an ideal circuit. In practice, you will obtain different results. The parasitic inductance L l caused by cables that connect the source V CC, the freewheeling diode and the MOSFET significantly modifies the behaviour of the MOSFET during switching. During turn-on, a drop of the drain-source voltage V DS occurs before the drain current I D reached the full load current I L. 6-16

9 Then, during turn-off, two others phenomenonae occur. First, a surge of the drain-source voltage V DS can be observed during the drop of the drain current I D. Note that the V DS surge amplitude is proportional to the inductance L l, the intensity of current I L and the switching speed. Then, at the end of turn-off, the inductance L l, in conjunction with capacitance C DS, creates oscillations in voltage V DS. 6-17

10 PROCEDURE * 1. Connect the POWER INPUT terminals of the circuit board to the power supply. Do not turn on the power supply at this time. * 2. Set up the circuit shown in the figure. Note: The oscilloscope must be isolated from ground to allow correct signal observation. * 3. Turn on the power supply and the square wave generator. Adjust the generator frequency to 20 khz. 6-18

11 CAUTION! The load resistors will get very hot. Avoid touching them to prevent burn injury. * 4. Adjust the oscilloscope to observe the gate-source voltage V GS and the drain-source voltage V DS during MOSFET turn-on. Set the time base to 500 ns/div or less. * 5. You should now observe signals similar to these ones. * 6. Connect the oscilloscope as shown in the figure. 6-19

12 Set channel 2 to reverse mode in order to correctly read the MOSFET voltage V DS. Adjust the oscilloscope so you can observe the current I D (measured from the voltage across the resistor R2) and the voltage V DS during MOSFET turn-on. Keep the same time base setting. * 7. You should now observe two signals similar to these ones. Observe ripples on the current curve. This is noise, generated by the reverse recovery of the free-wheeling diode, and the noise interferes with the measuring instrument. * 8. Observe V GS, V DS and I D signals in the figure. 6-20

13 * 9. Referring to the previous figure, evaluate the turn-on delay time t d(on) of the MOSFET. t d(on) = nsec * 10. Connect and adjust the oscilloscope to observe the gate-source voltage V GS and the drain-source voltage V DS during MOSFET turn-off. Reset channel 2 to normal mode. * 11. You should now observe signals similar to these ones. 6-21

14 * 12. Connect again the oscilloscope as shown in the figure and set channel 2 to reverse mode. Adjust the oscilloscope in order to observe I D and V DS during turn-off of the MOSFET. * 13. You should now observe two signals similar to these ones. 6-22

15 * 14. Observe V GS, V DS and I D signals in the figure. * 15. Referring to the previous figure, evaluate the turn-off delay time t d(off) of the MOSFET. t d(off) = µsec * 16. Connect and adjust the oscilloscope to observe the gate-source voltage V GS and the drain-source voltage V DS during MOSFET turn-on. Reset channel 2 to normal mode. * 17. In the DRIVER (DR) circuit block, move the jumper so that the switching signal passes from bipolar to unipolar then to bipolar. Repeat this manipulation while observing the oscilloscope. * 18. Do you observe a significant change in the turn-on signal when switching is controlled with a bipolar signal rather than with a unipolar signal? * Yes * No * 19. Adjust the oscilloscope to observe the gate-source voltage V GS and the drain-source voltage V DS during MOSFET turn-off. * 20. In the DRIVER (DR) circuit block, move the jumper so that the switching signal passes from bipolar to unipolar then to bipolar. Repeat this manipulation while observing the oscilloscope. 6-23

16 * 21. Do you observe a significant change in the turn-off signal when the switching is controlled with a bipolar signal rather than with a unipolar signal? * Yes * No Make sure the driver circuit is set to provide a bipolar switching signal. * 22. A CM (circuit modification) will now be introduced into the circuit. Observe carefully the signals on the oscilloscope in order to see the modification resulting from this change. Introduce the CM 9 into the circuit. It place a resistor of 47 6 in parallel with the resistor R1. This significantly reduces the resistance value and thus, allows an increase of the current charging the MOSFET input capacitance. (To again observe the signal variation resulting from CM 9 activation, go back and redo the step.) * 23. Do you observe large decrease in the turn-on switching time resulting from the faster charging of the MOSFET input capacitance? * Yes * No * 24. Temporarily remove the CM 9 from the circuit to let you adjust your oscilloscope in order to observe V GS and V DS during MOSFET turn-off. * 25. CM 9 will be again introduced into the circuit in order to increase the discharge current of the MOSFET input capacitance. Observe signals carefully. Introduce again the CM 9 into the circuit. Do you observe a large decrease in the turn-off switching time resulting from the faster discharge of the MOSFET input capacitance? * Yes * No * 26. Remove the CM 9 from the circuit. * 27. A new CM will be introduced into the circuit. Observe carefully both signals, especially ripples in the drain-source voltage V DS, in order to see the modifications resulting from this change. 6-24

17 Introduce the CM 11 into the circuit, placing a capacitor of 430 pf in parallel with capacitance C DS. This increases the MOSFET output capacitance. * 28. Do you observe a decrease in the amplitude and frequency of the ripples in voltage V DS? * Yes * No * 29. Turn off the power supply and the square wave generator and remove all the connecting wires. CONCLUSION & & & & The MOSFET switching speed can be modified by increasing or decreasing the value of the driving circuit resistor R1. During MOSFET turn-off, ripples can be observed in the voltage V DS signal. They are caused by the output capacitance C DS in conjunction with the parasitic inductance L l. Using a bipolar control signal improves MOSFET turn-off switching. The MOSFET requires a simple driving circuit delivering very low power. This transistor is characterized by a very high power gain. REVIEW QUESTIONS 1. The input capacitance C iss is related to the interelectrode capacitance(s) by the relationship: a. C DG + C DS b. C DG c. C DG + C GS d. C DS + C GS 2. The gate resistor R G allows one a. to increase or decrease the gate current I G. b. to control the charge or discharge of the input capacitance. c. to control the switching speed. d. All of the above. 6-25

18 3. During turn-on, the parasitic inductance L l causes a. a surge of the drain-source voltage V DS. b. oscillations of the voltage V DS. c. a premature drop of the drain-source voltage V DS. d. None of the above. 4. At turn-off, a surge of the drain-source voltage V DS can be observed during the drop of the drain current I D. This surge is proportional to a. the inductance L l and the capacitance C DS. b. the switching speed, the current I L and the inductance L l. c. the inductance L l and the current I L. d. None of the above. 5. At the end of turn-off, the capacitance C DS, in conjunction with the inductance L l, a. causes a surge of the drain-source voltage V DS. b. creates oscillations of the drain-source voltage V DS. c. causes a premature drop of the drain-source voltage V DS. d. None of the above. 6-26