MMBF4391LT1G, SMMBF4391LT1G, MMBF4392LT1G, MMBF4393LT1G. JFET Switching Transistors. N Channel

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1 LT1G, SLT1G, LT1G, LT1G JFET Switching Transistors NChannel Features S Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AECQ1 Qualified and PPAP Capable These Devices are PbFree, Halogen Free/BFR Free and are RoHS Compliant* MAXIMUM RATINGS Rating Symbol Value Unit DrainSource Voltage V DS Vdc DrainGate Voltage V DG Vdc GateSource Voltage V GS Vdc Forward Gate Current I G(f) madc THERMAL CHARACTERISTICS Characteristic Symbol Max Unit Total Device Dissipation FR 5 Board (Note 1) T A = 25 C Derate above 25 C P D mw mw/ C Thermal Resistance, JunctiontoAmbient R JA 556 C/W Junction and Storage Temperature Range T J, T stg 55 to +1 C Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. FR5 = in. GATE 1 2 SOT2 CASE 18 STYLE 2 SOURCE 1 DRAIN MARKING DIAGRAM 1 XXX M XXX = Specific Device Code M = Date Code* = PbFree Package (Note: Microdot may be in either location) *Date Code orientation and/or overbar may vary depending upon manufacturing location. MARKING & ORDERING INFORMATION See detailed ordering, marking and shipping information in the package dimensions section on page 2 of this data sheet. *For additional information on our PbFree strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. Semiconductor Components Industries, LLC, 12 May, 12 Rev. 1 Publication Order Number: LT1/D

2 LT1G, SLT1G, LT1G, LT1G ELECTRICAL CHARACTERISTICS (T A = 25 C unless otherwise noted) Characteristic Symbol Min Max Unit OFF CHARACTERISTICS GateSource Breakdown Voltage (I G = Adc, V DS = ) V (BR)GSS Vdc Gate Reverse Current (V GS = 15 Vdc, V DS =, T A = 25 C) (V GS = 15 Vdc, V DS =, T A = C) I GSS. nadc Adc GateSource Cutoff Voltage (V DS = 15 Vdc, I D = nadc) LT1, SLT1 LT1 LT1 V GS(off) Vdc OffState Drain Current (V DS = 15 Vdc, V GS = 12 Vdc) (V DS = 15 Vdc, V GS = 12 Vdc, T A = C) I D(off) nadc Adc ON CHARACTERISTICS ZeroGateVoltage Drain Current (V DS = 15 Vdc, V GS = ) LT1, SLT1 LT1 LT1 I DSS madc DrainSource OnVoltage (I D = 12 madc, V GS = ) LT1, SLT1 (I D = 6. madc, V GS = ) LT1 (I D =. madc, V GS = ) LT1 V DS(on) Vdc Static DrainSource OnResistance (I D = madc, V GS = ) LT1, SLT1 LT1 LT1 SMALLSIGNAL CHARACTERISTICS Input Capacitance (V DS = Vdc, V GS = 15 Vdc, f = MHz) Reverse Transfer Capacitance (V DS = Vdc, V GS = 12 Vdc, f = MHz) r DS(on) 6 C iss 14 C rss.5 pf pf ORDERING INFORMATION LT1G Device Marking Package Shipping 6J SOT2 (PbFree) SLT1G* LT1G 6J 6K SOT2 (PbFree) SOT2 (PbFree), / Tape & Reel LT1G M6G SOT2 (PbFree) For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD811/D. *S Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AECQ1 Qualified and PPAP Capable. 2

3 t f t t LT1G, SLT1G, LT1G, LT1G TYPICAL CHARACTERISTICS, TURN-ON DELAY TIME (ns) d(on) I D, DRAIN CURRENT (ma) Figure 1. TurnOn Delay Time = V, RISE TIME (ns) r I D, DRAIN CURRENT (ma) Figure 2. Rise Time = V, TURN-OFF DELAY TIME (ns) t d(off) I D, DRAIN CURRENT (ma) Figure. TurnOff Delay Time = V, FALL TIME (ns) I D, DRAIN CURRENT (ma) Figure 4. Fall Time = V

4 LT1G, SLT1G, LT1G, LT1G R GEN V GEN INPUT PULSE t r.25 ns t f.5 ns PULSE WIDTH = s DUTY CYCLE % SET V DS(off) = V INPUT R K R GG R GG > R K V GG V DD R D R D' = R D (R T + ) R D + R T + Figure 5. Switching Time Test Circuit R T OUTPUT NOTE 1 The switching characteristics shown above were measured using a test circuit similar to Figure 5. At the beginning of the switching interval, the gate voltage is at Gate Supply Voltage (V GG ). The DrainSource Voltage (V DS ) is slightly lower than Drain Supply Voltage (V DD ) due to the voltage divider. Thus Reverse Transfer Capacitance (C rss ) of GateDrain Capacitance (C gd ) is charged to V GG + V DS. During the turnon interval, GateSource Capacitance (C gs ) discharges through the series combination of R Gen and R K. C gd must discharge to V DS(on) through R G and R K in series with the parallel combination of effective load impedance (R D ) and DrainSource Resistance (r DS ). During the turnoff, this charge flow is reversed. Predicting turnon time is somewhat difficult as the channel resistance r DS is a function of the gatesource voltage. While C gs discharges, V GS approaches zero and r DS decreases. Since C gd discharges through r DS, turnon time is nonlinear. During turnoff, the situation is reversed with r DS increasing as C gd charges. The above switching curves show two impedance conditions; 1) R K is equal to R D which simulates the switching behavior of cascaded stages where the driving source impedance is normally the load impedance of the previous stage, and 2) (low impedance) the driving source impedance is that of the generator., FORWARD TRANSFER ADMITTANCE (mmhos) V fs 15 C gs C gd V DS = 15 V. (C ds is negligible I D, DRAIN CURRENT (ma) V R, REVERSE VOLTAGE (VOLTS) Figure 6. Typical Forward Transfer Admittance Figure 7. Typical Capacitance C, CAPACITANCE (pf) r DS(on), DRAIN-SOURCE ON-STATE RESISTANCE (OHMS) I DSS = ma 25 ma ma 75 ma ma 125 ma, DRAIN-SOURCE ON-STATE RESISTANCE (NORMALIZED) DS(on) V GS, GATE-SOURCE VOLTAGE (VOLTS) T channel, CHANNEL TEMPERATURE ( C) r I D = ma V GS = Figure 8. Effect of GateSource Voltage on DrainSource Resistance Figure 9. Effect of Temperature on DrainSource OnState Resistance 4

5 LT1G, SLT1G, LT1G, LT1G, DRAIN-SOURCE ON-STATE RESISTANCE (OHMS) r DS(on) r V GS = V GS(off) I DSS, ZERO-GATE VOLTAGE DRAIN CURRENT (ma) Figure. Effect of I DSS on DrainSource Resistance and GateSource Voltage V GS, GATE-SOURCE VOLTAGE (VOLTS) NOTE 2 The ZeroGateVoltage Drain Current (I DSS ) is the principle determinant of other JFET characteristics. Figure shows the relationship of GateSource Off Voltage (V GS(off) ) and DrainSource On Resistance (r DS(on) ) to I DSS. Most of the devices will be within ±% of the values shown in Figure. This data will be useful in predicting the characteristic variations for a given part number. For example: Unknown r DS(on) and V GS range for an The electrical characteristics table indicates that an has an I DSS range of 25 to 75 ma. Figure shows r DS(on) = 52 for I DSS = 25 ma and for I DSS = 75 ma. The corresponding V GS values are 2.2 V and 4.8 V. 5

6 LT1G, SLT1G, LT1G, LT1G PACKAGE DIMENSIONS SOT2 (TO26) CASE 188 ISSUE AP A E A1 D 1 2 e b HE SEE VIEW C L L1 VIEW C c.25 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, CONTROLLING DIMENSION: INCH.. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL. 4. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR GATE BURRS. MILLIMETERS INCHES DIM MIN NOM MAX MIN NOM MAX A A b c D E e L L H E STYLE : PIN 1. DRAIN 2. SOURCE. GATE.95.7 SOLDERING FOOTPRINT SCALE :1 mm inches ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Typical parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including Typicals must be validated for each customer application by customer s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 516, Denver, Colorado 8217 USA Phone: or Toll Free USA/Canada Fax: or Toll Free USA/Canada orderlit@onsemi.com N. American Technical Support: Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: Japan Customer Focus Center Phone: ON Semiconductor Website: Order Literature: For additional information, please contact your local Sales Representative LT1/D