ELEC 1041 Digital Electronics. Tutorial: Combinational Logic Design Examples Saeid Nooshabadi. Problem #1.

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1 Problem #1 ELEC 1041 Digital Electronics Tutorial: Combinational Logic Design Examples Saeid Nooshabadi Develop a minimized Boolean implementation of a ones count circuit that works as follows. The subsystem has four binary inputs A, B, C, D, and generates a 3-bit output, XYZ. XYZ is 000 if none of the inputs are 1, 001 if one input is 1, 010 if two are one, 011 if three inputs are 1, and 100 if all four inputs are 1. (a) Draw the truth tables for XYZ (A, B, C, D). (b) Minimize the functions X, Y, Z using 4-variable K-maps. Write down the Boolean expressions for the minimized Sum of Products form of each function. (c) Repeat the minimization process, this time deriving Product of Sums form. ELEC Combinational Logic Examples - 1 ELEC Combinational Logic Examples - 2 Problem #2 Problem #2 Solution (1/3) Consider a combinational logic subsystem that performs a two-bit addition function. It has two 2-bit inputs A B and C D, and forms the 3-bit sum X Y Z. (a) Draw the truth tables for XYZ(A,B,C,D). (b) Minimize the functions using 4-variable K-maps to derive minimized Sum of Products forms. (a) Draw the truth tables for XYZ(A,B,C,D) (c) In your textbook and in class/lab we have introduced the Full Adder circuit. What is the relative performance to compute the resulting sum bits of the 2-bit adder compared to two full adders connected together? (Hint: which has the worst delay in terms of gates to pass through between the inputs and the final outputs, and how many gates is this?). ELEC Combinational Logic Examples - 3 ELEC Combinational Logic Examples - 4

2 Problem #2 Solution (2/3) Problem #3 (b) Minimize the functions using 4-variable K-maps to derive minimized Sum of Products forms. Show how to implement the full adder Sum(A, B, Cin) and Carry(A, B, Cin) in terms of: (a) Two 8:1 multiplexers; (b) Two 4:1 multiplexers; (c) If you are limited to 2:1 multiplexers (and inverters) only, how would you use them to implement the full adder and how many 2:1 multiplexers would you need? ELEC Combinational Logic Examples - 5 ELEC Combinational Logic Examples - 6 Problem #4 Problem #5 Design a combinational logic subsystem with three inputs, I 3, I 2, I 1, and two outputs, O 1, O 0, that behaves as follows. The outputs indicate the highest index of the inputs that is driven high. For example, if I 3 is 0, I 2 is 1, I 1 is 1, then O 1, O 0 would be 10 (i.e., I 2 is the highest input set to 1). (a) Specify the function by filling out a complete truth table. (b) Develop the minimized gate-level implementation using the K-map method. (c) Develop an implementation using two 4:1 multiplexers. (d) Compare your implementation for (b) and (c). Which is better and under what criterion? You are to design a simple combinational subsystem to the following specification. The system has the ability to pass its inputs directly to its outputs when a control input, S, is not asserted. It interchanges its inputs when the control input S is asserted. For example, given four inputs A, B, C, D and four outputs W, X, Y, Z, when S=0, WXYZ=ABCD and when S=1, WXYZ=BCDA. Show how to implement this functionality using building blocks that are restricted to be 2:1 multiplexers and 2:1 demultiplexers. Draw your solution below, using black boxes for the mux/demux blocks. A B C D W X Y Z ELEC Combinational Logic Examples - 7 S ELEC Combinational Logic Examples - 8

3 Problem #6 Problem #7 Your task is to design a combinational logic subsystem to decode a hexadecimal digit in the range of 0 through 9, A through F to drive a sevensegment display. The hexadecimal numerals are as follows: Calendar subsystem Determine number of days in a month (to control watch display) used in controlling the display of a wrist-watch LCD screen inputs: month, leap year flag outputs: number of days Design a minimized implementation in PLA form. That is, look for common terms among the seven output functions. ELEC Combinational Logic Examples - 9 ELEC Combinational Logic Examples - 10 Problem #8 Problem #9 Leap year flag Determine value of leap year flag given the year For years after 1582 (Gregorian calendar reformation), leap years are all the years divisible by 4, except that years divisible by 100 are not leap years, but years divisible by 400 are leap years. Consider the following functions, which are five different functions over the inputs A,B,C,D. (1) F(A,B,C) = m(1,2,6,7) (2) F(A,B,C,D) = m(0,1,3,9,11,12,14,15) (3) F (A,B,C,D) = m(2,4,5,6,7,8,10,13) (4) F(A,B,C,D) = (A B C + A B ) (C + D) (5) F(A,B,C,D) = (A + B + C) (A + B + C + D) (A + B + C + D ) (A + B ) a) you were to implement these in a single PLA structure with four inputs, five outputs, and an unlimited number of product terms, how many unique product terms are there in this PLA implementation b) If you are trying to maximize the number of shared product terms across the five functions, rather than minimizing the literal count for each function independently, how many unique terms do you obtain? Draw the new K-maps with your selection of implicants that minimizes the number of unique terms across all five functions ELEC Combinational Logic Examples - 11 ELEC Combinational Logic Examples - 12

4 Problem #10 Problem #11 Consider the following Boolean function in Product of Sums form: F(A,B,C,D) = (A + B + D) (A + B + D) (B + C + D ) (A + C + D) (A + C + D) Show how to implement this function with an 8:1 multiplexer, with A,B,C on the control inputs and D, its complement, and the constants 0 and 1 available as data inputs. Show your work: F(A,B,C,D) Consider a variation on the calendar combinational subsystem that works as follows. Given the inputs MONTH (1-12), DAY (1-31), and LEAP_YEAR flag, the subsystem generates the output DAY_OF_YEAR (1-365 or 366). In this problem, you will design the subsystem to the block diagram level only. (a) One block maps the month into a day offset into the year. Identify the inputs and outputs and their bit widths. Use any formal specification method you wish (e.g., truth tables, ROM contents, equations, hardware description language, etc.) to describe the function of this block. (b) You may assume any width binary adder you may require. Indicate how the adder is composed with the block of part (a) and any other blocks or inputs to compute the correct output. Be sure to describe how you deal with the LEAP_YEAR input S 2 S 1 S 0 A B C ELEC Combinational Logic Examples - 13 ELEC Combinational Logic Examples - 14 Problem #12 Problem #13 Design a two-bit comparator with the following inputs and outputs: Inputs: Numbers N1 and N2 to be compared N1 = A B N2 = C D Design a 2X2 bit multiplier: Inputs: Numbers N1 and N2 to be multiplied N1 = A1 A0 N2 = B1 B0 Outputs: LT, GT, EQ LT = 1 when AB < CD example (A B = 01) < (C D = 10) GT = 1 when AB > CD example (A B = 11) > (C D = 10) EQ = 1 when AB = CD example (A B = 01) = (C D = 01) Outputs: products: P8, P4, P2, P0 P0 = Product with weighting 2 0 = 1 P2 = Product with weighting 2 1 = 2 P4 = Product with weighting 2 2 = 4 P8 = Product with weighting 2 3 = 8 Example: 11 A1A0 11 B1B0 11 B0 (AA0) 11 B1 (AA0) 1001 P8 P4 P2 P0 ELEC Combinational Logic Examples - 15 ELEC Combinational Logic Examples - 16

5 Problem #14 Problem #15 Design a BCD increment by 1: Analyse the behavior of the Circuit below when Input A changes from one logic state to another. Inputs: BCD Number N N = I8 I4 I2 I0 Outputs: products: O8, O4, O2, O0 O8 O4 O2 O0 = I8 I4 I2 I0 + 1 Example: 0011 I8 I4 I2 I O8 O4 O2 O0 A B C D F O8 O4 O2 O0 ELEC Combinational Logic Examples - 17 ELEC Combinational Logic Examples - 18 Problem #16 6Problem #17 Analyse the circuit below for static hazard Analyse the pulse shaping circuit below A S + B S' open switch A B C D ELEC Combinational Logic Examples - 19 ELEC Combinational Logic Examples - 20

6 Problem #18 Problem #19 Which of the components below cab be used to build an inverter? Consider the Equation: Z= A B C D + A B C D + A B C D + A B C D + A B C D + A B C D + A B C D + A B C D Use Shanon s decomposition to implement this using 2-1 multiplexers. ELEC Combinational Logic Examples - 21 ELEC Combinational Logic Examples - 22