# FORDHAM UNIVERSITY CISC Dept. of Computer and Info. Science Spring, Lab 2. The Full-Adder

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6 6 Lab 2 X A B C D E F G H I J x y z C S Y xy z Figure 6: Suggested layout of the full-adder circuit. From left to right: DIP switches and pullup resistors; IC s; and LED s and their current-limiting resistors. Wiring is not shown. Figure 5. Route the S and C outputs of the inverting buffers of the second full-adder to these two LEDs to display the 3-bit sum. 4.2 Observations 1. Apply all 8 possible combinations of inputs to the full adder. Record the results in a truth table, in the form of 0s and 1s. Because of the use of the inverting buffers, an LED OFF is a 0 and an LED ON is a Interpret the output combination CS on each row as a binary number, and convert to decimal numbers 0 through 3. Verify that on each row, the output number is the number of 1-bits in the input. 5 Exercises Do the following exercise prior to the laboratory. 1. Perform by hand the addition of the two 4-bit binary numbers , in the same way as the example in Figure 1. Show the carries explicitly. As a check, interpret these two numbers and their sum in decimal. 6 References 1. David A. Patterson and John L. Hennessy, Computer Organization and Design: the hardware/software interface, 4th ed. (Morgan Kauffman 2009), Appendix C. 2. M. Morris Mano, Digital Logic and Computer Design (Prentice-Hall, 1979), chapters 1, 5.

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