Understanding Logic Design


 April Armstrong
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1 Understanding Logic Design ppendix of your Textbook does not have the needed background information. This document supplements it. When you write add DD R0, R1, R2, you imagine something like this: R1 dder R0 R2 What kind of hardware can DD two binary integers? We need to learn about GTES and BOOLEN LGEBR that are foundations of logic design.
2 ND gate X Y X.Y X X.Y Y OR gate X Y X+Y X X+Y Y NOT gate ( x = x ) X X 0 1 X X 1 0 Typically, logical 1 = +3.5 volt, and logical 0 = 0 volt. Other representations are possible.
3 nalysis of logical circuits X X.Y F Y X.Y What is the value of F when X=0 and Y=1? Draw a truth table. X Y F This is the exclusive or (XOR) function. In algebraic form F= X.Y + X.Y
4 More practice 1. Let.B +.C = 0. What are the values of, B, C? 2. Let ( + B + C).( + B + C) = 0. What are the possible values of, B, C? Draw truth tables. Draw the logic circuits for the above two functions. B C
5 Boolean lgebra + 0 = + = 1. 1 =. = = 1 + B = B + 0. = 0. B = B. + (B + C) = ( + B) + C. (B. C) = (. B). C + =. =. (B + C) =.B +.C Distributive Law + B.C = (+B). (+C). B = + B De Morgan s theorem + B =. B
6 De Morgan s theorem. B = + B + B =. B Thus, is equivalent to Verify it using truth tables. Similarly, is equivalent to These can be generalized to more than two variables: to. B. C = + B + C + B + C =. B. C
7 Synthesis of logic circuits Many problems of logic design can be specified using a truth table. Give such a table, can you design the logic circuit? Design a logic circuit with three inputs, B, C and one output F such that F=1 only when a majority of the inputs is equal to 1. B C F Sum of product form F =.B.C +.B.C +.B.C +.B.C Draw a logic circuit to generate F
8 Simplification of Boolean functions Using the theorems of Boolean lgebra, the algebraic forms of functions can often be simplified, which leads to simpler (and cheaper) implementations. Example 1 F =.B +.B + B.C =. (B + B) + B.C How many gates do you save =.1 + B.C from this simplification? = + B.C F B B C F C
9 Example 2 F =.B.C +.B.C +.B.C +.B.C =.B.C +.B.C +.B.C +.B.C +.B.C +.B.C = (.B.C +.B.C) + (.B.C +.B.C) + (.B.C +.B.C) = ( + ). B.C + (B + B). C. + (C + C)..B = B.C + C. +.B Example 3 Show that +.B = + B =.1 +.B =. (1 + B) =. 1 =
10 Other types of gates.b B +B B NND gate NOR gate Be familiar with the truth tables of these gates. B + B =.B +.B Exclusive OR (XOR) gate
11 NND and NOR are universal gates ny function can be implemented using only NND or only NOR gates. How can we prove this? (Proof for NND gates) ny boolean function can be implemented using ND, OR and NOT gates. So if ND, OR and NOT gates can be implemented using NND gates only, then we prove our point. 1. Implement NOT using NND
12 2. Implementation of ND using NND.B B 3. Implementation of OR using NND.B = +B B B Exercise. Prove that NOR is a universal gate.
13 Logic Design (continued) XOR Revisited XOR is also called modulo2 addition. B C F B = 1 only when there are an odd number of 1 s in (,B). The same is true for B C also = Why? 0 =
14 Logic Design Examples Half dder B S C Half dder Sum (S) B Carry (C) S = B C =.B Carry B Sum
15 Full dder Sum (S) B C in S C out Full dder B C in Carry (C out ) S = B C in C out =.B + B.C in +.C in Design a full adder using two halfadders (and a few gates if necessary) Can you design a 1bit subtracter?
16 Decoders typical decoder has n inputs and 2 n outputs. Enable B D3 D2 D1 D0 D D B D D to4 decoder and its truth table D3 =.B Draw the circuit of this decoder. D2 =.B D1 =.B The decoder works per specs D0 =.B when (Enable = 1). When Enable = 0, all the outputs are 0. Exercise. Design a 3to8 decoder. Question. Where are decoders used? Can you design a 24 decoder using 12 decoders?
17 Encoders typical encoder has 2 n inputs and n outputs. D0 D1 D2 D3 B D D D2 B D to2 encoder and its truth table = D1 + D3 B = D2 + D3
18 Multiplexor It is a manytoone switch, also called a selector. 0 F S = 0, F = B 1 S = 1, F = B Control S Specifications of the mux 2to1 mux F = S. + S. B Exercise. Design a 4to1 multiplexor using two 2to 1 multiplexors.
19 Demultiplexors demux is a onetomany switch. 0 X S = 0, X = 1 Y S = 1, Y = S 1to2 demux, and its specification. So, X = S., and Y = S. Exercise. Design a 14 demux using 12 demux.
20 1bit LU Operation Operation = 00 implies ND Result Operation = 01 implies OR B Operation = 10 implies DD? Operation Carry in B Result dder 10 Carry out Understand how this circuit works.
21 Converting an adder into a subtractor  B (here  means arithmetic subtraction) = + 2 s complement of B = + 1 s complement of B + 1 operation Carry in B Result 0 10 dder 1 11 B invert Carry out 1bit adder/subtractor For subtraction, B invert = 1 and Carry in = 1
22 32bit LU B invert C in operation 0 LU B0 Result 0 Cout C in 1 LU B1 Result 1 Cout LU B31 Result 31 Cout overflow
23 Combinational vs. Sequential Circuits Combinational circuits The output depends only on the current values of the inputs and not on the past values. Examples are adders, subtractors, and all the circuits that we have studied so far Sequential circuits The output depends not only on the current values of the inputs, but also on their past values. These hold the secret of how to memorize information. We will study sequential circuits later.
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