Introduction to Logic Gates. ESD-I Lesson 2. Logic Gates. Logic Gates: The Inverter. Logic Gates. Gate Symbols. The Inverter

Transcription

1 Introduction to Logic Gtes S-I Lesson 2 Logic Gtes Logic gtes rwing Logic ircuit nlzing Logic ircuit oolen lger Universl Gtes: NN nd NOR Implementtion using NN or NOR Gtes Positive nd Negtive Logic Implementtion of SOP nd POS pressions 2 Logic Gtes Gte Smols N OR NOT NN Smol set Smol set 2 (NSI/I Stndrd 9-984) + ' ( )' &? & + ' ( )' Logic Gtes: The Inverter The Inverter ' ' ppliction of the inverter: complement. inr numer ' NOR (+)'? (+)' XLUSIV OR? =? 3 s omplement 4

2 Logic Gtes: The N Gte The N Gte Logic Gtes: The OR Gte The ORGte & +? Logic Gtes: The NN Gte The NN Gte Logic Gtes: The NOR Gte The NOR Gte ( )'? ( )' & ( )' (+)'? (+)'? (+)' ( ) ' NN? Negtive-OR (+)' NOR? Negtive-N 7 8

3 Logic Gtes: The XOR Gte The XORGte Logic Gtes: The XNOR Gte The XNORGte? =? (? )' = (? )'? (? ) ' 9 rwing Logic ircuit When oolen epression is provided, we cn esil drw the logic circuit. mples: (i) F = z' (note the use of 3-input N gte) nlsing Logic ircuit When logic circuit is provided, we cn nlse the circuit to otin the logic epression. mple: Wht is the oolen epression of F4? F ' ' '' ''+ (''+)' F4 z z' F4 = (''+)' = (+) ' 2

4 nlsing Logic ircuit mple: Wht is oolen epression of F5? F5 z Universl Gtes: NN nd NOR N/OR/NOT gtes re sufficient for uilding n oolen functions. However, other gtes re lso used ecuse: (i) usefulness (ii) economicl on trnsistors (iii) self-sufficient NN/NOR: economicl, self-sufficient XOR: useful (e.g. prit it genertion) 3 4 NN Gte NN Gte NN gte is self-sufficient (cn uild n logic circuit with it). n e used to implement N/OR/NOT. Implementing n inverter using NN gte: Implementing N using NN gtes: ( )' (()'()')' = (()')' idempotenc = () involution ' ( )' = ' (T: idempotenc) Implementing OR using NN gtes: ' + 5 ' (()'()')' = ('' )' idempotenc = ''+'' emorgn = + involution 6

5 NOR Gte NOR gte is lso self-sufficient. n e used to implement N/OR/NOT. Implementing n inverter using NOR gte: ' (+)' = ' (T: idempotenc) Implementing N using NOR gtes: Implementing OR using NOR gtes: NOR Gte (+) ' ' ' ((+)'+(+)')'=('+')' idempotenc = '' '' emorgn = involution + ((+)'+(+)')' = ((+)')' idempotenc = (+) involution 7 8 Implementtion using NN gtes Implementtion using NN gtes Possile to implement n oolen epression using NN gtes. Procedure: (i) Otin sum-of-products oolen epression: e.g. F3 = '+'z (ii) Use emorgn theorem to otin epression using 2-level NN gtes e.g. F3 = '+'z = ('+'z)' ' involution = ((')' ('z)')' emorgn ' ' z (')' ('z)' F3 = ((')' ('z)') ' = ' + 'z F3 9 2

6 Implementtion of SOP pression Implementtion of SOP pression Sum-of-Products epressions cn e implemented using:? 2-level N-OR logic circuits? 2-level NN logic circuits N-OR logic circuit F F = NN-NN circuit ( circuit trnsformtion) ) dd doule ules ) chnge OR-withinverted-inputs to NN & ules t inputs to their complements ' F F 22 Implementtion using NOR gtes Possile to implement n oolen epression using NOR gtes. Procedure: (i) Otin product-of-sums oolen epression: e.g. F6 = (+') ('+z) (ii) Use emorgn theorem to otin epression using 2-level NOR gtes e.g. F6 = (+') ('+z) = ((+') ('+z))' ' Involution = ((+')' + ( +z)')' emorgn Implementtion using NOR gtes ' ' z (+')' ('+z)' F6 = ((+')'+('+z)')' = (+') ('+z) F

7 Implementtion of POS pression Positive & Negtive Logic NOR-NOR circuit ( circuit trnsformtion): ) dd doule ules ) chnged N-withinverted-inputs to NOR & ules t inputs to their complements G G In logic gtes, usull:? H (high voltge, 5V) =? L (low voltge, V) = This convention > positive logic. However, the reverse convention, negtive logic possile:? H (high voltge) =? L (low voltge) = ' Positive & Negtive Logic signl tht is set to logic is sid to e : sserted, or ctive, or true. signl tht is set to logic is sid to e : desserted, or negted, or flse. Positive & Negtive Logic Positive logic: nle ctive High: : isled : nled ctive-high signl nmes re usull written in uncomplemented form. ctive-low signl nmes re usull written in complemented form. Negtive logic: nle ctive Low: : nled : isled 27 28

8 Summr Logic Gtes rwing Logic ircuit nlzing Logic ircuit N, OR, NOT NN NOR Implementtion of oolen epression using these Universl gtes Given oolen epression, drw the circuit Implementtion of SOP nd POS pressions oncept of Minterm nd Mterm Given circuit, finding the function Positive nd Negtive Logic 29