Your Name: SI Number: UNIVERSITY OF CALIFORNIA AT BERKELEY BERKELEY AVIS IRVINE LOS ANGELES RIVERSIE SAN IEGO SAN FRANCISCO epartment of Electrical Engineering and Computer Sciences SANTA BARBARA SANTA CRUZ CS 5 - Spring 998 Prof. A. R. Newton Prof. K. Pister uiz Solutions Room Evans Hall, :pm Tuesday April 7 th (Open Katz only, Calculators OK, hr mins) Include all final answers in locations indicated on these pages and in pen. Use space provided for all working. If necessary, attach additional sheets by staple at the end. BE SURE TO WRITE YOUR NAME ON EVERY SHEET.. (pts) (a) A digital system is required to amplify a binary-encoded audio signal. The user should be able to control the signal amplitude from minimum to maximum in increments. What is the minimum number of binary bits required to encode the user-specified amplitude? (b) Excess- code (Katz page 499) is a variation of binary-coded decimal (BC) code. Each decimal digit is represented by a 4-bit code that is three more than the associated BC code. For example, is encoded in excess- as, is encoded in excess- as, etc. esign a single-output combinational logic circuit that outputs a when the input to the circuit in 4-bit excess- code is a prime number. For all other (non-prime) legal 4-bit excess- numbers applied to the inputs, the output is a. Assume complement inputs are available and implement the circuit using: (i) One 6-input, four control-line multiplexer only. (ii) One 8-input, three control-line multiplexer only. (iii) One 4-input, two control-line multiplexer and a minimum number of simple logic gates (INV, NAN, NOR, AN, OR, XOR, XNOR). (a) (5pts) Number of bits = _ 6 =64 and 7 =8 so seven bits are required () / () / () /4 TOTAL /. (b) (i) (5pts) One 6-input MUX ecimal A B C Prime 4 5 6 7 8 9 4 5 6 7 8 9 4 5 A B C (additional space for solutions on reverse) prime uiz Page of 6 CS 5 - Sp. 98
. (b) (ii) (pts) One 8-input MUX 4 5 6 7 A B C prime. (b) (iii) (pts) One 4-input MUX and logic gates C A B prime Additional space for Problem CS 5 - Sp. 98 Page of 6 uiz
Your Name: () ( points) (a) What is the better way to implement arithmetic in a binary computer: one's-complement or two's-complement? Why? Include all of the arguments you can think of for and against your answer. (b) oes the state-machine opposite have any equivalent states? If so, which states are equivalent? Show all working. (c) esign a 4-bit ripple up-counter using positive edgetriggered flip flops and a minimum number of combinational logic gates. Show the schematic diagram. / a / / c d / / b / / / (a) (pts) One's or two's complement? Why? 's complement + easier to do addition and subtraction (sum of -ve #s) (can be done in one byte-serial pass) + single representation for - must add for making -ve #s (continue on reverse if necessary) (b) (pts) Equivalent states: a = b b c d a a c c X a b a c X a b a c X a b c (additional space for solutions on reverse) uiz Page of 6 CS 5 - Sp. 98
.(c) (pts) 4-bit ripple up-counter CLK Additional space for Problem CS 5 - Sp. 98 Page 4 of 6 uiz
Your Name:. (4 pts) esign a Moore machine that detects the number 9 encoded in binary ( ) and in excess- ( ). The machine should reset after each detection (i.e. overlapping sequences are ignored). Sample input (X) and output (Z) sequences are given below: X= Z= (a) raw a state transition diagram for the Moore machine. (b) Use an implication table to determine if any states are equivalent. If so, list the equivalent states and then redraw your (now minimized) state diagram. (c) Using flip-flops and the state-assignment rules discussed in class, indicate all adjacency constraints for an optimal state encoding and determine an optimal encoding, listing the state codes for each state in the machine. (d) Write equations for the next-state logic only (not the output logic) using a minimal NOR-NOR two-level representation.. (a) (pts) State transition graph: Original After reduction (if changed) One answer (framed) S S S S 4 S S 5 S 6 No change. (b) (5pts) Implication table: normal table with no equivalent states (5pts) Equivalent States: None (additional space for solutions on reverse) uiz Page 5 of 6 CS 5 - Sp. 98
. (c) (5pts) Adjacency constraints: Rule : {S, S, S 6 },{S, S 4, S 5 }, {S, S 6 } Rule {S, S },{S, S 4 }, {S, S },{S, S 6 }, {S, S 5 } Rule : {S, S, S, S, S 4, S 5 } (5 pts) Optimal state assignment (show Karnaugh map) B C A 4 S 6 S 5 S 5 7 B S S S S 4 6 C State codes: S =, S =, S =, S =, S 4 =, S 5 =, S 6 =. (d) (pts) Next-state logic in NOR-NOR form (equations only!): A = ( B + C ) + ( C + X) + ( B + C ) + ( A + C ) = + X ) + ( + ) + ( + X ) + ( + + ) B ( A A B A A B C = ( + ) + ( + X ) + ( X ) C A B B C + Additional space for Problem CS 5 - Sp. 98 Page 6 of 6 uiz