ECE380 Digital Logic
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1 ECE38 igital Logic Flip-Flops, Registers and Counters: Flip-Flops r.. J. Jackson Lecture 25- Flip-flops The gated latch circuits presented are level sensitive and can change states more than once during the active period of the signal Circuits (storage elements) that can change their state no more than once during a period are also useful Two types of circuits with such behavior Master-slave flip-flip Edge-triggered flip-flop r.. J. Jackson Lecture 25-2
2 Master-slave flip-flop Consists of 2 gated latches The first, master, changes its state while = The second, slave, changes its state while = Master Slave m s Clk Clk 38 transistors r.. J. Jackson Lecture 25-3 Master-slave flip-flop When =, the master tracks the values of the input signal and the slave does not change Thus m follows any changes in and s remains constant When the signal changes to, the master stage stops following the changes in the input signal At the same time, the slave stage responds to the value of m and changes states accordingly Since m does not change when =, the slave stage undergoes at most one change of state during a cycle From an output point of view, the circuit changes s (its output) at the negative edge of the signal r.. J. Jackson Lecture
3 Master-slave flip-flop m = s r.. J. Jackson Lecture 25-5 Edge-triggered flip-flop A circuit, similar in functionality to the master-slave flip-flop, can be constructed with 6 NAN gates P3 P 2 5 P2 6 3 Positive-edge-triggered type flip-flop 4 P4 24 transistors r.. J. Jackson Lecture
4 Edge-triggered flip-flop The previous circuit responds on the positive edge of the signal A negative-edge triggered flip-flop can be constructed by replacing the NAN with NOR gates Positive-edge-triggered type flip-flop Negative-edge-triggered type flip-flop r.. J. Jackson Lecture 25-7 Comparing storage elements a clk b a b c c r.. J. Jackson Lecture
5 Clear and preset inputs It may be desirable to specifically set (=) or clear (=) a flip-flop Practical flip-flops often have preset and clear inputs Generally, these inputs are asynchronous (they do not depend on the signal) Preset As long as Preset =, = Clear As long as Clear =, = r.. J. Jackson Lecture 25-9 T flip-flop Another flip-flop type, the T flip-flop, can be derived from the basic flip-flop presented Feedback connections make the input signal equal to the value of or under control of a signal labeled T T r.. J. Jackson Lecture 25-5
6 T flip-flop The name T derives from the behavior of the circuit, which toggles its state when T= This feature makes the T flip-flop a useful element when constructing counter circuits T (t+) (t) (t) T T Positive edge triggered r.. J. Jackson Lecture 25- JK flip-flop The JK flip-flop can also be derived from the basic flip-flop such that =J +K The JK flip-flop combines aspects of the SR and the T flip-flop It behaves as the SR flip-flop (where J=S and K=R) for all values except J=K= For J=K=, it toggles like the T flip-flop r.. J. Jackson Lecture
7 JK flip-flop J K J K (t+) (t) (t) J K Positive edge triggered r.. J. Jackson Lecture 25-3 JK flip-flop timing diagram Complete the following timing diagram Clk K J Time r.. J. Jackson Lecture
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