DIGITAL LOGIC DESIGN

Transcription

1 Roll. No: SHANKERSINH VAGHELA BAPU INSTITUTE OF TECHNOLOGY DIGITAL LOGIC DESIGN LABORATORY MANUAL B.E. 3 rd SEMESTER SHANKERSINH VAGHELA BAPU INSTITUTE OF TECHNOLOGY Gandhinagar-Mansa Road, PO. Vasan, Gandhinagar District, Gujarat, Pin

2 INDEX Sr. No. Title Page Date Sign Grade 1. Verification of basic logic gates and implementation with NAND / NOR gates. /10 2. Realization of half and full adder and half & full subtractor. /10 3. Design and realization of binary to gray code converter. /10 4. Study of multiplexer and realization of Boolean function using it. /10 5. To design binary to seven segments LED display circuit. /10 6. Verification of truth tables of RS, D, JK and T flip flops. /10 7. To design and realize modulo N Synchronous counter using JK flip-flops. /10 8. To design and realize modulo N Ripple counter using T flip flops. /10 9. To realize shift register. /10 1

3 Roll No: Date: / /20 Exp. No.: 1. Title : Logic Gates AIM : [1] To verify truth tables of basic gates. [2] To realize all basic gates using NAND gates only. EQUIPMENTS: [1] Logic trainer [2] IC 7400, [3] IC7402, [4] IC7408, [5] IC7432, [6] IC7486, [7] Connecting wires. THEORY: A gate is a logic circuit that has one or more inputs and one or more outputs. The output of the gate will depend upon the set of input conditions. The digital signal has two distinct states LOW (0) and HIGH (1). Using gates we can implement variety of logic circuit that performs a particular task. For an example we can implement various arithmetic, logical and control units depending upon our requirements. Various types of gates are described below. [1] NOT Gate: This gate has one input and one output. This gate inverts input at the output. When input is LOW output is HIGH and vice versa. BOOLEAN EXPRESSION: Y = TRUTH TABLE: LOGIC SYMBOL A Y [2] AND Gate: This gate has two or more inputs and one output. Output of AND gate will go HIGH when all inputs are HIGH, otherwise output will remain LOW. BOOLEAN EXPRESSION: Y = TRUTH TABLE: LOGIC SYMBOL A B Y 2

4 [3] OR Gate: This gate has two or more inputs and one output. Output of OR gate will go HIGH when Any of the input is HIGH; output is LOW when all inputs are LOW. BOOLEAN EXPRESSION: Y = TRUTH TABLE: LOGIC SYMBOL A B Y [4] XOR Gate: This gate has two or more inputs and one output. Output will go HIGH when all inputs are not of the same logic level (i.e. all inputs are not LOW or not HIGH at a time). BOOLEAN EXPRESSION: Y = TRUTH TABLE: LOGIC SYMBOL A B Y [5] NAND Gate: If we put one inverter at the output of AND logic gate will be NAND gate. BOOLEAN EXPRESSION: Y = TRUTH TABLE: LOGIC SYMBOL A B Y 3

5 [6] NOR Gate: If we put one inverter at the output of OR gate resulting logic gate will be not NOR gate. BOOLEAN EXPRESSION: Y = TRUTH TABLE: LOGIC SYMBOL A B Y PROCEDURE: [1] Select appropriate IC for each logic gate. [2] Get the pin diagram from data book and make the connections according to the requirements. [3] Make sure the connections of Vcc and ground are at their respective pins. [4] Switch on the power and apply sequence of inputs and observe outputs. CONCLUSION: 4

6 Answer the following question. Shankersinh Vaghela Bapu Institute Of Technology. [1] "NAND and NOR gates are universal gates." Justify. [2] What is TTL logic levels for HIGH and LOW states? [3] What is positive logic and negative logic? [4] Define term (a)propagation Delay (b)fan In/Out (c)power dissipation 5

7 V CC + V CC GND GND V CC 7402 GND V CC 7432 GND V CC 7404 GND V CC 7486 GND FIG. : BASIC DIGITAL IC's 6

8 Roll No: Date: / /20 Exp. No.: 2. Title : Binary Arithmetic Circuits. AIM : To realize binary half adder, full adder, half subtractor, and full subtractor. EQUIPMENTS: [1] Logic trainer [2] IC 7408 [3] IC 7432 [4] IC 7486 [5] Connecting wires. THEORY: Digital computers perform variety of information processing task. Among the basic functions encountered are the various types of arithmetic operations. Here we will see how these operations can be performed using digital hardware. (1) Half adder: This adder adds only two bits and carry from the previous stage will not be added. The outputs of the adder are SUM and CARRY. Truth table of half adder is given below. TRUTH TABLE: A B S Co Expression for Sum and Carry Out: S = A'B + AB' = A + B and Co = AB (2) Full adder: This adder adds two bits and carries from the previous stage. The outputs of the adder are SUM and CARRY. Truth table and simplified expression for sum and carry are given below. TRUTH TABLE: A B C i S Co 7

9 EXPRESSION FOR SUM AND CARRY OUT: S = A'B'Ci + A'BCi' + AB'Ci' + ABCi = A + B + C and Co = AB + BCi + ACi (3) Half subtractor: This subtractor subtracts one bit from another but ignores any borrow from the previous stage. The outputs of the half adder are DIFFERENCE and BORROW. Truth table and expression for difference and borrow are given below. TRUTH TABLE: A B D Bo EXPRESSION FOR DIFFERENCE AND BORROW OUT: D = A B + AB' = A + B and Bo = A'B (4) Full subtractor: This subtractor subtracts binary digits along with borrow from the previous stage. The outputs of the subtractor are difference and borrow out. TRUTH TABLE: A B Bi D Bo EXPRESSION FOR DIFFERENCE AND BORROW OUT: D = A'B'Bi + A'BBi' + AB'Bi' + ABBi = A + B + C and Bo = A B + A'Bi + BBi PROCEDURE: [1] From the Boolean expression draw the logic diagram using suitable gates. [2] Select suitable ICs to implement the Boolean functions [3] Connect circuit and switch on the power supply. [4] Apply set of inputs and observe output and note down the logic state in table. 8

10 BINARY HALF ADDER Shankersinh Vaghela Bapu Institute Of Technology. BINARY FULL ADDER BINARY HALF SUBTRACTOR BINARY HALF SUBTRACTOR CONCLUSION: 9

11 Answer the following questions: [1] What is the difference between binary full adder and half adder? [2] Develop logic to multiply two binary numbers. [3] Develop logic to divide two binary numbers. [4] Implement full adder using half adders. [5] Design a ckt which performs both functions adder/sub. Using a mode control switch? 10

12 Roll No: Date: / /20 Exp. No.: 3. Title : Code Converter. AIM : Design and realization of Binary to Gray code converter. EQUIPMENTS: [1] Logic trainer, [2] LEDs, [3] digital IC 7486, [4] Connecting wires. THEORY: Computers and other digital circuits are required to handle data which may be numeral, alphabet or special character. Since digital circuit in binary fashion, the numerals, alphabets and other special characters are required to be converted into binary format. There are various possible ways of doing this which is called encoding. Some commonly used binary codes are BCD, Excess-3, Gray, etc.. Many physical systems provide continuous data at their output. This data must be converted in to digital form before they are applied to a digital system. Continuous analog information is converted to digital form by means of analog to digital converter. Here it is useful to use the reflected (or gray) code to represent digital data converted from analog data. The advantage of reflected code over pure binary number is that the reflected code changes only by one bit as it proceeds from one number to the next. PROCEDURE: [1] Write down the code conversion table. Simplify Boolean function for each bit using K- map. [2] Select appropriate ICs to realize the simplified Boolean function. [3] Switch ON the power supply. [4] Apply appropriate set of inputs and observe the output. 11

13 OBSERVATION: DEC. BINARY GRAY NO. B3 B2 B1 B0 G3 G2 G1 G CONCLUSION: 12

14 Answer the following question. [1] Why data need to be coded? [2] What is weighted code? [3] Give one examples of non weighted code. [4] Design code converter ckt using mode control switch which performs both function Gray to Binary and Binary to Gray. [5] What is self complementary code? Give example and justify it. [6] Develop a ckt to convert 2461 code to 2's complement of it. [7] Develop a circuit to convert 2461 code to 8241 code. 13

15 Roll No: Date: / /20 Exp. No.: 4. Title : Multiplexer. AIM : To realize Boolean function using multiplexer. EQUIPMENTS: [1] Trainer Board [2] IC [3] IC 7404 [4] Connecting wires. THEORY: Multiplexing means transmitting a large number of information units over a smaller number of channels or lines. Multiplexer is a combinational circuit that selects binary information from one of the many input lines and directs it to a single output line. The selection of a particular input line is controlled by a set of selection lines. Normally for 2 n input lines whose bit combinations determine the input line to be selected. PROCEDURE: [1] First write down the Boolean function of interest in minterm form. [2] Design it using multiplexer of appropriate size. [3] Connect the circuit. [4] Observe the output levels and note down the logic level in table. OBSERVATION: Y (A, B, C, D) = ( ) MINTERMS A B C D Y

16 CONCLUSION: Answer the following questions: [1] List a practical system which uses multiplexes. [2] Why multiplexer is needed? [3] What is difference between decoder and demultiplexer? [4] Develop a Full subtractor ckt using line Mux. [5] "Multiplexer can be used to minimize hard ware and space Justify the statement. 15

17 FIG. : 4-1 CIRCUIT DIAGRAM OF MULTIPLEXER 16

18 Roll No: Date: / /20 Exp. No.: 5. Title : Interfacing Of Display Devices. AIM : To design BCD to seven segment decoder. EQUIPMENTS: [1] Logic trainer, [2] IC 7447, [3] seven segment LED display [4] Connecting wires. THEORY: In digital systems like computers, calculators seven segment displays are used, in which digits are displayed, using LEDs. Display devices provide useful interface between human and digital processing circuits. The digital circuit designed to perform particular task will contain set of input and then input will generate output which depends upon the digital logic. This output is however in the coded form which cannot be understood by unskilled user easily. If we decode this output in form which can be understood easily by a layman then our circuit or product will become more versatile and easy to use. For this purpose we can use decoder and its output is given to display device through driver. Here in this experiment we will be using BCD to seven segment decoder driver (7447) to convert BCD data to decimal equivalent number. CODE TABLE: INPUTS OUTPUT BIT PATTERN CODE A B C D a b c d e f g h PROCEDURE: [1] Connect the display circuit to the four input terminals. [2] Apply logic 0 or logic 1 signal according to input bit pattern. [3] Observe the output display of 0 to 9. 17

19 CONCLUSION: Answer the following question. [1] What is a decoder? [2] Why we need driver along with decoder to interface LEDs? [3] Give all steps of generating BCD to equivalent seven segment code. [4] List name of some other display devices which are frequently used in daily life. [5] What is LCD? How it differs from LEDs? 18

20 Roll No: Date: / /20 Exp. No: 6. Title : Flip-Flops. AIM : To verify characteristic tables of RS, JK, D and T flip-flops. EQUIPMENTS: [1] Logic trainer Board, [2] IC 7400, [3] IC74112, [4] Connecting wires. THEORY: Logic circuits are classified into two groups namely combinational and sequential. a combinational circuit consists of logic gates whose output at any time is determined directly from the present combination of inputs without regard to previous inputs. Sequential circuits involve timing and memory devices. The external inputs along with state of memory elements determine the binary value at the output terminals of the sequential circuit. Thus a sequential circuit is specified by a time sequence of inputs, outputs and internal states. [1] R-S FLIP-FLOP: It has two inputs R (Reset) & S (Set). The two outputs are Q & Q'. The two outputs are always complimentary. The truth table is as below. S R Q ( t ) Q ( t + 1 ) * * Q (t) = Present Output, Q (t + 1) = Next output, * = Invalid condition. [2] J-K FLIP- FLOP: J-K flip-flop is refinement of the R-S flip-flop in that the indeterminate state of R-S type is defined in the J-K flip-flop. Inputs J & K behave like S & R of R-S flip-flop. 19

21 When inputs are applied to both J & K simultaneously, the flip flop switches to its complement state, i.e., if Q = 0 it switches to Q = 0, and vice versa. The truth table is as below. J K Q ( t ) Q ( t + 1 ) [3] T FLIP- FLOP: The T flip-flop is single input version of the J-K flip flop. The T flip-flop is obtained from J-K type if both the inputs are tied together. The designation T comes from the ability of the flip-flop to toggle the current state. Regardless of the present state of the flip-flop, it assumes the complement state when the clock pulse occurs while input T is at logic 1. The truth table is as below. T Q ( t ) Q ( t + 1 ) [4] D FLIP-FLOP: D flip-flop transfers its input data to the output when clock will hit to the flip flop. This flip-flop is use to latch data and hold it till next clock comes. It is used in implementation of shift registers and counters. The truth table is as below. D Q ( t ) Q ( t + 1 ) PROCEDURE: [1] Select appropriate IC for each logic gate. [2] Get the pin diagram from the data book and do the connections accordingly. [3] Switch on the power supply. [4] Verify the truth table. CONCLUSION: 20

22 Answer the following question. [1] What is the difference between combinational and sequential circuits? [2] What is the need of the clock in sequential circuits? [3] What is the difference between flip flop and latch? [4] What is race around problem in the JK flip flops? What is the reason behind this problem? [5] What is difference between event driven circuits and clocked driven circuits? 21

23 Roll No: Date: / /20 Exp. No: 7. Title : Synchronous Counter. AIM : To design and realize modulo 10 binary synchronous counter using J-K flip-flops. EQUIPMENTS: [1] Logic trainer Board [2] IC74112 [3] IC7432, [4] IC7408 [5] IC7400 [6] Connecting wires. THEORY: A sequential circuit that goes through a prescribed sequence of states on application of input pulses is called a counter. The input pulses may be count pulses, may be clock pulses or they may originate from an external source and may occur at prescribed intervals of time or at random. In a counter, the sequence of states may follow a binary count or any other sequence of states. Such counters are used for counting the number of occurrence of an event and are useful for generating timing sequence to control operations in a digital system. The number of distinct states through which counter passes before it starts its count sequence again, is known as modulus of the counter. A counter that follows binary sequences called binary counter. An N-bit binary counter consists of N-flip flops and can count from 0 to (2n - 1). Mainly digital counters are of two types: SYNCHRONOUS COUNTER: In this same clock pulse is applied to all the flip-flops. RIPPLE COUNTER: In this type of counter clock pulse is applied only to the first flip-flop and the ripples at the output of flip-flops serve as clock to the next flip-flops. PROCEDURE: [1] Select the desired value of N, i.e. modulo N-counter. [2] Estimate minimum no. of JK flip-flops required to implement the counter. [3] Draw the state diagram and state table. [4] Derive input function expression for input of various flip-flops. [5] Draw the logic diagram for the counter. [6] Connect the circuit according to the logic diagram using various digital ICs. [7] Switch on the power apply clock pulse, observe and note down the output sequence. 22

24 OBSERVATION: N = COUN T Q 8 Q 4 Q 2 Q 1 CONCLUSION: 23

25 Answer the following questions: [1] What are the applications of counters? Shankersinh Vaghela Bapu Institute Of Technology. [2] What is synchronous counter? [3] What is modulo of counter? [4] How many JK flip flops are required to implement modulo 83 counters? [5] What is difference between timer and counter? 24

26 Roll No: Date: / /20 Exp. No: 8. Title : Ripple Counter. AIM : To design and realize modulo N ripple counter using T flip-flops. EQUIPMENTS: [1] Logic trainer Board, [2] IC [3] IC7432, [4] IC7408, [5] IC7400, [6] Connecting wires. THEORY: Ripple counter is also known as divide by N counter or asynchronous counter. In this counter same clock pulse is not applied to all flip-flops hence this counter is known as asynchronous counter. Since ripples at the output of one flip-flop trigger the next flip-flop, it is known as ripple counter. Every stage of this counter divides its input frequency by two in the output hence is known as divide by N counter. PROCEDURE: [1] Select the desired value of N, i.e. modulo N-counter. [2] Estimate minimum no. of JK flip-flops required to implement the counter. [3] Draw the state diagram and state table. [4] Derive Boolean function expression for CLR input of various flip-flops. [5] Draw the logic diagram for the counter. [6] Connect the circuit according to the logic diagram using various digital ICs. [7] Switch on the power apply clock pulse, observe and note down the output sequence. 25

27 OBSERVATION: N = CONCLUSION: COUNT Q 8 Q 4 Q 2 Q Answer the following question. [1] What is the difference between synchronous and ripple counter? 26

28 [2] What is difference between Timer and Counter? [3] How many JK flip-flops are required to implement modulo 5 counter? [4] What are applications of counters? [5] What is up counter and down counter? [6] Find out the general equation for N-bit up/down counter and draw a circuit diagram which will perform both functions using selection line logic. 27

29 Roll No: Date: / /20 Exp. No.: 9. Title : Shift Registers AIM : To study universal shift register. EQUIPMENTS: [1] Logic trainer [2] IC [3] Connecting wires [4] CRO. THEORY: A flip flop can store one bit of datum. It is also referred as a 1-bit register. An array of flip flop is required to store binary information and the number of flip flops required is equal to the number of bits in the binary word and is referred as a register. Registers find applications in a variety of digital systems including microprocessors. A typical example of a shift register at work is found within a calculator. As we enter each digit on the keypad, the number shifts to the left on the display. In other words, each cell is a temporary memory and thus holds the number on the display even after the release of the key. It also shifts the number to the left each time a next key is pressed. This memory and shifting characteristic make the shift register extremely valuable in most digital electronic systems. We can classify the registers according to the way data they take from and the data they deliver to the external circuits. [1] Serial in serial out registers: Here data is taken serially one bit at a time and data is placed serially on the external line. [2] Serial in parallel out registers: In this type of registers the data is accepted serially and data is placed simultaneously on the external bus. [3] Parallel in serial out registers: The data is loaded simultaneously and data is taken from the register one by one bit at time. [4] Parallel in parallel out registers: The data is loaded simultaneously and is taken out simultaneously from the shift register. Registers can be further classified according to the data shifting direction; they may be shift left registers or shift right registers. 28

30 UNIVERSAL SHIFT REGISTER (IC 74194): This bi-directional shift register is designed to incorporate virtually all of the features a system designer may want. It has four distinct modes of operation, namely (1) Parallel load (2) Shift right (3) Shift left (4) Inhibit clock (do nothing). MODE CONFIGURATION TABLE: PROCEDURE: S1 S0 MODE [1] Select appropriate for the shift register. [2] Connect 0 & +5 volt D.C. supply to the IC. Select particular mode with proper logic level at S1 and S0. [3] Apply clock pulse and sequence of input bits and observe the output sequence. [4] Prepare the timing diagram and operation table for all possible modes. CONCLUSION: 29

31 Answer the following questions: Shankersinh Vaghela Bapu Institute Of Technology. [1] Give few examples of practical systems which use shift registers. [2] "Shift register can be used to provide timing delay." Justify the statement. [3] "Shift registers can be used as a memory." Justify the statement. [4] What do you mean by universal shift register? [5] Why we need serial to parallel and parallel to serial conversion? [6] Can one use shift register as time delay device? If yes how? 30