RF Power Field Effect Transistors N--Channel Enhancement--Mode Lateral MOSFETs

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1 Technical Data RF Power Field Effect Transistors N--Channel Enhancement--Mode Lateral MOSFETs Designed for CDMA base station applications with frequencies from 1930 to 1990 MHz. Can be used in Class AB and Class C for all typical cellular base station modulation formats. Typical Single--Carrier W--CDMA Performance: V DD =28Volts,I DQ = 1400 ma, P out = 63 Watts Avg., f = MHz, IQ Magnitude Clipping, Channel Bandwidth = 3.84 MHz, Input Signal PAR = % Probability on CCDF. Power Gain 20 db Drain Efficiency 29% Device Output Signal PAR % Probability on CCDF 5 MHz Offset --33 dbc in 3.84 MHz Channel Bandwidth Capable of Handling 5:1 32 Vdc, 1960 MHz, 190 Watts CW Output Power (3 db Input Overdrive from Rated P out ) Typical P 1 db Compression Point 190 Watts CW Features 100% PAR Tested for Guaranteed Output Power Capability Characterized with Series Equivalent Large--Signal Impedance Parameters Internally Matched for Ease of Use Integrated ESD Protection Greater Negative Gate--Source Voltage Range for Improved Class C Operation Designed for Digital Predistortion Error Correction Systems RoHS Compliant In Tape and Reel. R3 Suffix = 250 Units, 56 mm Tape Width, 13 inch Reel. Document Number: MRF7S19210H Rev. 1, 3/2011 MRF7S19210HR3 MRF7S19210HSR MHz, 63 W AVG., 28 V SINGLE W -CDMA LATERAL N -CHANNEL RF POWER MOSFETs CASE , STYLE 1 NI -780 MRF7S19210HR3 CASE 465A -06, STYLE 1 NI -780S MRF7S19210HSR3 Table 1. Maximum Ratings Rating Symbol Value Unit Drain--Source Voltage V DSS --0.5, +65 Vdc Gate--Source Voltage V GS --6.0, +10 Vdc Operating Voltage V DD 32, +0 Vdc Storage Temperature Range T stg --65 to +150 C Case Operating Temperature T C 150 C Operating Junction Temperature (1,2) T J 225 C Table 2. Thermal Characteristics Characteristic Symbol Value (2,3) Unit Thermal Resistance, Junction to Case Case Temperature 85 C, 190 W CW Case Temperature 79 C, 63 W CW R θjc C/W 1. Continuous use at maximum temperature will affect MTTF. 2. MTTF calculator available at Select Software & Tools/Development Tools/Calculators to access MTTF calculators by product. 3. Refer to AN1955, Thermal Measurement Methodology of RF Power Amplifiers. Go to Select Documentation/Application Notes -- AN1955., Inc., 2008, All rights reserved. 1

2 Table 3. ESD Protection Characteristics Test Methodology Human Body Model (per JESD22--A114) Machine Model (per EIA/JESD22--A115) Charge Device Model (per JESD22--C101) Class 1C (Minimum) A (Minimum) IV (Minimum) Table 4. Electrical Characteristics (T A =25 C unless otherwise noted) Characteristic Symbol Min Typ Max Unit Off Characteristics Zero Gate Voltage Drain Leakage Current (V DS =65Vdc,V GS =0Vdc) Zero Gate Voltage Drain Leakage Current (V DS =28Vdc,V GS =0Vdc) Gate--Source Leakage Current (V GS =5Vdc,V DS =0Vdc) On Characteristics Gate Threshold Voltage (V DS =10Vdc,I D = 513 μadc) Gate Quiescent Voltage (V DS =28Vdc,I D = 1400 madc) Fixture Gate Quiescent Voltage (1) (V DD =28Vdc,I D = 1400 madc, Measured in Functional Test) Drain--Source On--Voltage (V GS =10Vdc,I D =5.13Adc) Dynamic Characteristics (2) Reverse Transfer Capacitance (V DS =28Vdc± 30 1 MHz, V GS =0Vdc) Output Capacitance (V DS =28Vdc± 30 1 MHz, V GS =0Vdc) Input Capacitance (V DS =28Vdc,V GS =0Vdc± 30 1 MHz) I DSS 10 μadc I DSS 1 μadc I GSS 1 μadc V GS(th) Vdc V GS(Q) 2.7 Vdc V GG(Q) Vdc V DS(on) Vdc C rss 2.17 pf C oss 257 pf C iss 508 pf Functional Tests (In Freescale Test Fixture, 50 ohm system) V DD =28Vdc,I DQ = 1400 ma, P out = 63 W Avg., f = MHz, Single--Carrier W--CDMA, IQ Magnitude Clipping, Input Signal PAR = % Probability on CCDF. ACPR measured in 3.84 MHz Channel ±5 MHzOffset. Power Gain G ps db Drain Efficiency η D % Output Peak--to--Average 0.01% Probability on CCDF PAR db Adjacent Channel Power Ratio ACPR dbc Input Return Loss IRL db 1. V GG =2xV GS(Q). Parameter measured on Freescale Test Fixture, due to resistive divider network on the board. Refer to Test Circuit schematic. 2. Part internally matched both on input and output. (continued) 2

3 Table 4. Electrical Characteristics (T A =25 C unless otherwise noted) (continued) Characteristic Symbol Min Typ Max Unit Typical Performances (In Freescale Test Fixture, 50 ohm system) V DD =28Vdc,I DQ = 1400 ma, MHz Bandwidth IMD 160 W PEP, P out where IMD Third Order IMD sym Intermodulation 30 dbc (Delta IMD Third Order Intermodulation between Upper and Lower Sidebands > 2 db) 15 VBW Resonance Point (IMD Third Order Intermodulation Inflection Point) MHz VBW res 50 MHz Gain Flatness in 60 MHz P out =63WAvg. G F 0.9 db Average Deviation from Linear Phase in 60 MHz out = 190 W CW Φ 0.95 Average Group P out = 190 W CW, f = 1960 MHz Delay 2.82 ns Part--to--Part Insertion Phase P out = 190 W CW, f = 1960 MHz, Six Sigma Window Gain Variation over Temperature (--30 C to+85 C) Output Power Variation over Temperature (--30 C to+85 C) Φ 28.9 G db/ C P1dB db/ C 3

4 R1 Z22 V BIAS R2 C1 C2 C3 Z20 C10 C11 C12 C21 + V SUPPLY R3 RF INPUT Z1 Z2 Z3 Z4 Z5 Z6 Z7 Z8 Z19 Z10 Z9 Z11 Z12 Z13 Z14 Z15 C14 Z16 Z17 C16 Z18 RF OUTPUT C4 C5 C6 Z21 DUT Z23 C13 C15 C17 + C9 C8 C7 C18 C19 C20 C22 Z1 Z2 Z3 Z4 Z5 Z6 Z7 Z8 Z9 Z10 Z11 Z x Microstrip x Microstrip x Microstrip x Microstrip x0.118 Microstrip x0.118 Microstrip x Microstrip x Microstrip x Microstrip x Microstrip x Microstrip x Microstrip Z x Microstrip Z x Microstrip Z x Microstrip Z x Microstrip Z x Microstrip Z x Microstrip Z x Microstrip Z x Microstrip Z x Microstrip Z22, Z x Microstrip PCB Taconic RF35, 0.030, ε r =3.5 Figure 1. MRF7S19210HR3(HSR3) Test Circuit Schematic Table 5. MRF7S19210HR3(HSR3) Test Circuit Component Designations and Values Part Description Part Number Manufacturer C1, C9, C11, C12, C19, C20 10 μf, 50 V Chip Capacitors C5750X5R1H106M TDK C2, C8 100 nf Chip Capacitors 12065C104KAT2A AVX C3, C6, C7, C10, C14, C15, 8.2 pf Chip Capacitors ATC100B8R2BT500XT ATC C18 C4 0.2 pf Chip Capacitor ATC100B0R2BT500XT ATC C5 1.8 pf Chip Capacitor ATC100B1R8BT500XT ATC C pf Chip Capacitor ATC100B0R4BT500XT ATC C16, C pf Chip Capacitors ATC100B0R5BT500XT ATC C21, C μf Electrolytic Capacitors Vishay BC Components R1, R2 10 kω, 1/4 W Chip Resistors WCR120610KFI Welwyn R3 10 Ω, 1/4 W Chip Resistor WCR120610RFI Welwyn 4

5 C1 C2 C10 R1 R2 C3 C11 C12 C21 C4 C5 C6 R3 CUT OUT AREA C13 C14 C15 C16 C17 C8 C7 C19 C20 C22 C9 C18 MRF7S19210H Rev 0 Figure 2. MRF7S19210HR3(HSR3) Test Circuit Component Layout 5

6 TYPICAL CHARACTERISTICS G ps η D V DD =28Vdc,P out =63W(Avg.) I DQ = 1400 ma Single--Carrier W--CDMA, 3.84 MHz Channel Bandwidth Input Signal PAR = % Probability on CCDF PARC IRL ACPR f, FREQUENCY (MHz) Figure 3. Output Peak -to -Average Ratio Compression (PARC) Broadband P out = 63 Watts Avg. G ps, POWER GAIN (db) η D, DRAIN EFFICIENCY (%) ACPR (dbc) IRL, INPUT RETURN LOSS (db) PARC (db) G ps, POWER GAIN (db) I DQ = 2100 ma 1750 ma 1050 ma 1400 ma 700 ma V DD =28Vdc f = 1960 MHz P out, OUTPUT POWER (WATTS) CW Figure 4. Power Gain versus Output Power IMD, INTERMODULATION DISTORTION (dbc) V DD =28Vdc,P out = 160 W (PEP), I DQ = 1400 ma Two--Tone Measurements (f1 + f2)/2 = Center Frequency of 1960 MHz IM7--L IM5--U IM5--L IM3--U IM3--L IM7--U TWO--TONE SPACING (MHz) Figure 5. Intermodulation Distortion Products versus Two -Tone Spacing G ps, POWER GAIN (db) OUTPUT COMPRESSION AT 0.01% PROBABILITY ON CCDF (db) db = W η D G ps PARC ACPR --2 db = W --4 V DD =28Vdc,I DQ = 1400 ma, f = 1960 MHz 20 Single--Carrier W--CDMA, 3.84 MHz Channel Bandwidth Input Signal PAR = % Probability on CCDF P out, OUTPUT POWER (WATTS) --3 db = W Figure 6. Output Peak -to -Average Ratio Compression (PARC) versus Output Power η D, DRAIN EFFICIENCY (%) ACPR (dbc) 6

7 TYPICAL CHARACTERISTICS G ps, POWER GAIN (db) V DD =28Vdc,I DQ = 1400 ma, f = 1960 MHz Single--Carrier W--CDMA, 3.84 MHz Channel Bandwidth T C =--30_C 85_C 25_C G ps --30_C 25_C 85_C Input Signal PAR = % 16 Probability on CCDF 20 ACPR 85_C 25_C _C η D P out, OUTPUT POWER (WATTS) AVG. Figure 7. Single -Carrier W -CDMA Power Gain, Drain Efficiency and ACPR versus Output Power η D, DRAIN EFFICIENCY (%) ACPR (dbc) Gain GAIN (db) IRL (db) 0 V DD =28Vdc --8 P out =9dBm IRL I DQ = 1400 ma f, FREQUENCY (MHz) Figure 8. Broadband Frequency Response 7

8 W -CDMA TEST SIGNAL PROBABILITY (%) Input Signal W--CDMA. ACPR Measured in 3.84 MHz Channel ±5 MHzOffset. Input Signal PAR = % Probability on CCDF PEAK--TO--AVERAGE (db) Figure 9. CCDF W -CDMA IQ Magnitude Clipping, Single -Carrier Test Signal 10 (db) ACPR in 3.84 MHz Integrated BW 3.84 MHz Channel BW +ACPRin3.84MHz Integrated BW f, FREQUENCY (MHz) Figure 10. Single -Carrier W -CDMA Spectrum 8

9 Z o =5Ω f = 2040 MHz f = 2040 MHz Z source f = 1880 MHz Z load f = 1880 MHz f MHz V DD =28Vdc,I DQ = 1400 ma, P out =63WAvg. Z source Ω Z load Ω j j j j j j j j j j j j j j j j j j0.49 Z source = Test circuit impedance as measured from gate to ground. Z load = Test circuit impedance as measured from drain to ground. Input Matching Network Device Under Test Output Matching Network Z source Z load Figure 11. Series Equivalent Source and Load Impedance 9

10 ALTERNATIVE PEAK TUNE LOAD PULL CHARACTERISTICS P out, OUTPUT POWER (dbm) P1dB = dbm (272 W) P3dB = dbm (337 W) V DD =28Vdc,I DQ = 1400 ma, Pulsed CW 10 μsec(on), 10% Duty Cycle, f = 1930 MHz Ideal Actual P out, OUTPUT POWER (dbm) P1dB = dbm (269 W) P3dB = dbm (335 W) V DD =28Vdc,I DQ = 1400 ma, Pulsed CW 10 μsec(on), 10% Duty Cycle, f = 1990 MHz Ideal Actual P in, INPUT POWER (dbm) NOTE: Load Pull Test Fixture Tuned for Peak P1dB Output 28 V P in, INPUT POWER (dbm) NOTE: Load Pull Test Fixture Tuned for Peak P1dB Output 28 V Test Impedances per Compression Level Test Impedances per Compression Level Z source Ω Z load Ω Z source Ω Z load Ω P1dB j j0.69 P1dB j j046 Figure 12. Pulsed CW Output Power versus Input MHz Figure 13. Pulsed CW Output Power versus Input MHz 10

11 PACKAGE DIMENSIONS 11

12 12

13 13

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15 PRODUCT DOCUMENTATION AND SOFTWARE Refer to the following documents and software to aid your design process. Application Notes AN1955: Thermal Measurement Methodology of RF Power Amplifiers Engineering Bulletins EB212: Using Data Sheet Impedances for RF LDMOS Devices Software Electromigration MTTF Calculator RF High Power Model For Software, do a Part Number search at and select the Part Number link. Go to the Software & Tools tab on the part s Product Summary page to download the respective tool. The following table summarizes revisions to this document. REVISION HISTORY Revision Date Description 0 Dec Initial Release of Data Sheet 1 Mar Modified data sheet to reflect RF Test Reduction described in Product and Process Change Notification number, PCN13628, p. 1, 2 Fig. 9, MTTF versus Junction Temperature removed, p. 7. Refer to the device s MTTF Calculator available at freescale.com/rfpower. Go to Design Resources > Software and Tools. Fig. 10, CCDF W--CDMA IQ Magnitude Clipping, Single--Carrier Test Signal and Fig. 11, Single--Carrier W--CDMA Spectrum updated to show the undistorted input test signal, p. 8 (renumbered as Figs. 9 and 10 respectively after Fig. 9 removed) Added Electromigration MTTF Calculator and RF High Power Model availability to Product Software, p

16 How to Reach Us: Home Page: Web Support: USA/Europe or Locations Not Listed:, Inc. Technical Information Center, EL East Elliot Road Tempe, Arizona or Europe, Middle East, and Africa: Freescale Halbleiter Deutschland GmbH Technical Information Center Schatzbogen Muenchen, Germany (English) (English) (German) (French) Japan: Japan Ltd. Headquarters ARCO Tower 15F , Shimo--Meguro, Meguro--ku, Tokyo Japan or support.japan@freescale.com Asia/Pacific: China Ltd. Exchange Building 23F No. 118 Jianguo Road Chaoyang District Beijing China support.asia@freescale.com For Literature Requests Only: Literature Distribution Center or Fax: LDCForFreescaleSemiconductor@hibbertgroup.com Information in this document is provided solely to enable system and software implementers to use products. There are no express or implied copyright licenses granted hereunder to design or fabricate any integrated circuits or integrated circuits based on the information in this document. reserves the right to make changes without further notice to any products herein. makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. Typical parameters that may be provided in data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including Typicals, must be validated for each customer application by customer s technical experts. does not convey any license under its patent rights nor the rights of others. products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the product could create a situation where personal injury or death may occur. Should Buyer purchase or use products for any such unintended or unauthorized application, Buyer shall indemnify and hold and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Freescale Semiconductor was negligent regarding the design or manufacture of the part. Freescalet and the Freescale logo are trademarks of, Inc. All other product or service names are the property of their respective owners., Inc. 2008, All rights reserved. Document Number: MRF7S19210H 16 Rev. 1, 3/2011

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