TIP41, TIP41A, TIP41B, TIP41C (NPN); TIP42, TIP42A, TIP42B, TIP42C (PNP) Complementary Silicon Plastic Power Transistors

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1 TIP41, TIP41A, TIP41B, TIP41C (NPN); TIP42, TIP42A, TIP42B, TIP42C (PNP) Complementary Silicon Plastic Power Transistors Designed for use in general purpose amplifier and switching applications. Features ESD Ratings: Machine Model, C; > 4 V Human Body Model, 3B; > 8 V Epoxy Meets UL 94 in PbFree Packages are Available* 6 AMPERE COMPLEMENTARY SILICON POWER TRANSISTORS 4681 VOLTS, 65 WATTS MAXIMUM RATINGS CollectorEmitter Voltage CollectorBase Voltage Rating Symbol Value Unit TIP41, TIP42 TIP41A, TIP42A TIP41, TIP42 TIP41A, TIP42A V CEO V CB Vdc Vdc EmitterBase Voltage V EB 5. Vdc Collector Current Continuous Peak I C 6. 1 Adc Base Current I B 2. Adc Total Power T C = 25 C Derate above 25 C Total Power T A = 25 C Derate above 25 C Unclamped Inductive Load Energy (Note 1) Operating and Storage Junction, Temperature Range THERMAL CHARACTERISTICS P D P D W W/ C W W/ C E 62.5 mj T J, T stg 65 to +15 Characteristic Symbol Max Unit Thermal Resistance, JunctiontoCase R JC 1.67 C/W Thermal Resistance, JunctiontoAmbient R JA 57 C/W Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected. 1. I C = 2.5 A, L = 2 mh, P.R.F. = 1 Hz, V CC = 1 V, R BE = 1. C TIP4xx xx A Y WW G 4 AB CASE 221A STYLE 1 = Device Code = 1, 1A, 1B, 1C 2, 2A, 2B, 2C = Assembly Location = Year = Work Week = PbFree Package MARKING DIAGRAM TIP4xxG AYWW ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 2 of this data sheet. *For additional information on our PbFree strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. Semiconductor Components Industries, LLC, 25 September, 25 Rev. 6 1 Publication Order Number: TIP41A/D

2 ELECTRICAL CHARACTERISTICS (T C = 25 C unless otherwise noted) Characteristic Symbol Min Max Unit OFF CHARACTERISTICS CollectorEmitter Sustaining Voltage (Note 2) TIP41, TIP42 V CEO(sus) 4 Vdc (I C = 3 madc, I B = ) TIP41A, TIP42A Collector Cutoff Current (V CE = 3 Vdc, I B = ) TIP41, TIP41A, TIP42, TIP42A (V CE = 6 Vdc, I B = ) TIP41B, TIP41C, TIP42B, TIP42C Collector Cutoff Current (V CE = 4 Vdc, V EB = ) TIP41, TIP42 (V CE = 6 Vdc, V EB = ) TIP41A, TIP42A (V CE = 8 Vdc, V EB = ) (V CE = 1 Vdc, V EB = ) Emitter Cutoff Current (V BE = 5. Vdc, I C = ) I EBO 1. madc ON CHARACTERISTICS (Note 2) DC Current Gain (I C =.3 Adc, V CE = 4. Vdc) h FE 3 DC Current Gain (I C = 3. Adc, V CE = 4. Vdc) CollectorEmitter Saturation Voltage (I C = 6. Adc, I B = 6 madc) V CE(sat) 1.5 Vdc BaseEmitter On Voltage (I C = 6. Adc, V CE = 4. Vdc) V BE(on) 2. Vdc DYNAMIC CHARACTERISTICS CurrentGain Bandwidth Product (I C = 5 madc, V CE = 1 Vdc, f test = 1. MHz) f T 3. MHz SmallSignal Current Gain (I C =.5 Adc, V CE = 1 Vdc, f = 1. khz) h fe 2 2. Pulse Test: Pulse Width 3 s, Duty Cycle 2.%. I CEO I CES madc Adc ORDERING INFORMATION Device Package Shipping TIP41 TIP41G (PbFree) TIP41A TIP41AG (PbFree) TIP41B TIP41BG (PbFree) TIP41C TIP41CG (PbFree) TIP42 TIP42G (PbFree) TIP42A TIP42AG (PbFree) TIP42B TIP42BG (PbFree) TIP42C TIP42CG (PbFree) 2

3 T A 4. T C 8 PD, POWER DISSIPATION (WATTS) T A T C T, TEMPERATURE ( C) 16 Figure 1. Power Derating V CC + 3 V V 9. V 25 s t r, t f 1 ns DUTY CYCLE = 1.% R B 4 V R B and R C VARIED TO OBTAIN DESIRED CURRENT LEVELS D 1 MUST BE FAST RECOVERY TYPE, e.g.: ММ1N5825 USED ABOVE I B 1 ma ММMSD61 USED BELOW I B 1 ma D 1 R C SCOPE t, TIME ( s) μ t r V CC = 3 V I C /I B = 1 t V BE(off) 5. V Figure 2. Switching Time Test Circuit Figure 3. TurnOn Time 3

4 r(t), TRANSIENT THERMAL RESISTANCE (NORMALIZED) D = SINGLE PULSE Z JC(t) = r(t) R JC R JC = 1.92 C/W MAX D CURVES APPLY FOR POWER PULSE TRAIN SHOWN READ TIME AT t 1 T J(pk) T C = P (pk) Z JC(t) t, TIME (ms) Figure 4. Thermal Response P (pk) t 1 t 2 DUTY CYCLE, D = t 1 /t 2 1. k ms T J = 15 C CURVES APPLY BELOW RATED V CEO SECONDARY BREAKDOWN LTD BONDING WIRE LTD THERMAL T C = 25 C (SINGLE PULSE) 5. ms.3 TIP41, TIP42.2 TIP41A, TIP42A V CE, COLLECTOREMITTER VOLTAGE (VOLTS).5 ms There are two limitations on the power handling ability of a transistor: average junction temperature and second breakdown. Safe operating area curves indicate I C V CE limits of the transistor that must be observed for reliable operation; i.e., the transistor must not be subjected to greater dissipation than the curves indicate. The data of Figure 5 is based on T J(pk) = 15 C; T C is variable depending on conditions. Second breakdown pulse limits are valid for duty cycles to 1% provided T J(pk) 15 C. T J(pk) may be calculated from the data in Figure 4. At high case temperatures, thermal limitations will reduce the power that can be handled to values less than the limitations imposed by second breakdown. Figure 5. ActiveRegion Safe Operating Area t, TIME ( s) μ t s t f Figure 6. TurnOff Time V CC = 3 V I C /I B = 1 I B1 = I B2 C, CAPACITANCE (pf) 3 2 C ib 1 7 C ob V R, REVERSE VOLTAGE (VOLTS) Figure 7. Capacitance 4

5 h FE, DC CURRENT GAIN V CE = 2. V T J = 15 C 25 C 55 C V CE, COLLECTOREMITTER VOLTAGE (VOLTS) I C = 1. A 2.5 A 5. A I B, BASE CURRENT (ma) Figure 8. DC Current Gain Figure 9. Collector Saturation Region V, VOLTAGE (VOLTS) V I C /I B = 1 V V CE = 4. V V I C /I B = , TEMPERATURE COEFFICIENTS (mv/ C) V θ + 2. *APPLIES FOR I C /I B h FE / C to + 15 C * VC FOR V CE(sat) C to + 25 C + 25 C to + 15 C 1.5 VB FOR V BE C to + 25 C Figure 1. On Voltages Figure 11. Temperature Coefficients, COLLECTOR CURRENT ( A) μ I C V CE = 3 V T J = 15 C 1 C 25 C I C = I CES REVERSE FORWARD R BE, EXTERNAL BASEEMITTER RESISTANCE (OHMS) 1 M 1. M 1 k 1 k 1. k.1 k I C I CES I C = 2 x I CES (TYPICAL I CES VALUES OBTAINED FROM FIGURE 12) I C = 1 x I CES V CE = 3 V V BE, BASEEMITTER VOLTAGE (VOLTS) T J, JUNCTION TEMPERATURE ( C) Figure 12. Collector CutOff Region Figure 13. Effects of BaseEmitter Resistance 5

6 PACKAGE DIMENSIONS CASE 221A9 ISSUE AA H Q Z L V G B N D A K F T U S R J C T SEATING PLANE NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, CONTROLLING DIMENSION: INCH. 3. DIMENSION Z DEFINES A ZONE WHERE ALL BODY AND LEAD IRREGULARITIES ARE ALLOWED. INCHES MILLIMETERS DIM MIN MAX MIN MAX A B C D F G H J K L N Q R S T U V Z STYLE 1: PIN 1. BASE 2. COLLECTOR 3. EMITTER 4. COLLECTOR ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Typical parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including Typicals must be validated for each customer application by customer s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 61312, Phoenix, Arizona USA Phone: or Toll Free USA/Canada Fax: or Toll Free USA/Canada N. American Technical Support: Toll Free USA/Canada Japan: ON Semiconductor, Japan Customer Focus Center 291 Kamimeguro, Meguroku, Tokyo, Japan Phone: ON Semiconductor Website: Order Literature: For additional information, please contact your local Sales Representative. TIP41A/D

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