CSE140: Components and Design Techniques for Digital Systems. Introduction. Prof. Tajana Simunic Rosing


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1 CSE4: Components and Design Techniques for Digital Systems Introduction Prof. Tajana Simunic Rosing
2 Welcome to CSE 4! Instructor: Tajana Simunic Rosing please put CSE4 in the subject line Office Hours: T 3:34:3pm, Th 2:45:45pm; CSE 28 Instructor s Assistant: Sheila Manalo Phone: (858) Discussion session: F 4:4:5am, CENTR 9 TAs: (office hrs and s to be updated at course website shortly) Lu, Jingwei Th am, Sunday 78pm Mast, Ryan Andrew Wed 45pm, B25 Nath, Rajib Kumar Tu am2pm Supanekar, Ketan Pranav ; Mon 78pm Class Website: Grades: 2
3 Course Description Prerequisites: CSE 2 or Math 5A, and CSE 3. CSE 4L must be taken concurrently Objective: Introduce digital components and system design concepts Grading Homeworks (~7): % HW picked up at beginning of the class, ZERO pts if late Three exams: # 25%; #2 3%; #3 35% No makeup exams; exceptions only for: documented illness (signed doctor s statement), death in the family Third exam will occur at the final time, but will be the same length as the other midterms, so you will have hr 2min to complete it Regrade requests: turn in a written request at the end of the class where your work (HW or exam) is returned 3
4 Textbook and Recommended Readings Required textbook: Digital Design & Computer Architecture, 2 nd Edition by David & Sarah Harris Recommended textbook: Digital Design by F. Vahid, & Contemporary Logic Design by R. Katz & G. Borriello Lecture slides are derived from the slides designed for all three books 4
5 Why Study Digital Design? Look under the hood of computers Become a better programmer when aware of hardware resource issues Everyday devices becoming digital Enables: Better devices: Better sound recorders, cameras, cars, cell phones, medical devices,... New devices: Video games, PDAs,... Known as embedded systems Thousands of new devices every year Designers needed: Potential career Portable music players Satellites Cell phones DVD players Video recorders Musical instruments Cameras TVs???
6 When Microprocessors Aren t Good Enough Execution time With microprocessors so easy to work with, cheap, and available, why design a digital circuit? Microprocessor may be too slow Or too big, power hungry, or costly ( a ) Image Sensor Memory Image Sensor Microprocessor (Read, Compress, and Store) Read circuit Compress circuit Sample digital camera task execution times (in seconds) on a microprocessor versus a digital circuit: ( b ) Memory Store circuit Task Microprocessor Custom Digital Circuit Read 5. Image Sensor Read circuit Compress circuit Compress 8.5 Store.8 ( c ) Memory Microprocessor (Store) 6
7 The big picture We start with Boolean algebra Y = A and B We end with a hardware design of a simple CPU PC READ ADDRESS INSTRUCTION MEMORY INSTRUCTION [3] 4 INSTRUCTION[326] INSTRUCTION[252] INSTRUCTION[26] INST[5] RESULT ADDER I[25] << 2 JMP ADDRESS [25] REGISTERS ER WRITE 2 MUX READ REGIST ER WRI DATA MUX INSTRUCTION[5] READ REGIST ER READ REGIST TE DAT A PC+4 [328] JMP ADDRESS [3] Sign Extend INSTRUCTION[5] << 2 RESULT ADDER ZERO ALU RESULT ALU CONTROL MUX BRANCH REG_DST JUMP CON TROL REG_WRITE MEM_READ,MEM_WRITE ALU_SRC ALU_OP READ DATA 2 ADDRESS DATA MEMORY WRITE DATA MUX READ DATA MUX MEM_TO_REG What s next? CSE4 more complex CPU architecture 7
8 Outline Number representations Analog vs. Digital Digital representations: Binary, Hexadecimal, Octal Binary addition, subtraction, multiplication, division Boolean algebra Properties How Boolean algebra can be used to design logic circuits Switches, MOS transistors, Logic gates What is a switch How a transistor operates Building logic gates out of transistors Building larger functions from logic gates Textbook chapter 8
9 CSE4: Components and Design Techniques for Digital Systems Number representations & Binary arithmetic Tajana Simunic Rosing 9
10 value value What Does Digital Mean? Analog signal Infinite possible values Ex: voltage on a wire created by microphone Digital signal Finite possible values Ex: button pressed on a keypad analog signal 2 digital signal Possible values:.,., 2.9,... infinite possibilities time time Possible values:,, 2, 3, or 4. That s it.
11 How Do We Encode Data into Binary? analog phenomena electric signal A2D digital data digital data sensors and other inputs Digital System D2A electric signal actuators and other outputs digital data digital data Some inputs are inherently binary Button: not pressed (), pressed () Some inputs are inherently digital Just need encoding into binary e.g., multibutton input: encode red=, blue=,... Other inputs are analog Need analogtodigital conversion air temperature sensor 33 degrees r ed r ed r ed button blue blue blue g r een g r een g r een black black black Binary digit = BIT Has 2 values: &
12 Volts Volts lengthy transmission (e.g, cell phone) Volts lengthy transmission (e.g, cell phone) A/D conversion & digitization benefits Analog signal (e.g., audio) may lose quality Voltage levels not saved/copied/transmitted perfectly Digitized version enables nearperfect save/cpy/trn. Sample voltage at particular rate, save sample using bit encoding Voltage levels still not kept perfectly But we can distinguish s from s Let bit encoding be: V: 2 V: 3 V: Digitized signal not perfect recreation, but higher sampling rate and more bits per encoding brings closer original signal time a2d digitized signal time d2a 3 2 received signal time How fix  higher, lower,? time Can fix  easily distinguish s and s, restore time 2
13 Encoding Text: ASCII, Unicode ASCII: 7 (or 8) bit encoding of each letter, number, or symbol Unicode: Increasingly popular 6bit bit encoding Encodes characters from various world languages S ymbol R S T L N E. <tab> En c oding S ymbol r s t l n e 9! <spa c e> En c oding What does this ASCII bit sequence represent? 3
14 Encoding Numbers Each position represents a quantity; symbol in position means how many of that quantity Base ten (decimal) Ten symbols:,, 2,..., 8, and 9 More than 9  next position So each position power of Nothing special about base  used because we have fingers Base two (binary) Two symbols: and More than  next position So each position power of
15 Bases Sixteen & Eight h e x bina r y 8 A F A F h e x 8 9 A B C D E F bina r y Base sixteen nice because each position represents four base two positions Used as compact means to write binary numbers Basic digits: 9, AF Known as hexadecimal, or just hex Base eight Used in some digital designs Each position represents three base two positions Basic digits: 7 Write in hex Write in octal 5
16 Sign and magnitude One bit dedicate to sign (positive or negative) sign: = positive (or zero), = negative Rest represent the absolute value or magnitude three low order bits: () thru 7 () Range for n bits +/ 2n (two representations for ) Cumbersome addition/subtraction must compare magnitudes to determine the sign of the result
17 2s complement If N is a positive number, then the negative of N (its 2s complement or N* ) is bitwise complement plus 7* is 7 : > + = (7) 7* is 7: > + = ( 7)
18 2s complement addition and subtraction
19 Detecting Overflow: Method Assuming 4bit two s complement numbers, one can detect overflow by detecting when the two numbers sign bits are the same but are different from the result s sign bit If the two numbers sign bits are different, overflow is impossible Adding a positive and negative can t exceed the largest magnitude positive or negative Simple circuit overflow = a3 b3 s3 + a3b3s3 sign bits overflow ( a ) overflow ( b ) no overflow ( c ) If the numbers sign bits have the same value, which differs from the result s sign bit, overflow has occurred. 9
20 Detecting Overflow: Method 2 Even simpler method: Detect difference between carryin to sign bit and carryout from sign bit Yields a simpler circuit: overflow = c3 xor c4 = c3 c4 + c3 c overflow ( a ) overflow ( b ) no overflow ( c ) If the carry into the sign bit column differs from the carry out of that column, overflow has occurred. 2
21 Multiplication of positive binary numbers Generalized representation of multiplication by hand 2
22 Division of positive binary numbers Repeated subtraction Set quotient to Repeat while dividend >= divisor Subtract divisor from dividend Add to quotient When dividend < divisor: Reminder = dividend Quotient is correct Example: Dividend: ; Divisor: Dividend Quotient
23 Summary of number representation Conversion between basis Decimal Binary Octal Hex Addition & subtraction in binary Overflow detection Multiplication Partial products For demo see: Division Repeated subtraction For demo see: 23
24 CSE4: Components and Design Techniques for Digital Systems Boolean algebra Tajana Simunic Rosing 24
25 B = {, } Variables represent or only Operators return or only Basic operators Boolean algebra is logical AND: a AND b returns only when both a= and b= + is logical OR: a OR b returns if either (or both) a= or b= is logical NOT: NOT a returns the opposite of a ( if a=, if a=) AND OR NOT a NOT BUF a a a b a b AND a+b a b OR a BUF Derived operators: NAND a b NAND NOR a b NOR XOR a b XOR XNOR a b XOR
26 Representations of Boolean Functions 2.6 English : F outputs when a is and b is, or when a is and b is. ( a ) Equation : F(a,b) = a b + a b Equation 2: F(a,b) = a ( b ) English 2: F outputs when a is, regardless of b s value a a b F b F ( c ) Circuit Truth table a F ( d ) Circuit 2 T he function F 26
27 Examples: Converting to Boolean Functions a Convert the following English statements to a function Q. answer is if a is and b is. Answer: F = Q2. answer is if either of a or b is. Answer: F = Q3. answer is if both a and b are not. Answer: F= Q4. answer is if a is and b is. Answer: F = 27
28 Example: Convert equation to logic gates More than one way to map expressions to gates e.g., Z = A B (C + D) = (A (B (C + D))) 28
29 Boolean Duality Derived by replacing by +, + by, by, and by & leaving variables unchanged Generalized duality: X + Y +... X Y... f (X,X 2,...,X n,,,+, ) f(x,x 2,...,X n,,,,+) Any theorem that can be proven is also proven for its dual! Note: this is NOT demorgan s Law 29
30 Boolean Axioms & Theorems
31 Boolean theorems of multiple variables
32 Proving theorems Using the axioms of Boolean algebra (or a truth table): e.g., prove the theorem: X Y + X Y = X distributivity X Y + X Y = X (Y + Y ) complementarity X (Y + Y ) = X () identity X () = X e.g., prove the theorem: X + X Y = X identity X + X Y = X + X Y distributivity X + X Y = X ( + Y) identity X ( + Y) = X () identity X () = X 32
33 Proving theorems example Prove the following using the laws of Boolean algebra: (X Y) + (Y Z) + (X Z) = X Y + X Z (X Y) + (Y Z) + (X Z) identity (X Y) + () (Y Z) + (X Z) complementarity (X Y) + (X + X) (Y Z) + (X Z) distributivity (X Y) + (X Y Z) + (X Y Z) + (X Z) commutativity (X Y) + (X Y Z) + (X Y Z) + (X Z) factoring (X Y) ( + Z) + (X Z) ( + Y) null (X Y) () + (X Z) () identity (X Y) + (X Z) 33
34 Proving theorems (perfect induction) Using perfect induction (complete truth table): e.g., de Morgan s: (X + Y) = X Y NOR is equivalent to AND with inputs complemented X Y X Y (X + Y) X Y (X Y) = X + Y NAND is equivalent to OR with inputs complemented X Y X Y (X Y) X + Y 34
35 Completeness of NAND Any logic function can be implemented using just NAND gates. Why? Boolean algebra: need AND, OR and NOT 35
36 F = X Y + Z Implement using only NAND 36
37 Completeness of NOR Any logic function can be implemented using just NOR gates. Boolean algebra needs AND, OR and NOT 37
38 Implement using only NOR F = X Y + Z 38
39 Combinational circuit building blocks: Transistors, gates and timing Tajana Simunic Rosing 4
40 Switches Electronic switches are the basis of binary digital circuits Electrical terminology Voltage: Difference in electric potential between two points Analogous to water pressure 4.5 A 9V A Current: Flow of charged particles 2 ohms Analogous to water flow Resistance: Tendency of wire to resist current flow V 9 V Analogous to water pipe diameter 4.5 A V = I * R (Ohm s Law) 4
41 CMOS circuit The CMOS Switches Consists of N and PMOS transistors Both N and PMOS are similar to basic switches Rp ~ 2 Rn => PMOS in series is much slower than NMOS nmos gate conducts does not conduct pmos gate Silicon  not quite a conductor or insulator: Semiconductor does not conduct conducts 42
42 Transistor Circuit Design nmos: pass s well, so connect source to GND pmos: pass s well, so connect source to V DD inputs pmos pullup network output nmos pulldown network
43 CMOS Gates: NOT Gate NOT V DD A Y = A A Y Y A P Y N GND A P N Y
44 CMOS Gates: NAND Gate A B NAND Y = AB Y A B Y P2 P Y A B N N2 A B P P2 N N2 Y
45 Three input NOR gate CMOS gate structure: Threeinput NOR inputs pmos pullup network output nmos pulldown network
46 Other CMOS Gates Building a twoinput AND gate
47 Transmission Gates nmos pass s poorly pmos pass s poorly Transmission gate is a better switch passes both and well When EN =, the switch is ON: EN = and A is connected to B When EN =, the switch is OFF: A is not connected to B A EN EN B
48 How to make CMOS gates 49
49 CMOS Example 5
50 A CMOS design example Implement F and F using CMOS: F=A*(B+C) 5
51 Resistivity CMOS delay: resistance Function of: resistivity r, thickness t : defined by technology Width W, length L: defined by designer Approximate ON transistor with a resistor R = r L/W L is usually minimum; change only W 52 Source: Prof. Subhashish Mitra
52 CMOS delay: capacitance & timing estimates Capacitor Stores charge Q = C V (capacitance C; voltage V) Current: dq/dt = C dv/dt Timing estimate D t = C dv/ i = C dv / (V/R trans ) = R trans C dv/v Delay: time to go from 5% to 5% of waveform Source: Prof. Subhashish Mitra 53
53 Charge/discharge in CMOS Calculate on resistance Calculate capacitance of the gates circuit is driving Get RC delay & use it as an estimate of circuit delay V out = V dd (  e t/rpc ) Rp ~ 2Rn 54 Source: Prof. Subhashish Mitra
54 Timing analysis: Inverter N O T x F x F x F = x 55
55 Timing analysis in gates x y F OR F x y AND F= x or y x y F y x y x x y F=x & y F x y F x y F
56 Power consumption in CMOS Power = Energy consumed per unit time Dynamic power consumption Static power consumption Dynamic power consumption: Power to charge transistor gate capacitances Energy required to charge a capacitance, C, to V DD is CV DD 2 Circuit running at frequency f: transistors switch (from to or vice versa) at that frequency Capacitor is charged f/2 times per second (discharging from to is free) P dynamic = ½CV DD2 f Static power consumption Power consumed when no gates are switching Caused by the leakage supply current, I DD : P static = I DD V DD
57 Power estimate example Estimate the power consumption of a tablet PC V DD =.2 V C = 2 nf f = GHz I DD = 2 ma P = ½CV DD2 f + I DD V DD = ½(2 nf)(.2 V) 2 ( GHz) + (2 ma)(.2 V) = 4.4 W
58 What we covered thus far: Summary Number representations Boolean algebra Switches, Logic gates How to build logic gates from CMOS transistors Timing and power estimates What is next: Combinatorial logic: Minimization Implementations 59
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