TIP35A, TIP35B, TIP35C (NPN); TIP36A, TIP36B, TIP36C (PNP) Complementary Silicon High-Power Transistors

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1 TIP35A, TIP35B, TIP35C (NPN); TIP36A, TIP36B, TIP36C (PNP) Complementary Silicon High-Power Transistors Designed for general purpose power amplifier and switching applications. Features 25 A Collector Current Low Leakage Current I CEO = 1. 3 and 6 V Excellent DC Gain h FE = 4 15 A High Current Gain Bandwidth Product h fe = 3. I C = 1. A, f = 1. MHz These are Pb Free Devices* MAXIMUM RATINGS Rating Symbol TIP35A TIP36A TIP35B TIP36B TIP35C TIP36C Unit Collector Emitter Voltage V CEO Vdc Collector Base Voltage V CB Vdc Emitter Base Voltage V EB 5. Vdc Collector Current Continuous Peak (Note 1) I C 25 4 Adc Base Current Continuous I B 5. Adc Total Power T C = 25 C Derate above 25 C Operating and Storage Junction Temperature Range P D 125 W W/ C T J, T stg 65 to +15 C Unclamped Inductive Load E SB 9 mj THERMAL CHARACTERISTICS Characteristic Symbol Max Unit Thermal Resistance, Junction to Case Junction To Free Air Thermal Resistance R JC 1. C/W R JA 35.7 C/W Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. Pulse Test: Pulse Width = 1 ms, Duty Cycle 1%. 25 AMPERE COMPLEMENTARY SILICON POWER TRANSISTORS 6 1 VOLTS, 125 WATTS CASE 34D STYLE 1 CASE 34L STYLE 3 NOTE: Effective June 212 this device will be available only in the package. Reference FPCN# ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 2 of this data sheet. *For additional information on our Pb Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. Semiconductor Components Industries, LLC, 212 May, 212 Rev. 6 1 Publication Order Number: TIP35/D

2 MARKING DIAGRAMS TO BASE TIP3xx AYWWG 2 COLLECTOR 3 EMITTER AYWWG TIP3xx 1 BASE 3 EMITTER 2 COLLECTOR TIP3xx A Y WW G = Device Code = Assembly Location = Year = Work Week = Pb Free Package ORDERING INFORMATION Device Package Shipping TIP35AG TIP35BG TIP35CG TIP36AG TIP36BG TIP36CG TIP35AG TIP35BG TIP35CG TIP36AG TIP36BG TIP36CG 2

3 Î ELECTRICAL CHARACTERISTICS (T C = 25 C unless otherwise noted) Characteristic Symbol ÎÎÎ Min ÎÎÎÎ Max ÎÎÎ Unit Î OFF CHARACTERISTICS Collector Emitter Sustaining Voltage (Note 2) V CEO(sus) ÎÎÎ Vdc (I C = 3 ma, I B = ) TIP35A, TIP36AÎÎ 6 ÎÎÎÎ ÎÎÎ TIP35B, TIP36B 8 TIP35C, TIP36CÎÎ 1ÎÎÎÎ ÎÎÎ Collector Emitter Cutoff Current I CEO ÎÎÎ ma (V CE = 3 V, I B = ) TIP35A, TIP36AÎÎ (V CE = 6 V, I B = ) TIP35B, TIP35C, TIP36B, TIP36C ÎÎ ÎÎÎÎ 1. ÎÎÎ 1. Î Collector Emitter Cutoff Current I (V CE = Rated V CEO, V EB CES ÎÎÎ.7 Î ma = ) ÎÎÎÎ Emitter Base Cutoff Current I EBO ÎÎÎ Î (V EB = 5. V, I C = ) ÎÎ 1. Î ma Î ON CHARACTERISTICS (Note 2) DC Current Gain h FE ÎÎÎ (I C = 1.5 A, V CE = 4. V) (I C = 15 A, V CE ÎÎ 25 ÎÎÎÎ ÎÎÎ = 4. V) Î Collector Emitter Saturation Voltage V (I C = 15 A, I B = 1.5 A) CE(sat) Vdc Î (I C = 25 A, I B = 5. A) ÎÎ 1.8 ÎÎÎ ÎÎÎÎ 4. ÎÎÎ Base Emitter On Voltage V BE(on) ÎÎÎ Vdc (I C = 15 A, V CE = 4. V) (I C = 25 A, V CE = 4. V) ÎÎ 2. Î 4. Î DYNAMIC CHARACTERISTICS Small Signal Current Gain h fe ÎÎÎ (I C = 1. A, V CE = 1 V, f = 1. khz) ÎÎ 25 ÎÎÎÎ ÎÎÎ Current Gain Bandwidth Product f T ÎÎÎ 3. ÎÎÎÎ ÎÎÎ MHz (I C = 1. A, V CE = 1 V, f = 1. MHz) 2. Pulse Test: Pulse Width = 3 s, Duty Cycle 2.%. 3

4 125 PD, POWER DISSIPATION (WATTS) T C, CASE TEMPERATURE ( C) 175 Figure 1. Power Derating + 2. V TURN ON TIME t r -11. V 2 ns 1 TO 1 S DUTY CYCLE 2.% 1 R B V CC R L - 3 V 3. TO SCOPE t r 2 ns TURN OFF TIME + 9. V -11. V t r 2 ns 1 to 1 s DUTY CYCLE 2.% 1 R B V BB V CC R L + 4. V - 3 V 3. TO SCOPE t r 2 ns FOR CURVES OF FIGURES 3 & 4, R B & R L ARE VARIED. INPUT LEVELS ARE APPROXIMATELY AS SHOWN. FOR NPN, REVERSE ALL POLARITIES. Figure 2. Switching Time Equivalent Test Circuits T J = 25 C I C /I B = 1 V CC = 3 V V BE(off) = 2 V t, TIME ( s) μ t r t d (PNP) (NPN) I C, COLLECTOR CURRENT (AMPERES) Figure 3. Turn On Time 4

5 t, TIME ( s) μ (PNP) (NPN) t f t f t s t s T J = 25 C V CC = 3 V I C /I B = 1 I B1 = I B2 hfe, DC CURRENT GAIN PNP NPN V CE = 4. V T J = 25 C I C, COLLECTOR CURRENT (AMPERES) I C, COLLECTOR CURRENT (AMPS) Figure 4. Turn Off Time Figure 5. DC Current Gain FORWARD BIAS There are two limitations on the power handling ability of a transistor: average junction temperature and second breakdown. Safe operating area curves indicate I C V CE limits of the transistor that must be observed for reliable operation; i.e., the transistor must not be subjected to greater dissipation than the curves indicate. The data of Figure 6 is based on T C = 25 C; T J(pk) is variable depending on power level. Second breakdown pulse limits are valid for duty cycles to 1% but must be derated when T C 25 C. Second breakdown limitations do not derate the same as thermal limitations. REVERSE BIAS For inductive loads, high voltage and high current must be sustained simultaneously during turn off, in most cases, with the base to emitter junction reverse biased. Under these conditions the collector voltage must be held to a safe level at or below a specific value of collector current. This can be accomplished by several means such as active clamping, RC snubbing, load line shaping, etc. The safe level for these devices is specified as Reverse Bias Safe Operating Area and represents the voltage current conditions during reverse biased turn off. This rating is verified under clamped conditions so that the device is never subjected to an avalanche mode. Figure 7 gives RBSOA characteristics. IC, COLLECTOR CURRENT (AMPS) IC, COLLECTOR CURRENT (AMPS) s 1. ms T C = 25 C 1 1 ms 5. dc 2. SECONDARY BREAKDOWN 1. THERMAL LIMIT BONDING WIRE LIMIT.5.3 TIP35A, 36A.2 TIP35B, 36B TIP35C, 36C V CE, COLLECTOR-EMITTER VOLTAGE (VOLTS) Figure 6. Maximum Rated Forward Bias Safe Operating Area T J 1 C TIP35A TIP36A TIP35B TIP36B TIP35C TIP36C V CE, COLLECTOR-EMITTER VOLTAGE (VOLTS) Figure 7. Maximum Rated Forward Bias Safe Operating Area 5

6 TEST CIRCUIT V CE MONITOR INPUT 5 MJE18 R BB1 2 TUT L1 (SEE NOTE A) L2 (SEE NOTE A) 5 R BB2 = 1 V CC = 1 V - + I C MONITOR V BB2 = V BB1 = 1 V - + R S =.1 VOLTAGE AND CURRENT WAVEFORMS INPUT VOLTAGE 5. V t w = 6. ms (SEE NOTE B) 1 ms COLLECTOR CURRENT - 3. A -1 V COLLECTOR VOLTAGE V (BR)CER NOTES: A. L1 and L2 are 1 mh,.11, Chicago Standard Transformer Corporation C 2688, or equivalent. B. Input pulse width is increased until I CM = 3. A. C. For NPN, reverse all polarities. Figure 8. Inductive Load Switching 6

7 PACKAGE DIMENSIONS CASE 34D 2 ISSUE E B Q E C NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, CONTROLLING DIMENSION: MILLIMETER. K S L U V G 4 D A J H MILLIMETERS INCHES DIM MIN MAX MIN MAX A B C D E G H J K 31. REF 1.22 REF L Q S U 4. REF.157 REF V 1.75 REF.69 STYLE 1: PIN 1. BASE 2. COLLECTOR 3. EMITTER 4. COLLECTOR CASE 34L 2 ISSUE F N A K F 2 PL B U L P Y W J G D 3 PL.25 (.1) M Y Q S C T E H 4 Q.63 (.25) M T B M NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, CONTROLLING DIMENSION: MILLIMETER. MILLIMETERS INCHES DIM MIN MAX MIN MAX A B C D E F G 5.45 BSC.215 BSC H J K L N P Q U 6.15 BSC.242 BSC W STYLE 3: PIN 1. BASE 2. COLLECTOR 3. EMITTER 4. COLLECTOR 7

8 ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Typical parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including Typicals must be validated for each customer application by customer s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 8217 USA Phone: or Toll Free USA/Canada Fax: or Toll Free USA/Canada orderlit@onsemi.com N. American Technical Support: Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: Japan Customer Focus Center Phone: ON Semiconductor Website: Order Literature: For additional information, please contact your local Sales Representative TIP35/D