1SMB5.0AT3G Series, SZ1SMB5.0AT3G Series. 600 Watt Peak Power Zener Transient Voltage Suppressors. Unidirectional
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1 1SMBAT3G Series, SZ1SMBAT3G Series 600 Watt Peak Power Zener Transient Voltage Suppressors Unidirectional The SMB series is designed to protect voltage sensitive components from high voltage, high energy transients. They have excellent clamping capability, high surge capability, low zener impedance and fast response time. The SMB series is supplied in ON Semiconductor s exclusive, cost-effective, highly reliable SURMETIC package and is ideally suited for use in communication systems, automotive, numerical controls, process controls, medical equipment, business machines, power supplies and many other industrial/consumer applications. Features Working Peak Reverse Voltage Range V to 170 V Standard Zener Breakdown Voltage Range 6.7 V to 199 V Peak Power 600 ms ESD Rating of Class 3 (> 16 kv) per Human Body Model Maximum Clamp Peak Pulse Current Low Leakage < A Above V UL 497B for Isolated Loop Circuit Protection Response Time is Typically < ns SZ Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC Q1 Qualified and PPAP Capable Pb Free Packages are Available* Mechanical Characteristics CASE: Void-free, transfer-molded, thermosetting plastic FINISH: All external surfaces are corrosion resistant and leads are readily solderable MAXIMUM CASE TEMPERATURE FOR SOLDERING PURPOSES: 260 C for Seconds LEADS: Modified L Bend providing more contact area to bond pads POLARITY: Cathode indicated by polarity band MOUNTING POSITION: Any *For additional information on our Pb Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. PLASTIC SURFACE MOUNT ZENER OVERVOLTAGE TRANSIENT SUPPRESSORS V 170 V, 600 W PEAK POWER Cathode SMB CASE 403A PLASTIC Anode A = Assembly Location Y = Year WW = Work Week xx = Device Code (Refer to page 3) = Pb Free Package (Note: Microdot may be in either location) ORDERING INFORMATION Device Package Shipping 1SMBxxxAT3G SMB 2,500 / (Pb Free) Tape & Reel SZ1SMBxxxAT3G MARKING DIAGRAM AYWW xx SMB (Pb Free) 2,500 / Tape & Reel For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. DEVICE MARKING INFORMATION See specific marking information in the device marking column of the Electrical Characteristics table on page 3 of this data sheet. Semiconductor Components Industries, LLC, 2012 February, 2012 Rev Publication Order Number: 1SMBAT3/D
2 1SMBAT3G Series, SZ1SMBAT3G Series MAXIMUM RATINGS Rating Symbol Value Unit Peak Power Dissipation (Note T L = 25 C, Pulse Width = 1 ms P PK 600 W DC Power T L = 75 C Measured Zero Lead Length (Note 2) Derate Above 75 C Thermal Resistance from Junction to Lead P D R JL W mw/ C C/W DC Power Dissipation (Note T A = 25 C Derate Above 25 C Thermal Resistance from Junction to Ambient P D R JA W mw/ C C/W Forward Surge Current (Note T A = 25 C I FSM 0 A Operating and Storage Temperature Range T J, T stg 65 to +150 C Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. X 00 s, non repetitive in square copper pad, FR 4 board. 3. FR 4 board, using ON Semiconductor minimum recommended footprint, as shown in 403A case outline dimensions spec. 4. 1/2 sine wave (or equivalent square wave), PW = 8.3 ms, duty cycle = 4 pulses per minute maximum. ELECTRICAL CHARACTERISTICS (T A = 25 C unless otherwise noted, V F = 3.5 V I F (Note 5) = 30 A) Symbol Parameter Maximum Reverse Peak Pulse Current I PP I F I V C Clamping I PP V RWM I R Working Peak Reverse Voltage Maximum Reverse Leakage V RWM V RWM V C V BR I R I T V F V V BR Breakdown I T I T Test Current I F Forward Current I PP V F Forward I F 5. 1/2 sine wave (or equivalent square wave), PW = 8.3 ms, non repetitive duty cycle. Uni Directional TVS 2
3 1SMBAT3G Series, SZ1SMBAT3G Series ELECTRICAL CHARACTERISTICS Device* 1SMBAT3G 1SMB6.0AT3G 1SMB6.5AT3G 1SMB7.0AT3G 1SMB7.5AT3G 1SMB8.0AT3G 1SMB8.5AT3G 1SMB9.0AT3G 1SMBAT3G 1SMB11AT3G 1SMB12AT3G 1SMB13AT3G 1SMB14AT3G 1SMB15AT3G 1SMB16AT3G 1SMB17AT3G 1SMB18AT3G 1SMB20AT3G 1SMB22AT3G 1SMB24AT3G 1SMB26AT3G 1SMB28AT3G 1SMB30AT3G 1SMB33AT3G 1SMB36AT3G 1SMB40AT3G 1SMB43AT3G 1SMB45AT3G 1SMB48AT3G 1SMB51AT3G 1SMB54AT3G 1SMB58AT3G 1SMB60AT3G 1SMB64AT3G 1SMB70AT3G 1SMB75AT3G 1SMB85AT3G 1SMB90AT3G 1SMB0AT3G 1SMB1AT3G 1SMB120AT3G 1SMB130AT3G 1SMB150AT3G 1SMB160AT3G 1SMB170AT3G Device Marking KE KG KK KM KP KR KT KV KX KZ LE LG LK LM LP LR LT LV LX LZ ME MG MK MM MP MR MT MV MX MZ NE NG NK NM NP NR NV NX NZ PE PG PK PM PP PR Breakdown Voltage V I PP (Note 8) V RWM (Note 6) I V RWM V BR (Note 7) I T V C I PP C typ (Note 9) V A Min Nom Max ma V A pf A transient suppressor is normally selected according to the working peak reverse voltage (V RWM ), which should be equal to or greater than the DC or continuous peak operating voltage level. 7. V BR measured at pulse test current I T at an ambient temperature of 25 C. 8. Surge current waveform per Figure 2 and derate per Figure 4 of the General Data 600 W at the beginning of this group. 9. Bias Voltage = 0 V, F = 1 MHz, T J = 25 C Please see 1SMBCAT3 to 1SMB78CAT3 for Bidirectional devices. * Include SZ-prefix devices where applicable. 3
4 1SMBAT3G Series, SZ1SMBAT3G Series P PK, PEAK POWER (kw) 0 1 NONREPETITIVE PULSE WAVEFORM SHOWN IN FIGURE 2 VALUE (%) 0 50 t r s PEAK VALUE - I PP PULSE WIDTH (t P ) IS DEFINED AS THAT POINT WHERE THE PEAK CURRENT DECAYS TO 50% OF I PP. HALF VALUE - I PP 2 t P s 1 s s 0 s 1 ms ms t P, PULSE WIDTH Figure 1. Pulse Rating Curve t, TIME (ms) Figure 2. Pulse Waveform 5 PEAK PULSE DERATING IN % OF PEAK POWER OR TA = 25 C T A, AMBIENT TEMPERATURE ( C),000 C, CAPACITANCE (pf) SMBAT3G 1SMBAT3G 1SMB48AT3G BIAS VOLTAGE (VOLTS) T J = 25 C f = 1 MHz 1SMB170AT3G Figure 3. Pulse Derating Curve Figure 4. Typical Junction Capacitance vs. Bias Voltage Z in V in LOAD VL Figure 5. Typical Protection Circuit 4
5 1SMBAT3G Series, SZ1SMBAT3G Series APPLICATION NOTES Response Time In most applications, the transient suppressor device is placed in parallel with the equipment or component to be protected. In this situation, there is a time delay associated with the capacitance of the device and an overshoot condition associated with the inductance of the device and the inductance of the connection method. The capacitive effect is of minor importance in the parallel protection scheme because it only produces a time delay in the transition from the operating voltage to the clamp voltage as shown in Figure 6. The inductive effects in the device are due to actual turn-on time (time required for the device to go from zero current to full current) and lead inductance. This inductive effect produces an overshoot in the voltage across the equipment or component being protected as shown in Figure 7. Minimizing this overshoot is very important in the application, since the main purpose for adding a transient suppressor is to clamp voltage spikes. The SMB series have a very good response time, typically < ns and negligible inductance. However, external inductive effects could produce unacceptable overshoot. Proper circuit layout, minimum lead lengths and placing the suppressor device as close as possible to the equipment or components to be protected will minimize this overshoot. Some input impedance represented by Z in is essential to prevent overstress of the protection device. This impedance should be as high as possible, without restricting the circuit operation. Duty Cycle Derating The data of Figure 1 applies for non-repetitive conditions and at a lead temperature of 25 C. If the duty cycle increases, the peak power must be reduced as indicated by the curves of Figure 8. Average power must be derated as the lead or ambient temperature rises above 25 C. The average power derating curve normally given on data sheets may be normalized and used for this purpose. At first glance the derating curves of Figure 8 appear to be in error as the ms pulse has a higher derating factor than the s pulse. However, when the derating factor for a given pulse of Figure 8 is multiplied by the peak power value of Figure 1 for the same pulse, the results follow the expected trend. V V in (TRANSIENT) V OVERSHOOT DUE TO INDUCTIVE EFFECTS V in (TRANSIENT) V L V L V in t d t D = TIME DELAY DUE TO CAPACITIVE EFFECT t t Figure 6. Figure 7. DERATING FACTOR s PULSE WIDTH ms 1 ms 0 s D, DUTY CYCLE (%) Figure 8. Typical Derating Factor for Duty Cycle 5
6 1SMBAT3G Series, SZ1SMBAT3G Series UL RECOGNITION The entire series has Underwriters Laboratory Recognition for the classification of protectors (QVGQ2) under the UL standard for safety 497B and File #E2057. Many competitors only have one or two devices recognized or have recognition in a non-protective category. Some competitors have no recognition at all. With the UL497B recognition, our parts successfully passed several tests including Strike Voltage Breakdown test, Endurance Conditioning, Temperature test, Dielectric Voltage-Withstand test, Discharge test and several more. Whereas, some competitors have only passed a flammability test for the package material, we have been recognized for much more to be included in their Protector category. 6
7 1SMBAT3G Series, SZ1SMBAT3G Series PACKAGE DIMENSIONS SMB CASE 403A 03 ISSUE H H E E b POLARITY INDICATOR OPTIONAL AS NEEDED D NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, CONTROLLING DIMENSION: INCH. 3. D DIMENSION SHALL BE MEASURED WITHIN DIMENSION P. MILLIMETERS INCHES DIM MIN NOM MAX MIN NOM MAX A A b c D E H E L L REF REF A L L1 c A1 SOLDERING FOOTPRINT* SCALE 8:1 mm inches *For additional information on our Pb Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. SURMETIC is a registered trademark of Semiconductor Components Industries, LLC. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Typical parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including Typicals must be validated for each customer application by customer s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado USA Phone: or Toll Free USA/Canada Fax: or Toll Free USA/Canada N. American Technical Support: Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: Japan Customer Focus Center Phone: ON Semiconductor Website: Order Literature: For additional information, please contact your local Sales Representative 1SMBAT3/D
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LOW POWER SCHOTTKY. http://onsemi.com GUARANTEED OPERATING RANGES ORDERING INFORMATION
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CM2009. VGA Port Companion Circuit
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