MC74AC138, MC74ACT of-8 Decoder/Demultiplexer

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1 -of-8 Decoder/Demultiplexer The MC74AC38/74ACT38 is a high speed of 8 decoder/demultiplexer. This device is ideally suited for high speed bipolar memory chip select address decoding. The multiple input enables allow parallel expaion to a of 24 decoder using just three MC74AC38/74ACT38 devices or a of 32 decoder using four MC74AC38/74ACT38 devices and one inverter. Demultiplexing Capability Multiple Input Enable for Easy Expaion Active LOW Mutually Exclusive Outputs Outputs Source/Sink 24 ma ACT38 Has TTL Compatible Inputs These are Pb Free Devices CC O 0 O O 2 O 3 O 4 O 5 O A 0 A A 2 E E 2 E 3 O GND Figure. Pinout: 6 Lead Packages Conductors (Top iew) 6 6 SOIC 6 D SUFFIX CASE 75B TSSOP 6 DT SUFFIX CASE 948F ORDERING INFORMATION See detailed ordering and shipping information in the package dimeio section on page 7 of this data sheet. 6 xxx = AC or ACT A = Assembly Location WL or L = Wafer Lot Y = Year WW or W = Work Week G or = Pb Free Package MARKING DIAGRAMS 6 xxx38g AWLYWW xxx 38 ALYW (Note: Microdot may be in either location) A 0 A A 2 E E 2 E 3 O 0 O O 2 O 3 O 4 O 5 O 6 O 7 Figure 2. Logic Symbol PIN ASSIGNMENT PIN A 0 A 2 E E 2 E 3 O 0 O 7 FUNCTION Address Inputs Enable Inputs Enable Input Outputs Semiconductor Components Industries, LLC, 205 January, 205 Rev. 7 Publication Order Number: MC74AC38/D

2 FUNCTIONAL DESCRIPTION The MC74AC38/74ACT38 high speed of 8 decoder/demultiplexer accepts three binary weighted inputs (A 0, A, A 2 ) and, when enabled, provides eight mutually exclusive active LOW outputs (O 0 O 7 ). The MC74AC38/74ACT38 features three Enable inputs, two active LOW (E, E 2 ) and one active HIGH (E 3 ). All outputs will be HIGH unless E and E 2 are LOW and E 3 is HIGH. This multiple enabled function allows easy parallel expaion of the device to a of 32 (5 lines to 32 lines) decoder with just four MC74AC38/74ACT38 devices and one inverter (See Figure 4). The MC74AC38/74ACT38 can be used as an 8 output demultiplexer by using one of the active LOW Enable inputs as the data input and the other Enable inputs as strobes. The Enable inputs which are not used must be permanently tied to their appropriate active HIGH or active LOW state. TRUTH TABLE Inputs Outputs E E 2 E 3 A 0 A A 2 O 0 O O 2 O 3 O 4 O 5 O 6 O 7 H X X X X X H H H H H H H H X H X X X X H H H H H H H H X X L X X X H H H H H H H H L L H L L L L H H H H H H H L L H H L L H L H H H H H H L L H L H L H H L H H H H H L L H H H L H H H L H H H H L L H L L H H H H H L H H H L L H H L H H H H H H L H H L L H L H H H H H H H H L H L L H H H H H H H H H H H L H = HIGH oltage Level L = LOW oltage Level X = Immaterial A 2 A E E A E NOTE: This diagram is provided only for the understanding of logic operatio and should not be used to estimate propagation delays. Figure 3. Logic Diagram 2

3 A 0 A A 2 04 A 3 A 4 H A 0 A A 2 E A 0 A A 2 E A 0 A A 2 E A 0 A A 2 E Figure 4. Expaion to of 32 Decoding 3

4 MAXIMUM RATINGS Symbol Parameter alue Unit CC DC Supply oltage 0.5 to 7.0 I DC Input oltage 0.5 I CC 0.5 O DC Output oltage (Note ) 0.5 O CC 0.5 I IK DC Input Diode Current 20 ma I OK DC Output Diode Current 50 ma I O DC Output Sink/Source Current 50 ma I CC DC Supply Current per Output Pin 50 ma I GND DC Ground Current per Output Pin 50 ma T STG Storage Temperature Range 65 to 50 C T L Lead temperature, mm from Case for 0 Seconds 260 C T J Junction temperature under Bias 50 C JA Thermal Resistance (Note 2) SOIC TSSOP P D Power Dissipation in Still Air at 65 C (Note 3) SOIC TSSOP C/W mw MSL Moisture Seitivity Level F R Flammability Rating Oxygen Index: 30% 35% UL in ESD ESD Withstand oltage Human Body Model (Note 4) Machine Model (Note 5) Charged Device Model (Note 6) > 2000 > 200 > 000 I Latch Up Latch Up Performance Above CC and Below GND at 85 C (Note 7) 00 ma Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected.. I O absolute maximum rating must be observed. 2. The package thermal impedance is calculated in accordance with JESD mw at 65 C; derate to 300 mw by 0 mw/ from 65 C to 85 C. 4. Tested to EIA/JESD22 A4 A. 5. Tested to EIA/JESD22 A5 A. 6. Tested to JESD22 C0 A. 7. Tested to EIA/JESD78. RECOMMENDED OPERATING CONDITIONS Symbol Parameter Min Typ Max Unit CC Supply oltage AC ACT IN, OUT DC Input oltage, Output oltage (Ref. to GND) 0 CC t r, t f Input Rise and Fall Time (Note ) AC Devices except Schmitt Inputs t r, t f Input Rise and Fall Time (Note 2) ACT Devices except Schmitt Inputs / T J Junction Temperature (PDIP) 40 C T A Operating Ambient Temperature Range C I OH Output Current High 24 ma I OL Output Current Low 24 ma Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond the Recommended Operating Ranges limits may affect device reliability.. IN from 30% to 70% CC ; see individual Data Sheets for devices that differ from the typical input rise and fall times. 2. IN from 0.8 to 2.0 ; see individual Data Sheets for devices that differ from the typical input rise and fall times. / 4

5 DC CHARACTERISTICS IH IL Symbol Parameter OH Minimum High Level Input oltage Maximum Low Level Input oltage Minimum High Level Output oltage CC () 74AC T A = +25 C Typ 74AC T A = 40 C to +85 C Guaranteed Limits Unit Conditio OUT = or CC OUT = or CC I OUT = 50 μa OL Maximum Low Level Output oltage * IN = IL or IH ma I OH 24 ma ma I OUT = 50 μa I IN Maximum Input Leakage Current * IN = IL or IH ma I OL 24 ma ma 5.5 ±0. ±.0 μa I = CC, GND I OLD Minimum Dynamic ma OLD =.65 Max I OHD Output Current ma OHD = 3.85 Min I CC Maximum Quiescent Supply Current μa IN = CC or GND *All outputs loaded; thresholds on input associated with output under test. Maximum test duration 2.0 ms, one output loaded at a time. NOTE: I IN and I 3.0 are guaranteed to be less than or equal to the respective 5.5 CC. AC CHARACTERISTICS Symbol Parameter CC * () 74AC T A = +25 C C L = 50 pf 74AC T A = 40 C to +85 C C L = 50 pf Min Typ Max Min Max A n to O n A n to O n E or E 2 to O n E or E 2 to O n E 3 to O n E 3 to O n *oltage Range 3.3 is 3.3 ±0.3. *oltage Range 5.0 is 5.0 ±0.5. Unit Fig. No. 5

6 DC CHARACTERISTICS IH IL Symbol OH Parameter Minimum High Level Input oltage Maximum Low Level Input oltage Minimum High Level Output oltage CC () 74ACT T A = +25 C Typ 74ACT T A = 40 C to +85 C Guaranteed Limits Unit Conditio OUT = or CC OUT = or CC I OUT = 50 μa OL Maximum Low Level Output oltage * IN = IL or IH ma I OH 24 ma I OUT = 50 μa I IN Maximum Input Leakage Current * IN = IL or IH ma I OL 24 ma 5.5 ±0. ±.0 μa I = CC, GND ΔI CCT Additional Max. I CC /Input ma I = CC 2. I OLD Minimum Dynamic ma OLD =.65 Max I OHD Output Current ma OHD = 3.85 Min I CC Maximum Quiescent Supply Current *All outputs loaded; thresholds on input associated with output under test. Maximum test duration 2.0 ms, one output loaded at a time. AC CHARACTERISTICS Symbol Parameter μa IN = CC or GND CC * () 74ACT T A = +25 C C L = 50 pf 74ACT T A = 40 C to +85 C C L = 50 pf Min Typ Max Min Max A n to O n A n to O n E or E 2 to O n E or E 2 to O n E 3 to O n E 3 to O n *oltage Range 5.0 is 5.0 ± 0.5 CAPACITANCE Symbol Parameter alue Typ Unit Unit Test Conditio C IN Input Capacitance 4.5 pf CC = 5.0 C PD Power Dissipation Capacitance 60 pf CC = 5.0 Fig. No. 6

7 ORDERING INFORMATION MC74AC38DG Device Order Number Package Shipping SOIC 6 48 Units / Rail MC74AC38DR2G MC74AC38DTR2G MC74ACT38DG MC74ACT38DR2G SOIC 6 TSSOP 6 SOIC 6 SOIC Tape & Reel 2500 Tape & Reel 48 Units / Rail 2500 Tape & Reel MC74ACT38DTR2G TSSOP Tape & Reel For information on tape and reel specificatio, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specificatio Brochure, BRD80/D. 7

8 PACKAGE DIMENSIONS SOIC 6 D SUFFIX CASE 75B 05 ISSUE K A B P 8 PL 0.25 (0.00) M B S NOTES:. DIMENSIONING AND TOLERANCING PER ANSI Y4.5M, CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.5 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.27 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. T SEATING PLANE G D 6 PL K C M R X 45 J F MILLIMETERS INCHES DIM MIN MAX MIN MAX A B C D F G.27 BSC BSC J K M P R (0.00) M T B S A S SOLDERING FOOTPRINT* 8X X.2 6 6X PITCH 8 9 DIMENSIONS: MILLIMETERS *For additional information on our Pb Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. 8

9 PACKAGE DIMENSIONS 0.5 (0.006) T 0.5 (0.006) T 0.0 (0.004) T SEATING PLANE L U PIN IDENT. U D S S 2X L/2 C 6X K REF A G B U TSSOP 6 DT SUFFIX CASE 948F ISSUE B 0.0 (0.004) M T U S S H J N N J DETAIL E DETAIL E ÇÇÇ ÉÉÉ ÇÇÇ ÉÉÉ SECTION N N SOLDERING FOOTPRINT* 7.06 F K K 0.25 (0.00) M W NOTES:. DIMENSIONING AND TOLERANCING PER ANSI Y4.5M, CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A DOES NOT INCLUDE MOLD FLASH. PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.5 (0.006) PER SIDE. 4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.00) PER SIDE. 5. DIMENSION K DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE K DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 7. DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE W. MILLIMETERS INCHES DIM MIN MAX MIN MAX A B C D F G 0.65 BSC BSC H J J K K L 6.40 BSC BSC M PITCH 6X X.26 DIMENSIONS: MILLIMETERS *For additional information on our Pb Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. 9

10 ON Semiconductor and the are registered trademarks of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries. SCILLC ow the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC s product/patent coverage may be accessed at /site/pdf/patent Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, coequential or incidental damages. Typical parameters which may be provided in SCILLC data sheets and/or specificatio can and do vary in different applicatio and actual performance may vary over time. All operating parameters, including Typicals must be validated for each customer application by customer s technical experts. SCILLC does not convey any licee under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applicatio intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless agait all claims, costs, damages, and expees, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 563, Denver, Colorado 8027 USA Phone: or Toll Free USA/Canada Fax: or Toll Free USA/Canada N. American Technical Support: Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: Japan Customer Focus Center Phone: ON Semiconductor Website: Order Literature: For additional information, please contact your local Sales Representative MC74AC38/D

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