LM317, NCV A Adjustable Output, Positive Voltage Regulator

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1 , NCV317 A able Output, Positive Voltage Regulator The is an adjustable 3terminal positive voltage regulator capable of supplying in excess of A over an output voltage range of 1.2 V to 37 V. This voltage regulator is exceptionally easy to use and requires only two external resistors to set the output voltage. Further, it employs internal current limiting, thermal shutdown and safe area compensation, making it essentially blowout proof. The serves a wide variety of applications including local, on card regulation. This device can also be used to make a programmable output regulator, or by connecting a fixed resistor between the adjustment and output, the can be used as a precision current regulator. Features Output Current in Excess of A Output able between 1.2 V and 37 V Internal Thermal Overload Protection Internal Short Circuit Current Limiting Constant with Temperature Output Transistor SafeArea Compensation Floating Operation for High Voltage Applications Eliminates Stocking many Fixed Voltages Available in Surface Mount D 2 PAK3, and Standard 3Lead Transistor Package NCV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AECQ1 Qualified and PPAP Capable These are PbFree Devices 1 Pin D 2 PAK3 D2T SUFFIX CASE 936 Heatsink surface (shown as terminal 4 in case outline drawing) is connected to Pin TO22 T SUFFIX CASE 221AB Heatsink surface connected to Pin 2. C in *.1 F I Adj 24 CO ** 1. F ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 1 of this data sheet. DEVICE MARKING INFORMATION See general marking information in the device marking section on page 1 of this data sheet. ** C in is required if regulator is located an appreciable distance from power supply filter. ** C O is not needed for stability, however, it does improve transient response V 1 I Adj Since I Adj is controlled to less than 1 A, the error associated with this term is negligible in most applications. Figure 1. Standard Application Semiconductor Components Industries, LLC, 216 January, 216 Rev Publication Order Number: /D

2 , NCV317 MAXIMUM RATINGS Rating Symbol Value Unit InputOutput Voltage Differential V I V O.3 to 4 Vdc Power Dissipation Case 221A T A = 25 C P D Internally Limited W Thermal Resistance, JunctiontoAmbient JA 65 C/W Thermal Resistance, JunctiontoCase JC 5. C/W Case 936 (D 2 PAK3) T A = 25 C P D Internally Limited W Thermal Resistance, JunctiontoAmbient JA 7 C/W Thermal Resistance, JunctiontoCase JC 5. C/W Operating Junction Temperature Range T J 55 to 15 C Storage Temperature Range T stg 65 to 15 C Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. ELECTRICAL CHARACTERISTICS (V I V O = 5. V; I O =.5 A for D2T and T packages; T J = T low to T high (Note 1); I max and P max (Note 2); unless otherwise noted.) Characteristics Figure Symbol Min Typ Max Unit Line Regulation (Note 3), T A = 25 C, 3. V V I V O 4 V 1 Reg line.1.4 %/V Load Regulation (Note 3), T A = 25 C, 1 ma I O I max V O 5. V V O 5. V 2 Reg load Thermal Regulation, T A = 25 C (Note 4), 2 ms Pulse Reg therm.3.7 % V O /W ment Pin Current 3 I Adj 5 1 A ment Pin Current Change, 2.5 V V I V O 4 V, 1, 2 I Adj.2 5. A 1 ma I L I max, P D P max Reference Voltage, 3. V V I V O 4 V, 1 ma I O I max, P D P max 3 V ref V Line Regulation (Note 3), 3. V V I V O 4 V 1 Reg line.2.7 % V mv % V O Load Regulation (Note 3), 1 ma I O I max V O 5. V V O 5. V 2 Reg load mv % V O Temperature Stability (T low T J T high ) 3 T S.7 % V O Minimum Load Current to Maintain Regulation (V I V O = 4 V) 3 I Lmin ma Maximum Output Current V I V O 15 V, P D P max, T Package V I V O = 4 V, P D P max, T A = 25 C, T Package 3 I max A RMS Noise, % of V O, T A = 25 C, 1 Hz f 1 khz N.3 % V O Ripple Rejection, V O = 1 V, f = 12 Hz (Note 5) C Adj = 1 F 4 RR db Thermal Shutdown (Note 6) 18 C LongTerm Stability, T J = T high (Note 7), T A = 25 C for Endpoint Measurements 3 S.3 1. %/1. khrs. Thermal Resistance JunctiontoCase, T Package R JC 5. C/W 1. T low to T high = to 125 C, for T, D2T. T low to T high = 4 to 125 C, for BT, BD2T, T low to T high = 55 to 15 C, for NCV317BT, BD2T. 2. I max = A, P max = 2 W 3. Load and line regulation are specified at constant junction temperature. Changes in V O due to heating effects must be taken into account separately. Pulse testing with low duty cycle is used. 4. Power dissipation within an IC voltage regulator produces a temperature gradient on the die, affecting individual IC components on the die. These effects can be minimized by proper integrated circuit design and layout techniques. Thermal Regulation is the effect of these temperature gradients on the output voltage and is expressed in percentage of output change per watt of power change in a specified time. 5. C Adj, when used, is connected between the adjustment pin and ground. 6. Thermal characteristics are not subject to production test. 7. Since LongTerm Stability cannot be measured on each device before shipment, this specification is an engineering estimate of average stability from lot to lot. 2

3 , NCV k 6.3 V k k 6.7 k 12 k 5. pf 6.8 k k 6.3 V 6.3 V 3pF 3pF 2.4 k k 5.8 k k 12.5 k 4..1 This device contains 29 active transistors. Figure 2. Representative Schematic Diagram V CC * V IH V IL V V OH OL Line Regulation (% V) V OL x 1 V OH V OL * Pulse testing required. * Duty Cycle * is suggested. C in.1 F I Adj 24 C O 1. F R L Figure 3. Line Regulation and I Adj /Line Test Circuit 3

4 , NCV317 V I C in.1 F I Adj 24 I L C O 1. F * R L (max Load) R L (min Load) V O (min Load) V O (max Load) * Pulse testing required. * Duty Cycle is suggested. V O (min Load) - V O (max Load) Load Regulation (mv) = V O (min Load) - V O (max Load) Load Regulation (% V O ) = x 1 V O (min Load) Figure 4. Load Regulation and I Adj /Load Test Circuit I L V I C in.1 F I Adj 24 V ref C O 1. F R L V O I SET * Pulse testing required. * Duty Cycle is suggested. To Calculate : = I SET 1.25 V To Calculate : Assume I SET = 5.25 ma Figure 5. Standard Test Circuit 24 V 14 V f = 12 Hz 24 D 1 * 1N42 R L = 1 V C in.1 F C O 1. F V O 1.65 k C Adj 1 F * D 1 Discharges C Adj if output is shorted to Ground. Figure 6. Ripple Rejection Test Circuit 4

5 I, NCV Δ, OUTPUT VOLTAGE CHANGE (%) = 15 V = 1 V I L = A I L =.5 A T J, JUNCTION TEMPERATURE ( C) I out, OUTPUT CURRENT (A) C -55 C , INPUT-OUTPUT VOLTAGE DIFFERENTIAL (Vdc) Figure 7. Load Regulation Figure 8. Current Limit 3., ADJUSTMENT PIN CURRENT ( A) Adj μ V ref, REFERENCE VOLTAGE (V) T J, JUNCTION TEMPERATURE ( C) Figure 9. ment Pin Current T J, JUNCTION TEMPERATURE ( C) Vin -Vout, INPUT-OUTPUT VOLTAGE I Lmin, MINIMUM OPERATING CURRENT (ma) DIFFERENTIAL (Vdc) = 1 mv T J, JUNCTION TEMPERATURE ( C) Figure 1. Dropout Voltage T J = -55 C I L = A 25 C 15 C , INPUT-OUTPUT VOLTAGE DIFFERENTIAL (Vdc) 1. A 5 ma 2 ma 2 ma Figure 11. Temperature Stability Figure 12. Minimum Operating Current 5

6 , NCV317 RR, RIPPLE REJECTION (db) = 5 V I L = 5 ma f = 12 Hz C Adj = 1 F , OUTPUT VOLTAGE (V) Figure 13. Ripple Rejection versus Output Voltage RR, RIPPLE REJECTION (db) C Adj = 1 F 4 2 = 15 V = 1 V f = 12 Hz I O, OUTPUT CURRENT (A) Figure 14. Ripple Rejection versus Output Current RR, RIPPLE REJECTION (db) I L = 5 ma = 15 V = 1 V C Adj = 1 F Z O, OUTPUT IMPEDANCE ( ) Ω = 15 V = 1 V I L = 5 ma C Adj = 1 F k 1 k 1 k 1. M 1 M k 1 k 1 k 1. M f, FREQUENCY (Hz) f, FREQUENCY (Hz) Figure 15. Ripple Rejection versus Frequency Figure 16. Output Impedance Δ, INPUT Δ, OUTPUT VOTLAGE CHANGE (V) VOLTAGE DEVIATION (V) = 1 V I L = 5 ma C L = 1. F; C Adj = 1 F C L = ; Δ, OUTPUT VOLTAGE DEVIATION (V) I L, LOAD CURRENT (A) C L = 1. F; C Adj = 1 F C L = ; = 15 V = 1 V I NL = 5 ma I L t, TIME ( s) t, TIME ( s) Figure 17. Line Transient Response Figure 18. Load Transient Response 6

7 , NCV317 APPLICATIONS INFORMATION Basic Circuit Operation The is a 3terminal floating regulator. In operation, the develops and maintains a nominal 1.25 V reference (V ref ) between its output and adjustment terminals. This reference voltage is converted to a programming current (I PROG ) by (see Figure 17), and this constant current flows through to ground. The regulated output voltage is given by: V ref 1 I Adj Since the current from the adjustment terminal (I Adj ) represents an error term in the equation, the was designed to control I Adj to less than 1 A and keep it constant. To do this, all quiescent operating current is returned to the output terminal. This imposes the requirement for a minimum load current. If the load current is less than this minimum, the output voltage will rise. Since the is a floating regulator, it is only the voltage differential across the circuit which is important to performance, and operation at high voltages with respect to ground is possible. V ref I PROG External Capacitors A.1 F disc or 1. F tantalum input bypass capacitor (C in ) is recommended to reduce the sensitivity to input line impedance. The adjustment terminal may be bypassed to ground to improve ripple rejection. This capacitor (C Adj ) prevents ripple from being amplified as the output voltage is increased. A 1 F capacitor should improve ripple rejection about 15 db at 12 Hz in a 1 V application. Although the is stable with no output capacitance, like any feedback circuit, certain values of external capacitance can cause excessive ringing. An output capacitance (C O ) in the form of a 1. F tantalum or 25 F aluminum electrolytic capacitor on the output swamps this effect and insures stability. Protection Diodes When external capacitors are used with any IC regulator it is sometimes necessary to add protection diodes to prevent the capacitors from discharging through low current points into the regulator. Figure 18 shows the with the recommended protection diodes for output voltages in excess of 25 V or high capacitance values (C O > 25 F, C Adj > 1 F). Diode D 1 prevents C O from discharging thru the IC during an input short circuit. Diode D 2 protects against capacitor C Adj discharging through the IC during an output short circuit. The combination of diodes D 1 and D 2 prevents C Adj from discharging through the IC during an input short circuit. D 1 I Adj V ref = 1.25 V Typical Figure 19. Basic Circuit Configuration 1N42 Load Regulation The is capable of providing extremely good load regulation, but a few precautions are needed to obtain maximum performance. For best performance, the programming resistor ( ) should be connected as close to the regulator as possible to minimize line drops which effectively appear in series with the reference, thereby degrading regulation. The ground end of can be returned near the load ground to provide remote ground sensing and improve load regulation. C in C O D2 C Adj 1N42 Figure 2. Voltage Regulator with Protection Diodes 7

8 , NCV317 R θja, THERMAL RESISTANCE JUNCTION TO AIR ( C/W) Free Air Mounted Vertically Minimum Size Pad P D(max) for T A = 5 C R JA L 2. oz. Copper L ÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÎÎÎÎ L, LENGTH OF COPPER (mm) P D, MAXIMUM POWER DISSIPATION (W) Figure 21. D 2 PAK Thermal Resistance and Maximum Power Dissipation versus P.C.B. Copper Length D 6 * 32 V to 4 V 1 (1).1 F 1 * Diodes D 1 and D 2 and transistor Q 2 are added to * allow adjustment of output voltage to V. Current Limit * D 6 protects both 's during an input short circuit. 1N42 1 R SC V I in2 out 2 (2) 1.K Q 1 2N V D 1 1N41 D 2 1N41 5. k Q 2 2N564 2 Voltage 1N41 IN41 24 D 5 IN41 D 3 D 4 1 F 1. F Tantalum Output Range: V O 25 V Output Range: I O A -1 V Figure 22. Laboratory Power Supply with able Current Limit and Output Voltage 8

9 , NCV V 1.25 * To provide current limiting of I O to the system * ground, the source of the FET must be tied to a * negative voltage below V. 1 I out D 1 1N41 D 2 1N41 2N D 1 * 1N42 12 MPS F 1. k TTL Control = V ref I Omax I DSS V O < BV DSS 1.25 V V SS, I Lmin - I DSS < I O < A. As shown < I O < 1. A. V ref I DDS V SS * Minimum = 1.25 V * D 1 protects the device during an input short circuit. Figure 23. able Current Limiter Figure V Electronic Shutdown Regulator I out 24 1N41 5 k I Adj MPS297 1 F I out V ref I Adj 1.25 V 1 ma I out A Figure 25. Slow TurnOn Regulator Figure 26. Current Regulator 9

10 , NCV317 ORDERING INFORMATION BD2TG Device Operating Temperature Range Package Shipping D 2 PAK3 5 Units / Rail BD2TR4G T J = 4 to 125 C D 2 PAK3 8 Tape & Reel BTG TO22 5 Units / Rail D2TG D 2 PAK3 5 Units / Rail D2TR4G T J = to 125 C D 2 PAK3 8 Tape & Reel TG TO22 5 Units / Rail NCV317BD2TG* D 2 PAK3 5 Units / Rail NCV317BD2TR4G* T J = 55 to 15 C D 2 PAK3 8 Tape & Reel NCV317BTG* TO22 5 Units / Rail For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD811/D. *NCV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AECQ1 Qualified and PPAP Capable. MARKING DIAGRAMS D 2 PAK3 D2T SUFFIX CASE 936 TO22 T SUFFIX CASE 221A LM 317BD2T AWLYWWG 2 LM 317D2T AWLYWWG 2 NC V317BD2T AWLYWWG 2 LM 317BT AWLYWWG LM 317T AWLYWWG NC V317BT AWLYWWG A WL Y WW G = Assembly Location = Wafer Lot = Year = Work Week = PbFree Package

11 , NCV317 PACKAGE DIMENSIONS D 2 PAK3 D2T SUFFIX CASE 9363 ISSUE E K B J F G R A S H OPTIONAL CHAMFER SIDE VIEW DUAL GAUGE TOP VIEW 2X D.1 (.254) M CONSTRUCTION T N P DETAIL C L M C DETAIL C T SEATING PLANE T ED V TERMINAL 4 U BOTTOM VIEW C OPTIONAL CHAMFER DETAIL C BOTTOM VIEW OPTIONAL CONSTRUCTIONS T ES SIDE VIEW SINGLE GAUGE CONSTRUCTION NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, CONTROLLING DIMENSION: INCHES. 3. TAB CONTOUR OPTIONAL WITHIN DIMENSIONS A AND K. 4. DIMENSIONS U AND V ESTABLISH A MINIMUM MOUNTING SURFACE FOR TERMINAL DIMENSIONS A AND B DO NOT INCLUDE MOLD FLASH OR GATE PROTRUSIONS. MOLD FLASH AND GATE PROTRUSIONS NOT TO EXCEED.25 (.635) MAXIMUM. 6. SINGLE GAUGE DESIGN WILL BE SHIPPED AFTER FPCN EXPIRATION IN OCTOBE11. INCHES MILLIMETERS DIM MIN MAX MIN MAX A B C D ED ES F.51 REF REF G.1 BSC 2.54 BSC H J.125 MAX MAX K.5 REF 1.27 REF L M N P R 8 8 S.116 REF REF U.2 MIN 5.8 MIN V.25 MIN 6.35 MIN SOLDERING FOOTPRINT* X X PITCH DIMENSIONS: MILLIMETERS *For additional information on our PbFree strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. 11

12 , NCV317 PACKAGE DIMENSIONS TO22, SINGLE GAUGE T SUFFIX CASE 221AB ISSUE A B F T S C T SEATING PLANE NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, CONTROLLING DIMENSION: INCHES. 3. DIMENSION Z DEFINES A ZONE WHERE ALL BODY AND LEAD IRREGULARITIES ARE ALLOWED. 4. PRODUCT SHIPPED PRIOR TO 28 HAD DIMENSIONS S = INCHES ( MM) INCHES MILLIMETERS DIM MIN MAX MIN MAX A B C D F G H J K L N Q R S T U V Z H Q Z L V G N D A K U R J ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC s product/patent coverage may be accessed at /site/pdf/patentmarking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Typical parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including Typicals must be validated for each customer application by customer s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 8217 USA Phone: or Toll Free USA/Canada Fax: or Toll Free USA/Canada N. American Technical Support: Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: Japan Customer Focus Center Phone: ON Semiconductor Website: Order Literature: For additional information, please contact your local Sales Representative /D

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