Lab #2 Activity. 4) Simulate the circuit and show instructor the simulation result.

Size: px
Start display at page:

Download "Lab #2 Activity. 4) Simulate the circuit and show instructor the simulation result."

Transcription

1 1

2 2

3 Lab #2 Activity Build the given circuit used to display numbers using a 7-segment display. The schematics on the following pages show the circuit using a common anode (CA) 7-segment display (M72) using the 74LS47 BCD to 7-segment active low decoder and the common cathode (CC) 7-segment display (M74) with the 74LS48 BCD to 7-segment active high decoder. 1) Select one of the designs (CA or CC) CA CC 2) Use the necessary datasheets 3) Show your instructor a schematic of your design (complete schematic showing all the signals, name of signals, and pin numbers). 4) Simulate the circuit and show instructor the simulation result. 5) Build the circuit and show your instructor the working circuit. Do not take the circuit apart as it is used in lab activity #3! 3

4 Lab #2 Activity A0 A1 A2 A3 (A0 A3 signals are generated by using 4 Switches located on the digital module card) 74LS47 BCD To 7-seg Decoder active Low outputs a g CA 7-segment display +5v R 470Ω Common Anode 7-segment display design 4

5 Lab #2 Activity A0 A1 A2 A3 (A0 A3 signals are generated by using 4 Switches located on the digital module card) 74LS48 BCD To 7-seg Decoder active High outputs a g CC 7-segment display Ground R 470Ω Common Cathode 7-segment display design 5

6 Lab #2 Activity 6

7 Lab #2 Activity 74LS47 Connection Data 74LS47 7

8 Lab #2 Activity 74LS47 Truth Table 8

9 Lab #2 Activity Common Anode: M72 9

10 Lab #2 Activity Common Cathode: M74 10

11 11

12 Lab #3 Activity Build a circuit that will add two 4-bit binary numbers (A0 A3 and B0 B3). Use the 74LS83 full adder chip to perform this 4-bit addition. Display the sum value using the common anode 7-segment display or the common cathode display (M74 C/D) built in lab activity #2. As well, display the carry bit. A block diagram of this circuit is shown on the next two pages. 1) Show your instructor a schematic of your design (complete schematic showing all the signals, name of signals, and pin numbers). 4) Simulate the circuit and show instructor the simulation result. 5) Build the circuit and show your instructor the working circuit. Do not take the circuit apart as it is used in lab activity #4! 12

13 Lab #3 Activity S 0 S 3 74ls83 4-bit Full Adder Cin GND A D BCD To 7-seg decoder 74LS47 a g CA 7-segment display Cout R 470 Ohms A3 A2 A1A0 B3 B2 B1 B0 Switches Carry bit LED +5 v (Digital Module) Common Anode 7-segment display design 13

14 Lab #3 Activity S 0 S 3 74ls83 4-bit Full Adder Cin GND A D BCD To 7-seg decoder 74LS48 a g CC 7-segment display Cout R 470 Ohms A3 A2 A1A0 B3 B2 B1 B0 Switches Carry bit LED Gnd (Digital Module) Common Cathode 7-segment display design 14

15 15

16 Lab #4 Activity Build a circuit that will add and subtract two 4-bit binary numbers (A0 A3 and B0 B3). Use the 74LS83 full adder circuit, (used in lab activity #3), and add XOR gates to perform the 4-bit addition & subtraction. Display the sum value using the common anode 7-segment display or the common cathode display (M74 C/D) used in lab activity #3. A block diagram of this circuit is shown on the next two pages. 1) Show your instructor a schematic of your design (complete schematic showing all the signals, name of signals, and pin numbers). 4) Simulate the circuit and show instructor the simulation result. 5) Build the circuit and show your instructor the working circuit. Do not take the circuit apart as it is used in lab activity #5! 16

17 Lab #4 Activity 2 s Complement Adder &Subtract circuit To 7-segment display circuit from lab activity #3 74ls86 Carry bit LED 17 17

18 18

19 Lab #5 Activity Build a circuit that will compare two 4-bit binary numbers (A0 A3 and B0 B3). Use the 74LS85 comparator chip to perform this 4-bit comparison. Display, using three LEDs, whether A = B, A > B or A < B. Use the adder circuit and the common anode 7-segment display or the common cathode display (M74 C/D) used in lab activity #4. A block diagram of this circuit is shown on the next two pages. 1) Show your instructor a schematic of your design (complete schematic showing all the signals, name of signals, and pin numbers). 4) Simulate the circuit and show instructor the simulation result. 5) Build the circuit and show your instructor the working circuit. 19

20 Lab #5 Activity S 0 S 3 74ls83 4-bit Full Adder Cin Cout A D + BCD To 7-seg decoder 74LS47 a g CA 7-segment display LED R 470 Ohms 74ls86 A3 A2 A1A0 B3 B2 B1 B0 Switches (Digital Module) Common Anode 7-segment display design 74ls85 4-bit Comparator A<B A>B A=B +5v 20

21 Lab #5 Activity S 0 S 3 74ls83 4-bit Full Adder Cin Cout GND A D BCD To 7-seg decoder 74LS48 a g CC 7-segment display R 470 Ohms 74ls86 A3 A2 A1A0 B3 B2 B1 B0 Switches (Digital Module) Carry bit LED Common Cathode 7-segment display design 74ls85 4-bit Comparator A<B A>B A=B Gnd 21

COMBINATIONAL CIRCUITS

COMBINATIONAL CIRCUITS COMBINATIONAL CIRCUITS http://www.tutorialspoint.com/computer_logical_organization/combinational_circuits.htm Copyright tutorialspoint.com Combinational circuit is a circuit in which we combine the different

More information

United States Naval Academy Electrical and Computer Engineering Department. EC262 Exam 1

United States Naval Academy Electrical and Computer Engineering Department. EC262 Exam 1 United States Naval Academy Electrical and Computer Engineering Department EC262 Exam 29 September 2. Do a page check now. You should have pages (cover & questions). 2. Read all problems in their entirety.

More information

1. True or False? A voltage level in the range 0 to 2 volts is interpreted as a binary 1.

1. True or False? A voltage level in the range 0 to 2 volts is interpreted as a binary 1. File: chap04, Chapter 04 1. True or False? A voltage level in the range 0 to 2 volts is interpreted as a binary 1. 2. True or False? A gate is a device that accepts a single input signal and produces one

More information

The components. E3: Digital electronics. Goals:

The components. E3: Digital electronics. Goals: E3: Digital electronics Goals: Basic understanding of logic circuits. Become familiar with the most common digital components and their use. Equipment: 1 st. LED bridge 1 st. 7-segment display. 2 st. IC

More information

List of Experiment. 8. To study and verify the BCD to Seven Segments DECODER.(IC-7447).

List of Experiment. 8. To study and verify the BCD to Seven Segments DECODER.(IC-7447). G. H. RAISONI COLLEGE OF ENGINEERING, NAGPUR Department of Electronics & Communication Engineering Branch:-4 th Semester[Electronics] Subject: - Digital Circuits List of Experiment Sr. Name Of Experiment

More information

Seven-Segment LED Displays

Seven-Segment LED Displays Seven-Segment LED Displays Nicholas Neumann 11/19/2010 Abstract Seven-segment displays are electronic display devices used as an easy way to display decimal numerals and an alterative to the more complex

More information

Digital Fundamentals. Lab 8 Asynchronous Counter Applications

Digital Fundamentals. Lab 8 Asynchronous Counter Applications Richland College Engineering Technology Rev. 0 B. Donham Rev. 1 (7/2003). Horne Rev. 2 (1/2008). Bradbury Digital Fundamentals CETT 1425 Lab 8 Asynchronous Counter Applications Name: Date: Objectives:

More information

Sistemas Digitais I LESI - 2º ano

Sistemas Digitais I LESI - 2º ano Sistemas Digitais I LESI - 2º ano Lesson 6 - Combinational Design Practices Prof. João Miguel Fernandes (miguel@di.uminho.pt) Dept. Informática UNIVERSIDADE DO MINHO ESCOLA DE ENGENHARIA - PLDs (1) - The

More information

EXPERIMENT 8. Flip-Flops and Sequential Circuits

EXPERIMENT 8. Flip-Flops and Sequential Circuits EXPERIMENT 8. Flip-Flops and Sequential Circuits I. Introduction I.a. Objectives The objective of this experiment is to become familiar with the basic operational principles of flip-flops and counters.

More information

Digital Electronics Detailed Outline

Digital Electronics Detailed Outline Digital Electronics Detailed Outline Unit 1: Fundamentals of Analog and Digital Electronics (32 Total Days) Lesson 1.1: Foundations and the Board Game Counter (9 days) 1. Safety is an important concept

More information

Digital circuits make up all computers and computer systems. The operation of digital circuits is based on

Digital circuits make up all computers and computer systems. The operation of digital circuits is based on Digital Logic Circuits Digital circuits make up all computers and computer systems. The operation of digital circuits is based on Boolean algebra, the mathematics of binary numbers. Boolean algebra is

More information

Understanding Logic Design

Understanding Logic Design Understanding Logic Design ppendix of your Textbook does not have the needed background information. This document supplements it. When you write add DD R0, R1, R2, you imagine something like this: R1

More information

Binary Adders: Half Adders and Full Adders

Binary Adders: Half Adders and Full Adders Binary Adders: Half Adders and Full Adders In this set of slides, we present the two basic types of adders: 1. Half adders, and 2. Full adders. Each type of adder functions to add two binary bits. In order

More information

earlier in the semester: The Full adder above adds two bits and the output is at the end. So if we do this eight times, we would have an 8-bit adder.

earlier in the semester: The Full adder above adds two bits and the output is at the end. So if we do this eight times, we would have an 8-bit adder. The circuit created is an 8-bit adder. The 8-bit adder adds two 8-bit binary inputs and the result is produced in the output. In order to create a Full 8-bit adder, I could use eight Full -bit adders and

More information

Figure 8-1 Four Possible Results of Adding Two Bits

Figure 8-1 Four Possible Results of Adding Two Bits CHPTER EIGHT Combinational Logic pplications Thus far, our discussion has focused on the theoretical design issues of computer systems. We have not yet addressed any of the actual hardware you might find

More information

Gates, Circuits, and Boolean Algebra

Gates, Circuits, and Boolean Algebra Gates, Circuits, and Boolean Algebra Computers and Electricity A gate is a device that performs a basic operation on electrical signals Gates are combined into circuits to perform more complicated tasks

More information

Operating Manual Ver.1.1

Operating Manual Ver.1.1 4 Bit Binary Ripple Counter (Up-Down Counter) Operating Manual Ver.1.1 An ISO 9001 : 2000 company 94-101, Electronic Complex Pardesipura, Indore- 452010, India Tel : 91-731- 2570301/02, 4211100 Fax: 91-731-

More information

NEW adder cells are useful for designing larger circuits despite increase in transistor count by four per cell.

NEW adder cells are useful for designing larger circuits despite increase in transistor count by four per cell. CHAPTER 4 THE ADDER The adder is one of the most critical components of a processor, as it is used in the Arithmetic Logic Unit (ALU), in the floating-point unit and for address generation in case of cache

More information

A Digital Timer Implementation using 7 Segment Displays

A Digital Timer Implementation using 7 Segment Displays A Digital Timer Implementation using 7 Segment Displays Group Members: Tiffany Sham u2548168 Michael Couchman u4111670 Simon Oseineks u2566139 Caitlyn Young u4233209 Subject: ENGN3227 - Analogue Electronics

More information

INTEGRATED CIRCUITS. For a complete data sheet, please also download:

INTEGRATED CIRCUITS. For a complete data sheet, please also download: INTEGRATED CIRCUITS DATA SHEET For a complete data sheet, please also download: The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications The IC06 74HC/HCT/HCU/HCMOS Logic Package Information The IC06 74HC/HCT/HCU/HCMOS

More information

Upon completion of unit 1.1, students will be able to

Upon completion of unit 1.1, students will be able to Upon completion of unit 1.1, students will be able to 1. Demonstrate safety of the individual, class, and overall environment of the classroom/laboratory, and understand that electricity, even at the nominal

More information

DEPARTMENT OF INFORMATION TECHNLOGY

DEPARTMENT OF INFORMATION TECHNLOGY DRONACHARYA GROUP OF INSTITUTIONS, GREATER NOIDA Affiliated to Mahamaya Technical University, Noida Approved by AICTE DEPARTMENT OF INFORMATION TECHNLOGY Lab Manual for Computer Organization Lab ECS-453

More information

Let s put together a Manual Processor

Let s put together a Manual Processor Lecture 14 Let s put together a Manual Processor Hardware Lecture 14 Slide 1 The processor Inside every computer there is at least one processor which can take an instruction, some operands and produce

More information

3-Digit Counter and Display

3-Digit Counter and Display ECE 2B Winter 2007 Lab #7 7 3-Digit Counter and Display This final lab brings together much of what we have done in our lab experiments this quarter to construct a simple tachometer circuit for measuring

More information

Two's Complement Adder/Subtractor Lab L03

Two's Complement Adder/Subtractor Lab L03 Two's Complement Adder/Subtractor Lab L03 Introduction Computers are usually designed to perform indirect subtraction instead of direct subtraction. Adding -B to A is equivalent to subtracting B from A,

More information

Decimal Number (base 10) Binary Number (base 2)

Decimal Number (base 10) Binary Number (base 2) LECTURE 5. BINARY COUNTER Before starting with counters there is some vital information that needs to be understood. The most important is the fact that since the outputs of a digital chip can only be

More information

AUTOMATIC NIGHT LAMP WITH MORNING ALARM USING MICROPROCESSOR

AUTOMATIC NIGHT LAMP WITH MORNING ALARM USING MICROPROCESSOR AUTOMATIC NIGHT LAMP WITH MORNING ALARM USING MICROPROCESSOR INTRODUCTION This Project "Automatic Night Lamp with Morning Alarm" was developed using Microprocessor. It is the Heart of the system. The sensors

More information

Combinational circuits

Combinational circuits Combinational circuits Combinational circuits are stateless The outputs are functions only of the inputs Inputs Combinational circuit Outputs 3 Thursday, September 2, 3 Enabler Circuit (High-level view)

More information

BINARY CODED DECIMAL: B.C.D.

BINARY CODED DECIMAL: B.C.D. BINARY CODED DECIMAL: B.C.D. ANOTHER METHOD TO REPRESENT DECIMAL NUMBERS USEFUL BECAUSE MANY DIGITAL DEVICES PROCESS + DISPLAY NUMBERS IN TENS IN BCD EACH NUMBER IS DEFINED BY A BINARY CODE OF 4 BITS.

More information

DM9368 7-Segment Decoder/Driver/Latch with Constant Current Source Outputs

DM9368 7-Segment Decoder/Driver/Latch with Constant Current Source Outputs DM9368 7-Segment Decoder/Driver/Latch with Constant Current Source Outputs General Description The DM9368 is a 7-segment decoder driver incorporating input latches and constant current output circuits

More information

DM74LS47 BCD to 7-Segment Decoder/Driver with Open-Collector Outputs

DM74LS47 BCD to 7-Segment Decoder/Driver with Open-Collector Outputs DM74LS47 BCD to 7-Segment Decoder/Driver with Open-Collector Outputs General Description The DM74LS47 accepts four lines of BCD (8421) input data, generates their complements internally and decodes the

More information

Chapter 4 Register Transfer and Microoperations. Section 4.1 Register Transfer Language

Chapter 4 Register Transfer and Microoperations. Section 4.1 Register Transfer Language Chapter 4 Register Transfer and Microoperations Section 4.1 Register Transfer Language Digital systems are composed of modules that are constructed from digital components, such as registers, decoders,

More information

Lab 17: Building a 4-Digit 7-Segment LED Decoder

Lab 17: Building a 4-Digit 7-Segment LED Decoder Phys2303 L.A. Bumm [Nexys 1.1.2] Lab 17 (p1) Lab 17: Building a 4-Digit 7-Segment LED Decoder In this lab your will make 4 test circuits, the 4-digit 7-segment decoder, and demonstration circuit using

More information

ELEC 2210 - EXPERIMENT 1 Basic Digital Logic Circuits

ELEC 2210 - EXPERIMENT 1 Basic Digital Logic Circuits Objectives ELEC - EXPERIMENT Basic Digital Logic Circuits The experiments in this laboratory exercise will provide an introduction to digital electronic circuits. You will learn how to use the IDL-00 Bit

More information

Gray Code Generator and Decoder by Carsten Kristiansen Napier University. November 2004

Gray Code Generator and Decoder by Carsten Kristiansen Napier University. November 2004 Gray Code Generator and Decoder by Carsten Kristiansen Napier University November 2004 Title page Author: Carsten Kristiansen. Napier No: 04007712. Assignment title: Design of a Gray Code Generator and

More information

Karnaugh Maps (K-map) Alternate representation of a truth table

Karnaugh Maps (K-map) Alternate representation of a truth table Karnaugh Maps (K-map) lternate representation of a truth table Red decimal = minterm value Note that is the MS for this minterm numbering djacent squares have distance = 1 Valuable tool for logic minimization

More information

ETEC 2301 Programmable Logic Devices. Chapter 10 Counters. Shawnee State University Department of Industrial and Engineering Technologies

ETEC 2301 Programmable Logic Devices. Chapter 10 Counters. Shawnee State University Department of Industrial and Engineering Technologies ETEC 2301 Programmable Logic Devices Chapter 10 Counters Shawnee State University Department of Industrial and Engineering Technologies Copyright 2007 by Janna B. Gallaher Asynchronous Counter Operation

More information

ENGI 241 Experiment 5 Basic Logic Gates

ENGI 241 Experiment 5 Basic Logic Gates ENGI 24 Experiment 5 Basic Logic Gates OBJECTIVE This experiment will examine the operation of the AND, NAND, OR, and NOR logic gates and compare the expected outputs to the truth tables for these devices.

More information

LFSR BASED COUNTERS AVINASH AJANE, B.E. A technical report submitted to the Graduate School. in partial fulfillment of the requirements

LFSR BASED COUNTERS AVINASH AJANE, B.E. A technical report submitted to the Graduate School. in partial fulfillment of the requirements LFSR BASED COUNTERS BY AVINASH AJANE, B.E A technical report submitted to the Graduate School in partial fulfillment of the requirements for the degree Master of Science in Electrical Engineering New Mexico

More information

Design Example: Counters. Design Example: Counters. 3-Bit Binary Counter. 3-Bit Binary Counter. Other useful counters:

Design Example: Counters. Design Example: Counters. 3-Bit Binary Counter. 3-Bit Binary Counter. Other useful counters: Design Eample: ers er: a sequential circuit that repeats a specified sequence of output upon clock pulses. A,B,C,, Z. G, O, T, E, R, P, S,!.,,,,,,,7. 7,,,,,,,.,,,,,,,,,,,. Binary counter: follows the binary

More information

VENDING MACHINE. ECE261 Project Proposal Presentaion. Members: ZHANG,Yulin CHEN, Zhe ZHANG,Yanni ZHANG,Yayuan

VENDING MACHINE. ECE261 Project Proposal Presentaion. Members: ZHANG,Yulin CHEN, Zhe ZHANG,Yanni ZHANG,Yayuan VENDING MACHINE ECE261 Project Proposal Presentaion Members: ZHANG,Yulin CHEN, Zhe ZHANG,Yanni ZHANG,Yayuan Abstract This project will design and implement a coin operated vending machine controller The

More information

ASYNCHRONOUS COUNTERS

ASYNCHRONOUS COUNTERS LB no.. SYNCHONOUS COUNTES. Introduction Counters are sequential logic circuits that counts the pulses applied at their clock input. They usually have 4 bits, delivering at the outputs the corresponding

More information

5 Combinatorial Components. 5.0 Full adder. Full subtractor

5 Combinatorial Components. 5.0 Full adder. Full subtractor 5 Combatorial Components Use for data transformation, manipulation, terconnection, and for control: arithmetic operations - addition, subtraction, multiplication and division. logic operations - AND, OR,

More information

Robot Board Sub-System Testing. Abstract. Introduction and Theory. Equipment. Procedures. EE 101 Spring 2006 Date: Lab Section # Lab #6

Robot Board Sub-System Testing. Abstract. Introduction and Theory. Equipment. Procedures. EE 101 Spring 2006 Date: Lab Section # Lab #6 EE 101 Spring 2006 Date: Lab Section # Lab #6 Name: Robot Board Sub-System Testing Partner: No Lab partners this time! Abstract The ECEbot robots have a printed circuit board (PCB) containing most of the

More information

Xilinx ISE. <Release Version: 10.1i> Tutorial. Department of Electrical and Computer Engineering State University of New York New Paltz

Xilinx ISE. <Release Version: 10.1i> Tutorial. Department of Electrical and Computer Engineering State University of New York New Paltz Xilinx ISE Tutorial Department of Electrical and Computer Engineering State University of New York New Paltz Fall 2010 Baback Izadi Starting the ISE Software Start ISE from the

More information

INTEGRATED CIRCUITS. For a complete data sheet, please also download:

INTEGRATED CIRCUITS. For a complete data sheet, please also download: INTEGRATED CIRCUITS DATA SEET For a complete data sheet, please also download: The IC6 74C/CT/CU/CMOS ogic Family Specifications The IC6 74C/CT/CU/CMOS ogic Package Information The IC6 74C/CT/CU/CMOS ogic

More information

Interfacing To Alphanumeric Displays

Interfacing To Alphanumeric Displays Interfacing To Alphanumeric Displays To give directions or data values to users, many microprocessor-controlled instruments and machines need to display letters of the alphabet and numbers. In systems

More information

Digital Systems Laboratory

Digital Systems Laboratory Eskişehir Osmangazi University Digital Systems Laboratory Rev 3.01 February 2011 LIST OF EXPERIMENTS 1. BINARY AND DECIMAL NUMBERS 2. DIGITAL LOGIC GATES 3. INTRODUCTION TO LOGICWORKS 4. BOOLEAN ALGEBRA

More information

FORDHAM UNIVERSITY CISC 3593. Dept. of Computer and Info. Science Spring, 2011. Lab 2. The Full-Adder

FORDHAM UNIVERSITY CISC 3593. Dept. of Computer and Info. Science Spring, 2011. Lab 2. The Full-Adder FORDHAM UNIVERSITY CISC 3593 Fordham College Lincoln Center Computer Organization Dept. of Computer and Info. Science Spring, 2011 Lab 2 The Full-Adder 1 Introduction In this lab, the student will construct

More information

2011, The McGraw-Hill Companies, Inc. Chapter 3

2011, The McGraw-Hill Companies, Inc. Chapter 3 Chapter 3 3.1 Decimal System The radix or base of a number system determines the total number of different symbols or digits used by that system. The decimal system has a base of 10 with the digits 0 through

More information

RUTGERS UNIVERSITY Department of Electrical and Computer Engineering 14:332:233 DIGITAL LOGIC DESIGN LABORATORY

RUTGERS UNIVERSITY Department of Electrical and Computer Engineering 14:332:233 DIGITAL LOGIC DESIGN LABORATORY RUTGERS UNIVERSITY Department of Electrical and Computer Engineering 14:332:233 DIGITAL LOGIC DESIGN LABORATORY Fall 2012 Contents 1 LABORATORY No 1 3 11 Equipment 3 12 Protoboard 4 13 The Input-Control/Output-Display

More information

Karnaugh Maps & Combinational Logic Design. ECE 152A Winter 2012

Karnaugh Maps & Combinational Logic Design. ECE 152A Winter 2012 Karnaugh Maps & Combinational Logic Design ECE 52A Winter 22 Reading Assignment Brown and Vranesic 4 Optimized Implementation of Logic Functions 4. Karnaugh Map 4.2 Strategy for Minimization 4.2. Terminology

More information

Lecture 12: More on Registers, Multiplexers, Decoders, Comparators and Wot- Nots

Lecture 12: More on Registers, Multiplexers, Decoders, Comparators and Wot- Nots Lecture 12: More on Registers, Multiplexers, Decoders, Comparators and Wot- Nots Registers As you probably know (if you don t then you should consider changing your course), data processing is usually

More information

ECE410 Design Project Spring 2008 Design and Characterization of a CMOS 8-bit Microprocessor Data Path

ECE410 Design Project Spring 2008 Design and Characterization of a CMOS 8-bit Microprocessor Data Path ECE410 Design Project Spring 2008 Design and Characterization of a CMOS 8-bit Microprocessor Data Path Project Summary This project involves the schematic and layout design of an 8-bit microprocessor data

More information

EMERGING DISPLAY CUSTOMER ACCEPTANCE SPECIFICATIONS 16290(LED TYPES) EXAMINED BY : FILE NO. CAS-10251 ISSUE : JUL.03,2001 TOTAL PAGE : 7

EMERGING DISPLAY CUSTOMER ACCEPTANCE SPECIFICATIONS 16290(LED TYPES) EXAMINED BY : FILE NO. CAS-10251 ISSUE : JUL.03,2001 TOTAL PAGE : 7 EXAMINED BY : FILE NO. CAS-10251 EMERGING DISPLAY ISSUE : JUL.03,2001 APPROVED BY: TECHNOLOGIES CORPORATION TOTAL PAGE : 7 VERSION : 1 CUSTOMER ACCEPTANCE SPECIFICATIONS MODEL NO. : 16290(LED TYPES) FOR

More information

EXPERIMENT 4. Parallel Adders, Subtractors, and Complementors

EXPERIMENT 4. Parallel Adders, Subtractors, and Complementors EXPERIMENT 4. Parallel Adders, Subtractors, and Complementors I. Introduction I.a. Objectives In this experiment, parallel adders, subtractors and complementors will be designed and investigated. In the

More information

Counters and Decoders

Counters and Decoders Physics 3330 Experiment #10 Fall 1999 Purpose Counters and Decoders In this experiment, you will design and construct a 4-bit ripple-through decade counter with a decimal read-out display. Such a counter

More information

Experiment # 9. Clock generator circuits & Counters. Eng. Waleed Y. Mousa

Experiment # 9. Clock generator circuits & Counters. Eng. Waleed Y. Mousa Experiment # 9 Clock generator circuits & Counters Eng. Waleed Y. Mousa 1. Objectives: 1. Understanding the principles and construction of Clock generator. 2. To be familiar with clock pulse generation

More information

exclusive-or and Binary Adder R eouven Elbaz reouven@uwaterloo.ca Office room: DC3576

exclusive-or and Binary Adder R eouven Elbaz reouven@uwaterloo.ca Office room: DC3576 exclusive-or and Binary Adder R eouven Elbaz reouven@uwaterloo.ca Office room: DC3576 Outline exclusive OR gate (XOR) Definition Properties Examples of Applications Odd Function Parity Generation and Checking

More information

POINTS POSITION INDICATOR PPI4

POINTS POSITION INDICATOR PPI4 POINTS POSITION INDICATOR PPI4 Advanced PPI with Adjustable Brightness & Simplified Wiring Monitors the brief positive operating voltage across points motors when they are switched Lights a corresponding

More information

CMOS Binary Full Adder

CMOS Binary Full Adder CMOS Binary Full Adder A Survey of Possible Implementations Group : Eren Turgay Aaron Daniels Michael Bacelieri William Berry - - Table of Contents Key Terminology...- - Introduction...- 3 - Design Architectures...-

More information

CHAPTER 3 Boolean Algebra and Digital Logic

CHAPTER 3 Boolean Algebra and Digital Logic CHAPTER 3 Boolean Algebra and Digital Logic 3.1 Introduction 121 3.2 Boolean Algebra 122 3.2.1 Boolean Expressions 123 3.2.2 Boolean Identities 124 3.2.3 Simplification of Boolean Expressions 126 3.2.4

More information

Active Learning in the Introduction to Digital Logic Design Laboratory Course

Active Learning in the Introduction to Digital Logic Design Laboratory Course Active Learning in the Introduction to Digital Logic Design Laboratory Course Jing Pang Department of Electrical and Electronic Engineering, Computer Engineering Program, California State University, Sacramento,

More information

EMERGING DISPLAY CUSTOMER ACCEPTANCE SPECIFICATIONS 20400 (LED TYPES) EXAMINED BY : FILE NO. CAS-10184 ISSUE : DEC.01,1999 TOTAL PAGE : 7 APPROVED BY:

EMERGING DISPLAY CUSTOMER ACCEPTANCE SPECIFICATIONS 20400 (LED TYPES) EXAMINED BY : FILE NO. CAS-10184 ISSUE : DEC.01,1999 TOTAL PAGE : 7 APPROVED BY: EXAMINED BY : FILE NO. CAS-10184 APPROVED BY: EMERGING DISPLAY TECHNOLOGIES CORPORATION ISSUE : DEC.01,1999 TOTAL PAGE : 7 VERSION : 2 CUSTOMER ACCEPTANCE SPECIFICATIONS MODEL NO. : 20400 (LED TYPES) FOR

More information

A Lesson on Digital Clocks, One Shots and Counters

A Lesson on Digital Clocks, One Shots and Counters A Lesson on Digital Clocks, One Shots and Counters Topics Clocks & Oscillators LM 555 Timer IC Crystal Oscillators Selection of Variable Resistors Schmitt Gates Power-On Reset Circuits One Shots Counters

More information

Digital Logic Design. Basics Combinational Circuits Sequential Circuits. Pu-Jen Cheng

Digital Logic Design. Basics Combinational Circuits Sequential Circuits. Pu-Jen Cheng Digital Logic Design Basics Combinational Circuits Sequential Circuits Pu-Jen Cheng Adapted from the slides prepared by S. Dandamudi for the book, Fundamentals of Computer Organization and Design. Introduction

More information

A Lesson on Digital Clocks, One Shots and Counters

A Lesson on Digital Clocks, One Shots and Counters A Lesson on Digital Clocks, One Shots and Counters Topics Clocks & Oscillators LM 555 Timer IC Crystal Oscillators Selection of Variable Resistors Schmitt Gates Power-On Reset Circuits One Shots Counters

More information

MIDECO 64-outputs MIDI note decoder USER MANUAL. Roman Sowa 2012

MIDECO 64-outputs MIDI note decoder USER MANUAL. Roman Sowa 2012 MIDECO 64-outputs MIDI note decoder USER MANUAL Roman Sowa 2012 www.midi-hardware.com 1.Overview Thank you for choosing MIDECO as your new MIDI-to-digital converter. This short manual will guide you through

More information

EMERGING DISPLAY CUSTOMER ACCEPTANCE SPECIFICATIONS 16400(LED TYPES) EXAMINED BY : FILE NO. CAS-10068 ISSUE : JAN.19,2000 TOTAL PAGE : 7 APPROVED BY:

EMERGING DISPLAY CUSTOMER ACCEPTANCE SPECIFICATIONS 16400(LED TYPES) EXAMINED BY : FILE NO. CAS-10068 ISSUE : JAN.19,2000 TOTAL PAGE : 7 APPROVED BY: EXAMINED BY : FILE NO. CAS-10068 APPROVED BY: EMERGING DISPLAY TECHNOLOGIES CORPORATION ISSUE : JAN.19,2000 TOTAL PAGE : 7 VERSION : 3 CUSTOMER ACCEPTANCE SPECIFICATIONS MODEL NO. : 16400(LED TYPES) FOR

More information

Copyright Peter R. Rony 2009. All rights reserved.

Copyright Peter R. Rony 2009. All rights reserved. Experiment No. 1. THE DIGI DESIGNER Experiment 1-1. Socket Connections on the Digi Designer Experiment No. 2. LOGIC LEVELS AND THE 7400 QUADRUPLE 2-INPUT POSITIVE NAND GATE Experiment 2-1. Truth Table

More information

TIL311 HEXADECIMAL DISPLAY WITH LOGIC

TIL311 HEXADECIMAL DISPLAY WITH LOGIC SOLID-STATE HEXADECIMAL DISPLAY WITH INTEGRAL TTL CIRCUIT TO ACCEPT, STORE, AND DISPLAY 4-BIT BINARY DATA 0.300-Inch (7,62-mm) Character Height Internal TTL MSI Chip With Latch, Decoder, High Brightness

More information

Guru Ghasidas Vishwavidyalaya, Bilaspur (C.G.) Institute of Technology. Electronics & Communication Engineering. B.

Guru Ghasidas Vishwavidyalaya, Bilaspur (C.G.) Institute of Technology. Electronics & Communication Engineering. B. Guru Ghasidas Vishwavidyalaya, Bilaspur (C.G.) Institute of Technology Electronics & Communication Engineering B.Tech III Semester 1. Electronic Devices Laboratory 2. Digital Logic Circuit Laboratory 3.

More information

CSE140: Components and Design Techniques for Digital Systems

CSE140: Components and Design Techniques for Digital Systems CSE4: Components and Design Techniques for Digital Systems Tajana Simunic Rosing What we covered thus far: Number representations Logic gates Boolean algebra Introduction to CMOS HW#2 due, HW#3 assigned

More information

Two-level logic using NAND gates

Two-level logic using NAND gates CSE140: Components and Design Techniques for Digital Systems Two and Multilevel logic implementation Tajana Simunic Rosing 1 Two-level logic using NND gates Replace minterm ND gates with NND gates Place

More information

Lab 1: Full Adder 0.0

Lab 1: Full Adder 0.0 Lab 1: Full Adder 0.0 Introduction In this lab you will design a simple digital circuit called a full adder. You will then use logic gates to draw a schematic for the circuit. Finally, you will verify

More information

INTEGRATED CIRCUITS. For a complete data sheet, please also download:

INTEGRATED CIRCUITS. For a complete data sheet, please also download: INTEGRATED CIRCUITS DATA SEET For a complete data sheet, please also download: The IC06 74C/CT/CU/CMOS ogic Family Specifications The IC06 74C/CT/CU/CMOS ogic Package Information The IC06 74C/CT/CU/CMOS

More information

EC313 - VHDL State Machine Example

EC313 - VHDL State Machine Example EC313 - VHDL State Machine Example One of the best ways to learn how to code is seeing a working example. Below is an example of a Roulette Table Wheel. Essentially Roulette is a game that selects a random

More information

Verification & Design Techniques Used in a Graduate Level VHDL Course

Verification & Design Techniques Used in a Graduate Level VHDL Course Verification & Design Techniques Used in a Graduate Level VHDL Course Prof. Swati Agrawal, BE, MS (SUNY, Buffalo, NY USA) 1 Associate Professor, Department of Electronics & Telecommunication, Bhilai Institute

More information

Systems I: Computer Organization and Architecture

Systems I: Computer Organization and Architecture Systems I: Computer Organization and Architecture Lecture 9 - Register Transfer and Microoperations Microoperations Digital systems are modular in nature, with modules containing registers, decoders, arithmetic

More information

Having read this workbook you should be able to: recognise the arrangement of NAND gates used to form an S-R flip-flop.

Having read this workbook you should be able to: recognise the arrangement of NAND gates used to form an S-R flip-flop. Objectives Having read this workbook you should be able to: recognise the arrangement of NAND gates used to form an S-R flip-flop. describe how such a flip-flop can be SET and RESET. describe the disadvantage

More information

Hexadecimal and Numeric Indicators. Technical Data 5082-7300 5082-7302 5082-7304 5082-7340

Hexadecimal and Numeric Indicators. Technical Data 5082-7300 5082-7302 5082-7304 5082-7340 H Hexadecimal and Numeric Indicators Technical Data 5082-7300 5082-7302 5082-7304 5082-7340 Features Numeric 5082-7300/-7302 0-9, Test State, Minus Sign, Blank States Decimal Point 7300 Right Hand D.P.

More information

PLL frequency synthesizer

PLL frequency synthesizer ANALOG & TELECOMMUNICATION ELECTRONICS LABORATORY EXERCISE 4 Lab 4: PLL frequency synthesizer 1.1 Goal The goals of this lab exercise are: - Verify the behavior of a and of a complete PLL - Find capture

More information

Lecture 5: Gate Logic Logic Optimization

Lecture 5: Gate Logic Logic Optimization Lecture 5: Gate Logic Logic Optimization MAH, AEN EE271 Lecture 5 1 Overview Reading McCluskey, Logic Design Principles- or any text in boolean algebra Introduction We could design at the level of irsim

More information

COMBINATIONAL and SEQUENTIAL LOGIC CIRCUITS Hardware implementation and software design

COMBINATIONAL and SEQUENTIAL LOGIC CIRCUITS Hardware implementation and software design PH-315 COMINATIONAL and SEUENTIAL LOGIC CIRCUITS Hardware implementation and software design A La Rosa I PURPOSE: To familiarize with combinational and sequential logic circuits Combinational circuits

More information

Unit 3 Boolean Algebra (Continued)

Unit 3 Boolean Algebra (Continued) Unit 3 Boolean Algebra (Continued) 1. Exclusive-OR Operation 2. Consensus Theorem Department of Communication Engineering, NCTU 1 3.1 Multiplying Out and Factoring Expressions Department of Communication

More information

Combinational Logic Design

Combinational Logic Design Chapter 4 Combinational Logic Design The foundations for the design of digital logic circuits were established in the preceding chapters. The elements of Boolean algebra (two-element switching algebra

More information

Table 1 Comparison of DC, Uni-Polar and Bi-polar Stepper Motors

Table 1 Comparison of DC, Uni-Polar and Bi-polar Stepper Motors Electronics Exercise 3: Uni-Polar Stepper Motor Controller / Driver Mechatronics Instructional Laboratory Woodruff School of Mechanical Engineering Georgia Institute of Technology Lab Director: I. Charles

More information

SECTION C [short essay] [Not to exceed 120 words, Answer any SIX questions. Each question carries FOUR marks] 6 x 4=24 marks

SECTION C [short essay] [Not to exceed 120 words, Answer any SIX questions. Each question carries FOUR marks] 6 x 4=24 marks UNIVERSITY OF KERALA First Degree Programme in Computer Applications Model Question Paper Semester I Course Code- CP 1121 Introduction to Computer Science TIME : 3 hrs Maximum Mark: 80 SECTION A [Very

More information

A single register, called the accumulator, stores the. operand before the operation, and stores the result. Add y # add y from memory to the acc

A single register, called the accumulator, stores the. operand before the operation, and stores the result. Add y # add y from memory to the acc Other architectures Example. Accumulator-based machines A single register, called the accumulator, stores the operand before the operation, and stores the result after the operation. Load x # into acc

More information

CHAPTER 11: Flip Flops

CHAPTER 11: Flip Flops CHAPTER 11: Flip Flops In this chapter, you will be building the part of the circuit that controls the command sequencing. The required circuit must operate the counter and the memory chip. When the teach

More information

DESIGN OF GATE NETWORKS

DESIGN OF GATE NETWORKS DESIGN OF GATE NETWORKS DESIGN OF TWO-LEVEL NETWORKS: and-or and or-and NETWORKS MINIMAL TWO-LEVEL NETWORKS KARNAUGH MAPS MINIMIZATION PROCEDURE AND TOOLS LIMITATIONS OF TWO-LEVEL NETWORKS DESIGN OF TWO-LEVEL

More information

Chapter 7 Memory and Programmable Logic

Chapter 7 Memory and Programmable Logic NCNU_2013_DD_7_1 Chapter 7 Memory and Programmable Logic 71I 7.1 Introduction ti 7.2 Random Access Memory 7.3 Memory Decoding 7.5 Read Only Memory 7.6 Programmable Logic Array 77P 7.7 Programmable Array

More information

FEATURES DESCRIPTION. PT6321 Fluorescent Display Tube Controller Driver

FEATURES DESCRIPTION. PT6321 Fluorescent Display Tube Controller Driver Fluorescent Display Tube Controller Driver DESCRIPTION The PT6321 is a dot matrix fluorescent display tube controller driver IC which displays characters, numerics and symbols. Dot matrix fluorescent display

More information

E158 Intro to CMOS VLSI Design. Alarm Clock

E158 Intro to CMOS VLSI Design. Alarm Clock E158 Intro to CMOS VLSI Design Alarm Clock Sarah Yi & Samuel (Tae) Lee 4/19/2010 Introduction The Alarm Clock chip includes the basic functions of an alarm clock such as a running clock time and alarm

More information

Digital Logic Elements, Clock, and Memory Elements

Digital Logic Elements, Clock, and Memory Elements Physics 333 Experiment #9 Fall 999 Digital Logic Elements, Clock, and Memory Elements Purpose This experiment introduces the fundamental circuit elements of digital electronics. These include a basic set

More information

Application Note. Line Card Redundancy Design With the XRT83SL38 T1/E1 SH/LH LIU ICs

Application Note. Line Card Redundancy Design With the XRT83SL38 T1/E1 SH/LH LIU ICs Application Note Design With the XRT83SL38 T1/E1 SH/LH LIU ICs Revision 1.3 1 REDUNDANCY APPLICATIONS INTRODUCTION Telecommunication system design requires signal integrity and reliability. When a T1/E1

More information

PROGRAMMABLE LOGIC CONTROLLERS Unit code: A/601/1625 QCF level: 4 Credit value: 15 TUTORIAL OUTCOME 2 Part 1

PROGRAMMABLE LOGIC CONTROLLERS Unit code: A/601/1625 QCF level: 4 Credit value: 15 TUTORIAL OUTCOME 2 Part 1 UNIT 22: PROGRAMMABLE LOGIC CONTROLLERS Unit code: A/601/1625 QCF level: 4 Credit value: 15 TUTORIAL OUTCOME 2 Part 1 This work covers part of outcome 2 of the Edexcel standard module. The material is

More information

Ultrasound Distance Measurement

Ultrasound Distance Measurement Final Project Report E3390 Electronic Circuits Design Lab Ultrasound Distance Measurement Yiting Feng Izel Niyage Asif Quyyum Submitted in partial fulfillment of the requirements for the Bachelor of Science

More information