# ECE Digital Logic Design. Laboratory Manual

Save this PDF as:

Size: px
Start display at page:

## Transcription

1 ECE 1315 Digital Logic Design Laboratory Manual Guide to Assembling your Circuits Dr. Fernando Ríos-Gutiérrez Dr. Rocio Alba-Flores Dr. Chris Carroll Department of Electrical and Computer Engineering University of Minnesota Duluth 6/2002 1

3 3 1 2 Fig Power and Ground Connection (method A) Fig Power and Ground Connection (method B) TTL Packages Description. The chips or packages that will be used to build the experiments belong to the TTL logic family, and they are referred as the 74LSXX family, where the XX is a number that indicates the specific kind of gate or function. The main characteristics for some typical logic gates packages are shown in Figures 9 and 10 next. 3

4 Fig Inverter (NOT) gate pin distribution Fig AND gate pin distribution Most commonly used TTL devices have their power and ground connections on pins 14 and 7 respectively, however verify this information before using some special function or uncommon packages. Also, all packages have a notch or mark that indicates the proper orientation of the device. From this mark each pin is numbered in a counter clockwise direction. The specific function that each chip performs is typically described using function tables, logic tables or logic diagrams as the ones shown in Figure 11. 4

5 Fig Typical Manual Descriptions for a TTL Gate. 5

6 Diagrams and Labeling. Using the pin distribution for the TTL packages given by the manufacturer, and once that you design the circuit that performs the desired logic function, the next step is to wire up the circuit that implements this function. Because every chip has a different number of gates, a good implementation step is to make a diagram for the circuit and label all inputs, outputs and gates in the way shown in Figure 12. By doing this the wiring and testing process will be done very easily in the lab. Pin Number Package Label Gate Name Fig Package, gate and pin labeling There are many methods than can be used to label a circuit. In this manual we show only one that is easy to understand and implement. In this method, every input and output pin shown in the diagram shows the respective pin number that corresponds to the gate in its package. The gates are labeled using a letter and a number. The letter labels a specific gate inside the package, and the number labels the package corresponding to its order. This is shown in Figure 13. For Figure 13, the gate labeled A1 means gate A in chip 1, B1 means gate B in chip one, and A2 means gate A in chip 2 and so on and so forth. Using this information it is very easy to wire the circuit on the breadboard since you only need to place the chips on the breadboard following the order that the chip was given on the diagram. Next, you only need to connect a wire between the pins that are given for every chip. For example, a wire has to be connected between pin 6 of the third chip (B3) and pin 9 of the fourth chip (C4). Another wire has to be connected between pin 8 of the first chip (C1) and pin 5 of chip number 5 (C5), and so on and so forth. Labeling the circuit in this way also makes it easier to find errors on the wiring during the testing process. Another important characteristic that can be noticed from this diagram is that the flow of interconnections and signals follows a left to right direction. This means that typically 6

7 in an electric connection diagram, the inputs will be shown on the left and outputs will be shown on the right. The reason for this is that in this way it is easy to follow the flow of signals in the circuit, and the function implementation at every step that each gate performs. On other hand, it makes the circuit interconnections to appear clearer. Fig Circuit Labels and Connections VI. - IC packages and Lab Inventory. In the Table 1, we show the TTL inventory for the chips available in the lab that can be used in the implementation of your circuits. For some lab experiments you will be informed about which chips you can exclusively use for that project in particular, otherwise you can use any package that is given in the list. Also, a quick reference guide for some of the most common devices is shown in Figure 14. 7

8 NAME FUNCTION NAME FUNCTION 74LS139 DUAL 2-->4 DECODER 74LS00 2 INPUT NAND 74LS >3 DECODER 74LS02 2 INPUT NOR 74LS >1 MULTIPLEXER 74LS04 INVERTER 74LS >1 MULTIPLEXER 74LS08 2 INPUT AND 74LS >4 DECODER 74LS10 3 INPUT NAND 74LS > 1 MULTIPLEXER 74LS11 3 INPUT AND 74LS161 4 BIT COUNTER 74LS20 4 INPUT NAND 74LS163 4 BIT COUNTER 74LS25 4 INPUT NOR 74LS164 8 BIT SHIFT REG 74LS27 3 INPUT NOR 74LS169 4 BIT COUNTER 74LS30 8 INPUT NAND 74LS170 4 x 4 REGISTER 74LS32 2 INPUT OR 74LS174 HEX D F-F 74LS42 4-->10 DECODER 74LS175 QUAD D F-F 74LS74 DUAL D F-F 74LS191 4 BIT COUNTER 74LS75 QUAD LATCH 74LS193 4 BIT COUNTER 74LS83 4 BIT ADDER 74LS194 4 BIT SHIFT REG 74LS85 4 BIT COMPARATOR 74LS195 4 BIT SHIFT REG 74LS86 2 INPUT XOR 74LS244 OCTAL BUFFER 74LS93 4 BIT COUNTER 74LS259 8 BIT ADDER 74LS95 4 BIT SHIFT REG 74LS283 4 BIT ADDER 74LS109 DUAL J-K' F-F 74LS373 OCTAL LATCH 74LS >8 DECODER Table 1. - TTL Chip Inventory 8

9 TTL Quick Reference Fig TTL gates quick reference guide 9

10 VII. Circuit Testing and Input Generation and Output Display. Once the circuits for your lab experiment have been designed and built on your breadboard, the final step is to test them and verify that they produce the set of outputs expected for the set of inputs provided. The set of inputs to test your circuit can be generated in two different ways: manually and automatically. a). - Manual Generation and Display of Input and Output Variables To generate a logic variable manually, you can use the set of binary static switches or pushbuttons available from the Heathkit board, and to display these signals you can connect the set of input signals and the set of output signals to the logic indicator displays available also from the Heathkit board. In order to use one of the switches to generate a logic variable, just connect a wire to the breadboard output of the respective switch, and connect the other side of the wire to the respective input. To observe the state of this input you can connect another wire from this variable to one of the displays. b). - Automatic Generation and Display of Input and Output Variables To generate the sets of inputs and display the outputs on the oscilloscope screen automatically, you can use the Chipmonk circuitry and its connector (shown in Figure 15). This system produces four switching variables named W, X, Y and Z, and generates all possible combinations of values that these variables could have. This is, the values change from 0000 to 1111 and repeat continuously, with W been the most significant value, and Z the least significant value. W X Y Z Sequence Clock Column 8 Ground V cc Column 1 Column 2 Column 3 Column 4 Column 5 Column 6 Column 7 Fig Chipmonk Connector The oscilloscope will show 16 rows of ones or zeros, and 8 columns. The screen displays one row for each combination of values, and each column represents a different variable, as shown in Figure 16. In order to display the value of a variable on the oscilloscope screen, just connect the variable of interest to the any of pins of the Chipmonk connector labeled Column 1 through Column 7 (pin numbers 15 through 9, respectively). Column 8 is special and should not be 10

11 used for testing combinational circuits. The use of this pin will be explained later in the sequential circuits section. When the Chipmonk is working correctly you should see displayed on the oscilloscope screen a truth table showing the input and output variables for your circuit. The variables will be displayed from left to right on the screen, in the same order that you wired them to the Chipmonk, as shown in Figure 16. Normally, when testing your experiments, you will want to display both the inputs to your circuit (W, X, Y, Z) and the outputs produced by your circuit, so that you can determine whether the proper output values are produced for each combination of input values. You can use any column to display either the value of an input or the value of an output. Col 1 Col 2 Col 3 Col 4 Col 5 Col 6 Col 7 Col 8 Fig. 16. Columns and Rows Displayed on the Oscilloscope Screen 11

12 In order for the Chipmonk circuitry and Oscilloscope to work properly, the Heathkit frequency and frequency multiplier knobs (3 & 4 on Fig. 1) should be set fully clockwise. The oscilloscope controls should all be set on the X-Y mode (1, 2, 3 and 4 in Fig. 17). Set channels 1 and 2 both at 0.5 volts per division (5, 6); AC coupled (7, 8), and pull out the channel 2-position control (9). Use the channel 2 position and the horizontal position adjustments to center the display on the screen. Once these controls are set, they should not need to be changed Fig. 17. Oscilloscope Controls Next, in the section VIII we show a table with the main Boolean Algebra laws, theorems and properties that can be applied to reduce a logic function. 12

13 VIII. - Basic Laws and Theorems for Boolean Algebra. IDENTITY LAWS X + 0= X X 1= X X + 1= 1 X 0= 0 IDEMPOTENT LAWS X + X = X X X = X INVOLUTION LAW (X')' = X COMPLEMENT LAWS X + X' = 1 X X' = 0 COMMUTATIVE LAWS X + Y = Y + X X Y = Y X ASSOCIATIVE LAWS (X + Y) + Z = X + (Y + Z) (X Y) Z = X (Y Z) DISTRIBUTIVE LAWS X(Y + Z) = X Y + X Z X + Y Z = (X + Y) (X + Z) SIMPLIFICATIVE THEOREMS X Y + X Y' = X (X + Y) (X + Y') = X (X + Y')Y = X Y X Y' + Y = X + Y ABSORPTION THEOREMS X + X Y = X X (X + Y) = X DEMORGAN'S LAWS (X + Y) ' = X' Y' (X Y) ' = X' + Y' X + X Y = X + Y X (X + Y) = X' Y 13

### ELEC 2210 - EXPERIMENT 1 Basic Digital Logic Circuits

Objectives ELEC - EXPERIMENT Basic Digital Logic Circuits The experiments in this laboratory exercise will provide an introduction to digital electronic circuits. You will learn how to use the IDL-00 Bit

### 1. True or False? A voltage level in the range 0 to 2 volts is interpreted as a binary 1.

File: chap04, Chapter 04 1. True or False? A voltage level in the range 0 to 2 volts is interpreted as a binary 1. 2. True or False? A gate is a device that accepts a single input signal and produces one

### The components. E3: Digital electronics. Goals:

E3: Digital electronics Goals: Basic understanding of logic circuits. Become familiar with the most common digital components and their use. Equipment: 1 st. LED bridge 1 st. 7-segment display. 2 st. IC

### Digital Logic Design Laboratory

Digital Logic Design Laboratory EE2731 Gabriel Augusto Marques Tarquinio de Souza Department of Electrical and Computer Engineering Louisiana State University and Agricultural and Mechanical College Baton

### Introduction to Logic Design Lab: AND, OR, NOT NAND and NOR GATES

Experiment 1 Introduction to Logic Design Lab: AND, OR, NOT NAND and NOR GATES Objective References The purpose of this laboratory is to introduce the use and features of the logic lab unit (ETS-7000 DIGITAL

### Chapter 4. Gates and Circuits. Chapter Goals. Chapter Goals. Computers and Electricity. Computers and Electricity. Gates

Chapter Goals Chapter 4 Gates and Circuits Identify the basic gates and describe the behavior of each Describe how gates are implemented using transistors Combine basic gates into circuits Describe the

### FORDHAM UNIVERSITY CISC 3593. Dept. of Computer and Info. Science Spring, 2011. Lab 2. The Full-Adder

FORDHAM UNIVERSITY CISC 3593 Fordham College Lincoln Center Computer Organization Dept. of Computer and Info. Science Spring, 2011 Lab 2 The Full-Adder 1 Introduction In this lab, the student will construct

### Digital Systems Laboratory

Digital Systems Laboratory Rev 1.2 Agust 2014 LIST OF EXPERIMENTS 1. INTRODUCTION TO LAB, USING MATERIALS 2. DIGITAL LOGIC GATES 3. INTRODUCTION TO PROTEUS 4. BINARY AND DECIMAL NUMBERS 5. CODE CONVERSION

### Latches and Flip-Flops characterestics & Clock generator circuits

Experiment # 7 Latches and Flip-Flops characterestics & Clock generator circuits OBJECTIVES 1. To be familiarized with D and JK flip-flop ICs and their characteristic tables. 2. Understanding the principles

### Gates, Circuits, and Boolean Algebra

Gates, Circuits, and Boolean Algebra Computers and Electricity A gate is a device that performs a basic operation on electrical signals Gates are combined into circuits to perform more complicated tasks

### Having read this workbook you should be able to: recognise the arrangement of NAND gates used to form an S-R flip-flop.

Objectives Having read this workbook you should be able to: recognise the arrangement of NAND gates used to form an S-R flip-flop. describe how such a flip-flop can be SET and RESET. describe the disadvantage

### Programmable Logic Devices (PLDs)

Programmable Logic Devices (PLDs) Lesson Objectives: In this lesson you will be introduced to some types of Programmable Logic Devices (PLDs): PROM, PAL, PLA, CPLDs, FPGAs, etc. How to implement digital

### Counters and Decoders

Physics 3330 Experiment #10 Fall 1999 Purpose Counters and Decoders In this experiment, you will design and construct a 4-bit ripple-through decade counter with a decimal read-out display. Such a counter

### CHAPTER 11: Flip Flops

CHAPTER 11: Flip Flops In this chapter, you will be building the part of the circuit that controls the command sequencing. The required circuit must operate the counter and the memory chip. When the teach

### Digital circuits make up all computers and computer systems. The operation of digital circuits is based on

Digital Logic Circuits Digital circuits make up all computers and computer systems. The operation of digital circuits is based on Boolean algebra, the mathematics of binary numbers. Boolean algebra is

### Digital Electronics Detailed Outline

Digital Electronics Detailed Outline Unit 1: Fundamentals of Analog and Digital Electronics (32 Total Days) Lesson 1.1: Foundations and the Board Game Counter (9 days) 1. Safety is an important concept

### Lab Manual. Digital System Design (Pr): COT-215 Digital Electronics (P): IT-211

Lab Manual Digital System Design (Pr): COT-215 Digital Electronics (P): IT-211 Lab Instructions Several practicals / programs? Whether an experiment contains one or several practicals /programs One practical

### 1. Realization of gates using Universal gates

1. Realization of gates using Universal gates Aim: To realize all logic gates using NAND and NOR gates. Apparatus: S. No Description of Item Quantity 1. IC 7400 01 2. IC 7402 01 3. Digital Trainer Kit

### DIGITAL SYSTEM DESIGN LAB

EXPERIMENT NO: 7 STUDY OF FLIP FLOPS USING GATES AND IC S AIM: To verify various flip-flops like D, T, and JK. APPARATUS REQUIRED: Power supply, Digital Trainer kit, Connecting wires, Patch Chords, IC

### Experiment 5. Arithmetic Logic Unit (ALU)

Experiment 5 Arithmetic Logic Unit (ALU) Objectives: To implement and test the circuits which constitute the arithmetic logic circuit (ALU). Background Information: The basic blocks of a computer are central

### Chapter - 5 FLIP-FLOPS AND SIMPLE FLIP-FLOP APPLICATIONS

Chapter - 5 FLIP-FLOPS AND SIMPLE FLIP-FLOP APPLICATIONS Introduction : Logic circuit is divided into two types. 1. Combinational Logic Circuit 2. Sequential Logic Circuit Definition : 1. Combinational

### Digital Fundamentals

Digital Fundamentals Tenth Edition Floyd Chapter 1 2009 Pearson Education, Upper 2008 Pearson Saddle River, Education NJ 07458. All Rights Reserved Analog Quantities Most natural quantities that we see

### LAB MANUAL SUBJECT: DIGITAL LOGIC DESIGN AND APPLICATIONS SE (COMPUTERS) SEM III

LAB MANUAL SUBJECT: DIGITAL LOGIC DESIGN AND APPLICATIONS SE (COMPUTERS) SEM III 1 INDEX Sr. No Title of the Experiment 1 Study of BASIC Gates 3 2 Universal Gates 6 3 Study of Full & Half Adder & Subtractor

### COMBINATIONAL and SEQUENTIAL LOGIC CIRCUITS Hardware implementation and software design

PH-315 COMINATIONAL and SEUENTIAL LOGIC CIRCUITS Hardware implementation and software design A La Rosa I PURPOSE: To familiarize with combinational and sequential logic circuits Combinational circuits

### Figure 8-1 Four Possible Results of Adding Two Bits

CHPTER EIGHT Combinational Logic pplications Thus far, our discussion has focused on the theoretical design issues of computer systems. We have not yet addressed any of the actual hardware you might find

### Digital Fundamentals. Lab 8 Asynchronous Counter Applications

Richland College Engineering Technology Rev. 0 B. Donham Rev. 1 (7/2003). Horne Rev. 2 (1/2008). Bradbury Digital Fundamentals CETT 1425 Lab 8 Asynchronous Counter Applications Name: Date: Objectives:

### DEPARTMENT OF INFORMATION TECHNLOGY

DRONACHARYA GROUP OF INSTITUTIONS, GREATER NOIDA Affiliated to Mahamaya Technical University, Noida Approved by AICTE DEPARTMENT OF INFORMATION TECHNLOGY Lab Manual for Computer Organization Lab ECS-453

### 1.1 The 7493 consists of 4 flip-flops with J-K inputs unconnected. In a TTL chip, unconnected inputs

CALIFORNIA STATE UNIVERSITY LOS ANGELES Department of Electrical and Computer Engineering EE-246 Digital Logic Lab EXPERIMENT 1 COUNTERS AND WAVEFORMS Text: Mano, Digital Design, 3rd & 4th Editions, Sec.

### Logic Gates & Operational Characteristics

Logic Gates & Operational Characteristics NOR Gate as a Universal Gate The NOR gate is also used as a Universal Gate as the NOR Gate can be used in a combination to perform the function of a AND, OR and

### Lab 11 Digital Dice. Figure 11.0. Digital Dice Circuit on NI ELVIS II Workstation

Lab 11 Digital Dice Figure 11.0. Digital Dice Circuit on NI ELVIS II Workstation From the beginning of time, dice have been used for games of chance. Cubic dice similar to modern dice date back to before

### Digital Logic Design. Basics Combinational Circuits Sequential Circuits. Pu-Jen Cheng

Digital Logic Design Basics Combinational Circuits Sequential Circuits Pu-Jen Cheng Adapted from the slides prepared by S. Dandamudi for the book, Fundamentals of Computer Organization and Design. Introduction

### 2 hrs lecture 2 hrs lab 2 hrs section

Arab Academy for Science and Technology & Maritime Transport University/Academy: Arab Academy for Science and Technology & Maritime Transport Faculty/Institute: College of Computing and Information Technology

### CHAPTER 3 Boolean Algebra and Digital Logic

CHAPTER 3 Boolean Algebra and Digital Logic 3.1 Introduction 121 3.2 Boolean Algebra 122 3.2.1 Boolean Expressions 123 3.2.2 Boolean Identities 124 3.2.3 Simplification of Boolean Expressions 126 3.2.4

### Problem Session 5. Overview. Part 1: An S-R Latch. Part 2: A D Latch

Problem Session 5 Overview The most basic element of binary storage is the latch, consisting of 2 cross-coupled NAND (or NOR) gates. The D latch, with a write enable input, is a rudimentary storage element.

### Decimal Number (base 10) Binary Number (base 2)

LECTURE 5. BINARY COUNTER Before starting with counters there is some vital information that needs to be understood. The most important is the fact that since the outputs of a digital chip can only be

### PLL frequency synthesizer

ANALOG & TELECOMMUNICATION ELECTRONICS LABORATORY EXERCISE 4 Lab 4: PLL frequency synthesizer 1.1 Goal The goals of this lab exercise are: - Verify the behavior of a and of a complete PLL - Find capture

### Practical Workbook Digital Logic Design / Logic Design & Switching Theory

Practical Workbook Digital Logic Design / Logic Design & Switching Theory Name : Year : Batch : Roll No : Department: Second edition - 2015 Dept. of Computer & Information Systems Engineering NED University

### Laboratory 4 Logic, Latching and Switch Debounce

Laboratory 4 Logic, Latching and Switch Debounce = Required to submit your Multisim circuit files before you start the lab. Pre-lab Questions 1. Attach the detailed wiring diagram you used to construct

### Basic Logic Circuits

Basic Logic Circuits Required knowledge Measurement of static characteristics of nonlinear circuits. Measurement of current consumption. Measurement of dynamic properties of electrical circuits. Definitions

### Electronic Troubleshooting. Chapter 10 Digital Circuits

Electronic Troubleshooting Chapter 10 Digital Circuits Digital Circuits Key Aspects Logic Gates Inverters NAND Gates Specialized Test Equipment MOS Circuits Flip-Flops and Counters Logic Gates Characteristics

### Multiplexer Based Digital Integrated Circuit Tester

Multiplexer Based Digital Integrated Circuit Tester Hema Thota 1, Sridhar Sammeta 2, Prudhvi Raj Thota 3 B.Tech, Electronics and Communication Engineering, D.M.S S.V.H College of Engineering, Machilipatnam,

### LABORATORY MODULE. EKT 121/4 Digital Electronics I

LABORATORY MODULE EKT 121/4 Digital Electronics I Mohd. Najmuddin Mohd. Hassan Zahereel Ishwar Abdul Khalib Mohammad Nazri Md. Noor Rafikha Aliana A.Raof School of Computer & Communications Engineering

### Digital Logic Elements, Clock, and Memory Elements

Physics 333 Experiment #9 Fall 999 Digital Logic Elements, Clock, and Memory Elements Purpose This experiment introduces the fundamental circuit elements of digital electronics. These include a basic set

### Objectives: Part 1: Build a simple power supply. CS99S Laboratory 1

CS99S Laboratory 1 Objectives: 1. Become familiar with the breadboard 2. Build a logic power supply 3. Use switches to make 1s and 0s 4. Use LEDs to observe 1s and 0s 5. Make a simple oscillator 6. Use

### Experiment # 9. Clock generator circuits & Counters. Eng. Waleed Y. Mousa

Experiment # 9 Clock generator circuits & Counters Eng. Waleed Y. Mousa 1. Objectives: 1. Understanding the principles and construction of Clock generator. 2. To be familiar with clock pulse generation

### ENGI 241 Experiment 5 Basic Logic Gates

ENGI 24 Experiment 5 Basic Logic Gates OBJECTIVE This experiment will examine the operation of the AND, NAND, OR, and NOR logic gates and compare the expected outputs to the truth tables for these devices.

### 3.Basic Gate Combinations

3.Basic Gate Combinations 3.1 TTL NAND Gate In logic circuits transistors play the role of switches. For those in the TTL gate the conducting state (on) occurs when the baseemmiter signal is high, and

### Upon completion of unit 1.1, students will be able to

Upon completion of unit 1.1, students will be able to 1. Demonstrate safety of the individual, class, and overall environment of the classroom/laboratory, and understand that electricity, even at the nominal

### 3-Digit Counter and Display

ECE 2B Winter 2007 Lab #7 7 3-Digit Counter and Display This final lab brings together much of what we have done in our lab experiments this quarter to construct a simple tachometer circuit for measuring

### Digital Systems CCPS1573

1. Name of Course 2. Course Code 3. Name(s) of academic staff 4. Rationale for the inclusion of the course/module in the programme Digital Systems CCPS1573 Faculty This module provides foundation knowledge

### 2012-13 Department of Electronics & Communication

(A constituent college of Sri Siddhartha University) 2012-13 Department of Electronics & Communication LOGIC DESIGN LAB MANUAL III SEM BE Name : Sem :. Sec: Logic Design Lab Manual Contents Exp No Title

### RUTGERS UNIVERSITY Department of Electrical and Computer Engineering 14:332:233 DIGITAL LOGIC DESIGN LABORATORY

RUTGERS UNIVERSITY Department of Electrical and Computer Engineering 14:332:233 DIGITAL LOGIC DESIGN LABORATORY Fall 2012 Contents 1 LABORATORY No 1 3 11 Equipment 3 12 Protoboard 4 13 The Input-Control/Output-Display

### Operating Manual Ver.1.1

4 Bit Binary Ripple Counter (Up-Down Counter) Operating Manual Ver.1.1 An ISO 9001 : 2000 company 94-101, Electronic Complex Pardesipura, Indore- 452010, India Tel : 91-731- 2570301/02, 4211100 Fax: 91-731-

### Sequential Logic Design

Lab #4 Sequential Logic Design Objective: To study the behavior and applications of flip flops and basic sequential circuits including shift registers and counters. Preparation: Read the following experiment.

### ANALOG & DIGITAL ELECTRONICS

ANALOG & DIGITAL ELECTRONICS Course Instructor: Course No: PH-218 3-1-0-8 Dr. A.P. Vajpeyi E-mail: apvajpeyi@iitg.ernet.in Room No: #305 Department of Physics, Indian Institute of Technology Guwahati,

### GETTING STARTED WITH PROGRAMMABLE LOGIC DEVICES, THE 16V8 AND 20V8

GETTING STARTED WITH PROGRAMMABLE LOGIC DEVICES, THE 16V8 AND 20V8 Robert G. Brown All Rights Reserved August 25, 2000 Alta Engineering 58 Cedar Lane New Hartford, CT 06057-2905 (860) 489-8003 www.alta-engineering.com

### Understanding Logic Design

Understanding Logic Design ppendix of your Textbook does not have the needed background information. This document supplements it. When you write add DD R0, R1, R2, you imagine something like this: R1

### Properties of Flip-Flops

Dr. Anthony D. Johnson sl_dild.fm- Lab Assignment # Properties of Flip-Flops. Objective - gaining a close insight into the functioning and properties of basic static memory circuits, - verifying the superior

### ASYNCHRONOUS COUNTERS

LB no.. SYNCHONOUS COUNTES. Introduction Counters are sequential logic circuits that counts the pulses applied at their clock input. They usually have 4 bits, delivering at the outputs the corresponding

### 4 BOOLEAN ALGEBRA AND LOGIC SIMPLIFICATION

4 BOOLEAN ALGEBRA AND LOGIC SIMPLIFICATION BOOLEAN OPERATIONS AND EXPRESSIONS Variable, complement, and literal are terms used in Boolean algebra. A variable is a symbol used to represent a logical quantity.

### 8-bit 4-to-1 Line Multiplexer

Project Part I 8-bit 4-to-1 Line Multiplexer Specification: This section of the project outlines the design of a 4-to-1 multiplexor which takes two 8-bit buses as inputs and produces a single 8-bit bus

### A Digital Timer Implementation using 7 Segment Displays

A Digital Timer Implementation using 7 Segment Displays Group Members: Tiffany Sham u2548168 Michael Couchman u4111670 Simon Oseineks u2566139 Caitlyn Young u4233209 Subject: ENGN3227 - Analogue Electronics

### Operating Manual Ver.1.1

Flip-Flops Operating Manual Ver.1.1 An ISO 9001 : 2000 company 94-101, Electronic Complex Pardesipura, Indore- 452010, India Tel : 91-731- 2570301/02, 4211100 Fax: 91-731- 2555643 e mail : info@scientech.bz

### Chapter 2 Logic Gates and Introduction to Computer Architecture

Chapter 2 Logic Gates and Introduction to Computer Architecture 2.1 Introduction The basic components of an Integrated Circuit (IC) is logic gates which made of transistors, in digital system there are

### Digital Logic: Boolean Algebra and Gates

Digital Logic: Boolean Algebra and Gates Textbook Chapter 3 CMPE2 Summer 28 Basic Logic Gates CMPE2 Summer 28 Slides by ADB 2 Truth Table The most basic representation of a logic function Lists the output

### Boolean Algebra Part 1

Boolean Algebra Part 1 Page 1 Boolean Algebra Objectives Understand Basic Boolean Algebra Relate Boolean Algebra to Logic Networks Prove Laws using Truth Tables Understand and Use First Basic Theorems

### EXPERIMENT 8. Flip-Flops and Sequential Circuits

EXPERIMENT 8. Flip-Flops and Sequential Circuits I. Introduction I.a. Objectives The objective of this experiment is to become familiar with the basic operational principles of flip-flops and counters.

### 2 1 Implementation using NAND gates: We can write the XOR logical expression A B + A B using double negation as

Chapter 2 Digital Logic asics 2 Implementation using NND gates: We can write the XOR logical expression + using double negation as + = + = From this logical expression, we can derive the following NND

### Module 3: Floyd, Digital Fundamental

Module 3: Lecturer : Yongsheng Gao Room : Tech - 3.25 Email : yongsheng.gao@griffith.edu.au Structure : 6 lectures 1 Tutorial Assessment: 1 Laboratory (5%) 1 Test (20%) Textbook : Floyd, Digital Fundamental

### Altoids Tin Headphone Amplifier Lab

Altoids Tin Headphone Amplifier Lab Michigan State University AEE/IEEE Step 1: Required Parts Table 1 shows a complete listing of the parts required to complete this project. Figure 1 shows a picture of

### Lab 1: Study of Gates & Flip-flops

1.1 Aim Lab 1: Study of Gates & Flip-flops To familiarize with circuit implementations using ICs and test the behavior of different logic gates and Flip-flops. 1.2 Hardware Requirement a. Equipments -

### Digital Systems Laboratory

Eskişehir Osmangazi University Digital Systems Laboratory Rev 3.01 February 2011 LIST OF EXPERIMENTS 1. BINARY AND DECIMAL NUMBERS 2. DIGITAL LOGIC GATES 3. INTRODUCTION TO LOGICWORKS 4. BOOLEAN ALGEBRA

### BINARY CODED DECIMAL: B.C.D.

BINARY CODED DECIMAL: B.C.D. ANOTHER METHOD TO REPRESENT DECIMAL NUMBERS USEFUL BECAUSE MANY DIGITAL DEVICES PROCESS + DISPLAY NUMBERS IN TENS IN BCD EACH NUMBER IS DEFINED BY A BINARY CODE OF 4 BITS.

Experiment No. 1. THE DIGI DESIGNER Experiment 1-1. Socket Connections on the Digi Designer Experiment No. 2. LOGIC LEVELS AND THE 7400 QUADRUPLE 2-INPUT POSITIVE NAND GATE Experiment 2-1. Truth Table

### BELS Digital IC Report

CMOS Digital IC Report 74HC00, Quad 2-Input NAND Gate DIP-14 3 - A 500 0.24 74HCT00, Quad 2-Input NAND Gate DIP-14 3 - A 501 0.36 74HC02, Quad 2 Input NOR DIP-14 3 - A 417 0.24 74HC04, Hex Inverter, buffered

### Lecture 8: Synchronous Digital Systems

Lecture 8: Synchronous Digital Systems The distinguishing feature of a synchronous digital system is that the circuit only changes in response to a system clock. For example, consider the edge triggered

### Digital Electronics Part I Combinational and Sequential Logic. Dr. I. J. Wassell

Digital Electronics Part I Combinational and Sequential Logic Dr. I. J. Wassell Introduction Aims To familiarise students with Combinational logic circuits Sequential logic circuits How digital logic gates

### Build A Video Switcher. Reprinted with permission from Electronics Now Magazine September 1997 issue

Build A Video Switcher Reprinted with permission from Electronics Now Magazine September 1997 issue Copyright Gernsback Publications, Inc.,1997 BUILD A VIDEO SWITCHER FRANK MONTEGARI Watch several cameras

### ECE3281 Electronics Laboratory

ECE328 Electronics Laboratory Experiment #4 TITLE: EXCLUSIVE-OR FUNCTIONS and INRY RITHMETIC OJECTIVE: Synthesize exclusive-or and the basic logic functions necessary for execution of binary arithmetic.

### Sequential Logic. (Materials taken from: Principles of Computer Hardware by Alan Clements )

Sequential Logic (Materials taken from: Principles of Computer Hardware by Alan Clements ) Sequential vs. Combinational Circuits Combinatorial circuits: their outputs are computed entirely from their present

### Digital Fundamentals

Digital Fundamentals Tenth Edition Floyd hapter 8 2009 Pearson Education, Upper 2008 Pearson Saddle River, Education NJ 07458. All Rights Reserved ounting in Binary As you know, the binary count sequence

### LOGICOS SERIE 4000. Precios sujetos a variación. Ref. Part # Descripción Precio Foto Ref. Quad 2-Input NOR Buffered B Series Gate / PDIP-14

LOGICOS SERIE 4000 Precios sujetos a variación Ref. Part # Descripción Precio Foto Ref. A-6-1 CD4001 Quad 2-Input NOR Buffered B Series Gate / PDIP-14 \$ 290 A-6-2 CD4001BCM Quad 2-Input NOR Buffered B

### CHAPTER TEN. 10.1 New Truth Table Symbols. 10.1.1 Edges/Transitions. Memory Cells

CHAPTER TEN Memory Cells The previous chapters presented the concepts and tools behind processing binary data. This is only half of the battle though. For example, a logic circuit uses inputs to calculate

### Basic Logic Gates Richard E. Haskell

BASIC LOGIC GATES 1 E Basic Logic Gates Richard E. Haskell All digital systems are made from a few basic digital circuits that we call logic gates. These circuits perform the basic logic functions that

### ET398 LAB 6. Flip-Flops in VHDL

ET398 LAB 6 Flip-Flops in VHDL Flip-Flops March 3, 2013 Tiffany Turner OBJECTIVE The objectives of this lab are for you to begin the sequential and memory programming using flip flops in VHDL program.

### BISTABLE LATCHES AND FLIP-FLOPS

ELET 3156 DL - Laboratory #3 BISTABLE LATCHES AND FLIP-FLOPS No preliminary lab design work is required for this experiment. Introduction: This experiment will demonstrate the properties and illustrate

### Digital to Analog Conversion Using Pulse Width Modulation

Digital to Analog Conversion Using Pulse Width Modulation Samer El-Haj-Mahmoud Electronics Engineering Technology Program Texas A&M University Instructor s Portion Summary The purpose of this lab is to

### Operating Manual Ver.1.1

Code Conversion Binary to Gray Gray to Binary Operating Manual Ver.1.1 An ISO 9001 : 2000 company 94-101, Electronic Complex Pardesipura, Indore- 452010, India Tel : 91-731- 2570301/02, 4211100 Fax: 91-731-

### Lab 5 Operational Amplifiers

Lab 5 Operational Amplifiers By: Gary A. Ybarra Christopher E. Cramer Duke University Department of Electrical and Computer Engineering Durham, NC. Purpose The purpose of this lab is to examine the properties

### Module-3 SEQUENTIAL LOGIC CIRCUITS

Module-3 SEQUENTIAL LOGIC CIRCUITS Till now we studied the logic circuits whose outputs at any instant of time depend only on the input signals present at that time are known as combinational circuits.

### The RIDZ 8x2 Audio Switcher

The RIDZ 8x2 Audio Switcher Engineering Manual Support Number 800-765-2930 International 712-852-2813 Table of Contents General Information for the RIDZ (8 x 2) Switcher..... 3 Input 9 on the RIDZ Switcher....6

### RAM & ROM Based Digital Design. ECE 152A Winter 2012

RAM & ROM Based Digital Design ECE 152A Winter 212 Reading Assignment Brown and Vranesic 1 Digital System Design 1.1 Building Block Circuits 1.1.3 Static Random Access Memory (SRAM) 1.1.4 SRAM Blocks in

### Shift registers. 1.0 Introduction

Shift registers 1.0 Introduction Shift registers are a type of sequential logic circuit, mainly for storage of digital data. They are a group of flip-flops connected in a chain so that the output from

### Digital Circuit Projects: An Overview of Digital Circuits Through Implementing Integrated Circuits - Second Edition

Gettysburg College Open Educational Resources 5-12-2014 Digital Circuit Projects: An Overview of Digital Circuits Through Implementing Integrated Circuits - Second Edition Charles W. Kann Gettysburg College