DKT 122/3 DIGITAL SYSTEM 1

Size: px
Start display at page:

Download "DKT 122/3 DIGITAL SYSTEM 1"

Transcription

1 Company LOGO DKT 122/3 DIGITAL SYSTEM 1 E d i t y o u r s l o g a n h e r e CHAPTER 6 FUNCTIONS OF COMBINATIONAL LOGIC (ENCODER & DECODER, MUX & DEMUX)

2 Topic Outlines Company LOGO Encoder Decoder Multiplexers (MUX) Demultiplexers (DEMUX)

3 Topic Outlines Company LOGO Encoder Decoder Multiplexers (MUX) Demultiplexers (DEMUX)

4 Encoder Encoder converts information such as decimal number, alphabetical character, or symbols into some coded form, such as BCD or binary Encoder is usually used for: Data representation Data security

5 Encoder Question 1: Design a Decimal to BCD Encoder Hints: (a) Draw a Truth-Table showing input and output - How many inputs? : 10 (0 to 9) - How many outputs? : 4 because we need 4 bits to express 9 (1001) (b) From the Truth-Table, get the equation for each output - How many Boolean expression? : 4 since there are 4 outputs (c) Based on the output equation, draw a circuit for basic decimal-to-bcd encoder

6 Encoder Draw a Truth-Table showing input and output DECIMAL BCD CODE DIGIT A 3 A 2 A 1 A

7 Encoder (b) From the Truth-Table, get the equation for each output: A 3 = I 8 OR I 9 A 2 = I 4 OR I 5 OR I 6 OR I 7 A 1 = I 2 OR I 3 OR I 6 OR I 7 A 0 = I 1 OR I 3 OR I 5 OR I 7 OR I 9 (c) Based on the output equation, draw a circuit for basic decimal-to-bcd encoder (a) (b) (a) Logic symbol for a 10-line-to 4 line encoder (b) Logic diagram. A 0-digit input is not needed because the BCD outputs are all low when there are no HIGH inputs

8 Decoder A decoder is a circuit that creates an output based on the binary states of a given input Do the opposite of encoder Decoder block diagram

9 Decoder Basic Binary Decoder Example: To determine when a binary 1001 occurs on the input of a digital circuit, AND gate can be used as the basic decoding element. AND gate -> produce HIGH output when all inputs are HIGH How to ensure that inputs to the AND gate are HIGH when binary 1001 occurs? Other than this input combinations, the output is 0 Decoding logic for the binary code 1001 with an active-high output.

10 Decoder Question 2: (a) Determine the logic required to decode the binary by producing a high level (active-high) on the output. A 4 A 3 A 2 A 1 A 0 Active-HIGH produce HIGH output Decoding function, Decodingfu nction, X A A A A A

11 Decoder 4-bit Decoder This type of decoder is called 4-line-to-16-line decoder or 1-of-16 decoder For a 4-bit decoder, there are 16 possible combinations (2 4 =16). This means that 16 decoding gates are required

12 Decoder 3 to 8 Binary Decoder Question: Is this active-high or active-low output?

13 -- don t care inputs -- Company LOGO Decoder Example: Seven Segment Decoder A seven segment decoder has 4-bit BCD input and the seven segment display code as its output: In minimizing the circuits for the segment outputs all nondecimal input combinations (1010, 1011, 1100,1101, 1110, 1111) are taken as don t-cares D C B A a b c d e f g

14 Multiplexers (MUX) Company LOGO MUX is a device that allows digital information from several sources to be routed onto a single line for transmission It is made up of several datainput lines and a single output line. It also has data-select inputs which permits digital data on any one of the inputs to be switched to the output line. MUX is also known as data selectors n select inputs 2 n data inputs 1 data output Logic symbol for a 4-input multiplexer (4:1 MUX)

15 Multiplexers (MUX) 2:1 MUX Logic circuit Truth-table

16 Multiplexers (MUX) 4:1 MUX 2 data-select lines means that any one of the 4 data-input lines can be selected DATA-SELECT INPUTS S 0 S 1 INPUT SELECTED D 0 D 1 D 2 D 0 D 1 D 2 4-to-1 MUX Z Z 0 0 D D D 2 D 3 D 3 S 1 S D 3 S 1 S 0 If a binary 0 (S 0 =0 and S 1 =0) is applied to the data-select lines, the data on input D 0 appear on the data-output line

17 4:1 MUX Multiplexers (MUX) Logic diagram for 4:1 MUX Total expression for the data output is: Y D 0 S1S0 D1 S1S0 D2S1 S0 D3S1S 0

18 Multiplexers (MUX) Question 3: Construct an 8:1 multiplexer using block diagram. 8 input lines means there must be 3 data select lines.

19 Demultiplexers (DEMUX) Company LOGO DEMUX reverse the multiplexing functions It takes digital information from one line and distributes it to a given number of output lines DEMUX is also known as data distributor 1 data input n select inputs 2 n data outputs 1-line to 4-line DEMUX

20 Demultiplexers (DEMUX) 1:4 DEMUX

21 Demultiplexers (DEMUX) Question 4: Construct a 1:4 DEMUX using block diagram. Show the equivalent Truth-Table. Q Q I 1 0 DEMUX Q 2 Truth-table S1 S0 I1 Q3 Q2 Q1 Q0 S 1 S 0 I 0 S 1 S 0 Q 3 Block diagram Q0 Q1 Q Q3 Logic circuit

COMBINATIONAL CIRCUITS

COMBINATIONAL CIRCUITS COMBINATIONAL CIRCUITS http://www.tutorialspoint.com/computer_logical_organization/combinational_circuits.htm Copyright tutorialspoint.com Combinational circuit is a circuit in which we combine the different

More information

Combinational circuits

Combinational circuits Combinational circuits Combinational circuits are stateless The outputs are functions only of the inputs Inputs Combinational circuit Outputs 3 Thursday, September 2, 3 Enabler Circuit (High-level view)

More information

Sistemas Digitais I LESI - 2º ano

Sistemas Digitais I LESI - 2º ano Sistemas Digitais I LESI - 2º ano Lesson 6 - Combinational Design Practices Prof. João Miguel Fernandes (miguel@di.uminho.pt) Dept. Informática UNIVERSIDADE DO MINHO ESCOLA DE ENGENHARIA - PLDs (1) - The

More information

Two-level logic using NAND gates

Two-level logic using NAND gates CSE140: Components and Design Techniques for Digital Systems Two and Multilevel logic implementation Tajana Simunic Rosing 1 Two-level logic using NND gates Replace minterm ND gates with NND gates Place

More information

1. True or False? A voltage level in the range 0 to 2 volts is interpreted as a binary 1.

1. True or False? A voltage level in the range 0 to 2 volts is interpreted as a binary 1. File: chap04, Chapter 04 1. True or False? A voltage level in the range 0 to 2 volts is interpreted as a binary 1. 2. True or False? A gate is a device that accepts a single input signal and produces one

More information

Understanding Logic Design

Understanding Logic Design Understanding Logic Design ppendix of your Textbook does not have the needed background information. This document supplements it. When you write add DD R0, R1, R2, you imagine something like this: R1

More information

Copyright Peter R. Rony 2009. All rights reserved.

Copyright Peter R. Rony 2009. All rights reserved. Experiment No. 1. THE DIGI DESIGNER Experiment 1-1. Socket Connections on the Digi Designer Experiment No. 2. LOGIC LEVELS AND THE 7400 QUADRUPLE 2-INPUT POSITIVE NAND GATE Experiment 2-1. Truth Table

More information

5 Combinatorial Components. 5.0 Full adder. Full subtractor

5 Combinatorial Components. 5.0 Full adder. Full subtractor 5 Combatorial Components Use for data transformation, manipulation, terconnection, and for control: arithmetic operations - addition, subtraction, multiplication and division. logic operations - AND, OR,

More information

Figure 8-1 Four Possible Results of Adding Two Bits

Figure 8-1 Four Possible Results of Adding Two Bits CHPTER EIGHT Combinational Logic pplications Thus far, our discussion has focused on the theoretical design issues of computer systems. We have not yet addressed any of the actual hardware you might find

More information

Combinational Logic Design

Combinational Logic Design Chapter 4 Combinational Logic Design The foundations for the design of digital logic circuits were established in the preceding chapters. The elements of Boolean algebra (two-element switching algebra

More information

earlier in the semester: The Full adder above adds two bits and the output is at the end. So if we do this eight times, we would have an 8-bit adder.

earlier in the semester: The Full adder above adds two bits and the output is at the end. So if we do this eight times, we would have an 8-bit adder. The circuit created is an 8-bit adder. The 8-bit adder adds two 8-bit binary inputs and the result is produced in the output. In order to create a Full 8-bit adder, I could use eight Full -bit adders and

More information

Gates, Circuits, and Boolean Algebra

Gates, Circuits, and Boolean Algebra Gates, Circuits, and Boolean Algebra Computers and Electricity A gate is a device that performs a basic operation on electrical signals Gates are combined into circuits to perform more complicated tasks

More information

CSE140: Components and Design Techniques for Digital Systems

CSE140: Components and Design Techniques for Digital Systems CSE4: Components and Design Techniques for Digital Systems Tajana Simunic Rosing What we covered thus far: Number representations Logic gates Boolean algebra Introduction to CMOS HW#2 due, HW#3 assigned

More information

Lecture 12: More on Registers, Multiplexers, Decoders, Comparators and Wot- Nots

Lecture 12: More on Registers, Multiplexers, Decoders, Comparators and Wot- Nots Lecture 12: More on Registers, Multiplexers, Decoders, Comparators and Wot- Nots Registers As you probably know (if you don t then you should consider changing your course), data processing is usually

More information

2011, The McGraw-Hill Companies, Inc. Chapter 3

2011, The McGraw-Hill Companies, Inc. Chapter 3 Chapter 3 3.1 Decimal System The radix or base of a number system determines the total number of different symbols or digits used by that system. The decimal system has a base of 10 with the digits 0 through

More information

Combinational-Circuit Building Blocks

Combinational-Circuit Building Blocks May 9, 24 :4 vra6857_ch6 Sheet number Page number 35 black chapter 6 Combinational-Circuit Building Blocks Chapter Objectives In this chapter you will learn about: Commonly used combinational subcircuits

More information

DM9368 7-Segment Decoder/Driver/Latch with Constant Current Source Outputs

DM9368 7-Segment Decoder/Driver/Latch with Constant Current Source Outputs DM9368 7-Segment Decoder/Driver/Latch with Constant Current Source Outputs General Description The DM9368 is a 7-segment decoder driver incorporating input latches and constant current output circuits

More information

LOGICOS SERIE 4000. Precios sujetos a variación. Ref. Part # Descripción Precio Foto Ref. Quad 2-Input NOR Buffered B Series Gate / PDIP-14

LOGICOS SERIE 4000. Precios sujetos a variación. Ref. Part # Descripción Precio Foto Ref. Quad 2-Input NOR Buffered B Series Gate / PDIP-14 LOGICOS SERIE 4000 Precios sujetos a variación Ref. Part # Descripción Precio Foto Ref. A-6-1 CD4001 Quad 2-Input NOR Buffered B Series Gate / PDIP-14 $ 290 A-6-2 CD4001BCM Quad 2-Input NOR Buffered B

More information

Multiplexing. Multiplexing is the set of techniques that allows the simultaneous transmission of multiple signals across a single physical medium.

Multiplexing. Multiplexing is the set of techniques that allows the simultaneous transmission of multiple signals across a single physical medium. Multiplexing Multiplexing is the set of techniques that allows the simultaneous transmission of multiple signals across a single physical medium. The following two factors in data communications lead to

More information

Take-Home Exercise. z y x. Erik Jonsson School of Engineering and Computer Science. The University of Texas at Dallas

Take-Home Exercise. z y x. Erik Jonsson School of Engineering and Computer Science. The University of Texas at Dallas Take-Home Exercise Assume you want the counter below to count mod-6 backward. That is, it would count 0-5-4-3-2-1-0, etc. Assume it is reset on startup, and design the wiring to make the counter count

More information

Design Example: Counters. Design Example: Counters. 3-Bit Binary Counter. 3-Bit Binary Counter. Other useful counters:

Design Example: Counters. Design Example: Counters. 3-Bit Binary Counter. 3-Bit Binary Counter. Other useful counters: Design Eample: ers er: a sequential circuit that repeats a specified sequence of output upon clock pulses. A,B,C,, Z. G, O, T, E, R, P, S,!.,,,,,,,7. 7,,,,,,,.,,,,,,,,,,,. Binary counter: follows the binary

More information

SECTION C [short essay] [Not to exceed 120 words, Answer any SIX questions. Each question carries FOUR marks] 6 x 4=24 marks

SECTION C [short essay] [Not to exceed 120 words, Answer any SIX questions. Each question carries FOUR marks] 6 x 4=24 marks UNIVERSITY OF KERALA First Degree Programme in Computer Applications Model Question Paper Semester I Course Code- CP 1121 Introduction to Computer Science TIME : 3 hrs Maximum Mark: 80 SECTION A [Very

More information

United States Naval Academy Electrical and Computer Engineering Department. EC262 Exam 1

United States Naval Academy Electrical and Computer Engineering Department. EC262 Exam 1 United States Naval Academy Electrical and Computer Engineering Department EC262 Exam 29 September 2. Do a page check now. You should have pages (cover & questions). 2. Read all problems in their entirety.

More information

(1) /30 (2) /30 (3) /40 TOTAL /100

(1) /30 (2) /30 (3) /40 TOTAL /100 Your Name: SI Number: UNIVERSITY OF CALIFORNIA AT BERKELEY BERKELEY AVIS IRVINE LOS ANGELES RIVERSIE SAN IEGO SAN FRANCISCO epartment of Electrical Engineering and Computer Sciences SANTA BARBARA SANTA

More information

Memory Elements. Combinational logic cannot remember

Memory Elements. Combinational logic cannot remember Memory Elements Combinational logic cannot remember Output logic values are function of inputs only Feedback is needed to be able to remember a logic value Memory elements are needed in most digital logic

More information

Hexadecimal and Numeric Indicators. Technical Data 5082-7300 5082-7302 5082-7304 5082-7340

Hexadecimal and Numeric Indicators. Technical Data 5082-7300 5082-7302 5082-7304 5082-7340 H Hexadecimal and Numeric Indicators Technical Data 5082-7300 5082-7302 5082-7304 5082-7340 Features Numeric 5082-7300/-7302 0-9, Test State, Minus Sign, Blank States Decimal Point 7300 Right Hand D.P.

More information

EE 261 Introduction to Logic Circuits. Module #2 Number Systems

EE 261 Introduction to Logic Circuits. Module #2 Number Systems EE 261 Introduction to Logic Circuits Module #2 Number Systems Topics A. Number System Formation B. Base Conversions C. Binary Arithmetic D. Signed Numbers E. Signed Arithmetic F. Binary Codes Textbook

More information

Lab 1: Study of Gates & Flip-flops

Lab 1: Study of Gates & Flip-flops 1.1 Aim Lab 1: Study of Gates & Flip-flops To familiarize with circuit implementations using ICs and test the behavior of different logic gates and Flip-flops. 1.2 Hardware Requirement a. Equipments -

More information

ASYNCHRONOUS COUNTERS

ASYNCHRONOUS COUNTERS LB no.. SYNCHONOUS COUNTES. Introduction Counters are sequential logic circuits that counts the pulses applied at their clock input. They usually have 4 bits, delivering at the outputs the corresponding

More information

Lab 17: Building a 4-Digit 7-Segment LED Decoder

Lab 17: Building a 4-Digit 7-Segment LED Decoder Phys2303 L.A. Bumm [Nexys 1.1.2] Lab 17 (p1) Lab 17: Building a 4-Digit 7-Segment LED Decoder In this lab your will make 4 test circuits, the 4-digit 7-segment decoder, and demonstration circuit using

More information

Digital Design. Assoc. Prof. Dr. Berna Örs Yalçın

Digital Design. Assoc. Prof. Dr. Berna Örs Yalçın Digital Design Assoc. Prof. Dr. Berna Örs Yalçın Istanbul Technical University Faculty of Electrical and Electronics Engineering Office Number: 2318 E-mail: siddika.ors@itu.edu.tr Grading 1st Midterm -

More information

ELEC 2210 - EXPERIMENT 1 Basic Digital Logic Circuits

ELEC 2210 - EXPERIMENT 1 Basic Digital Logic Circuits Objectives ELEC - EXPERIMENT Basic Digital Logic Circuits The experiments in this laboratory exercise will provide an introduction to digital electronic circuits. You will learn how to use the IDL-00 Bit

More information

Read-only memory Implementing logic with ROM Programmable logic devices Implementing logic with PLDs Static hazards

Read-only memory Implementing logic with ROM Programmable logic devices Implementing logic with PLDs Static hazards Points ddressed in this Lecture Lecture 8: ROM Programmable Logic Devices Professor Peter Cheung Department of EEE, Imperial College London Read-only memory Implementing logic with ROM Programmable logic

More information

Counters and Decoders

Counters and Decoders Physics 3330 Experiment #10 Fall 1999 Purpose Counters and Decoders In this experiment, you will design and construct a 4-bit ripple-through decade counter with a decimal read-out display. Such a counter

More information

Multiplexers and demultiplexers

Multiplexers and demultiplexers Multiplexers and demultiplexers This worksheet and all related files are licensed under the Creative Commons Attribution License, version.. To view a copy of this license, visit http://creativecommons.org/licenses/by/./,

More information

Gates, Plexers, Decoders, Registers, Addition and Comparison

Gates, Plexers, Decoders, Registers, Addition and Comparison Introduction to Digital Logic Autumn 2008 Gates, Plexers, Decoders, Registers, Addition and Comparison karl.marklund@it.uu.se ...open up a command shell and type logisim and press enter to start Logisim.

More information

Today s topics. Digital Computers. More on binary. Binary Digits (Bits)

Today s topics. Digital Computers. More on binary. Binary Digits (Bits) Today s topics! Binary Numbers! Brookshear.-.! Slides from Prof. Marti Hearst of UC Berkeley SIMS! Upcoming! Networks Interactive Introduction to Graph Theory http://www.utm.edu/cgi-bin/caldwell/tutor/departments/math/graph/intro

More information

Digital Logic Design. Basics Combinational Circuits Sequential Circuits. Pu-Jen Cheng

Digital Logic Design. Basics Combinational Circuits Sequential Circuits. Pu-Jen Cheng Digital Logic Design Basics Combinational Circuits Sequential Circuits Pu-Jen Cheng Adapted from the slides prepared by S. Dandamudi for the book, Fundamentals of Computer Organization and Design. Introduction

More information

Number of bits needed to address hosts 8

Number of bits needed to address hosts 8 Advanced Subnetting Example 1: Your ISP has assigned you a Class C network address of 198.47.212.0. You have 3 networks in your company with the largest containing 134 hosts. You need to figure out if

More information

Multiplexers and Demultiplexers

Multiplexers and Demultiplexers I this lesso, you will lear about: Multiplexers ad Demultiplexers 1. Multiplexers 2. Combiatioal circuit implemetatio with multiplexers 3. Demultiplexers 4. Some examples Multiplexer A Multiplexer (see

More information

List of Experiment. 8. To study and verify the BCD to Seven Segments DECODER.(IC-7447).

List of Experiment. 8. To study and verify the BCD to Seven Segments DECODER.(IC-7447). G. H. RAISONI COLLEGE OF ENGINEERING, NAGPUR Department of Electronics & Communication Engineering Branch:-4 th Semester[Electronics] Subject: - Digital Circuits List of Experiment Sr. Name Of Experiment

More information

The string of digits 101101 in the binary number system represents the quantity

The string of digits 101101 in the binary number system represents the quantity Data Representation Section 3.1 Data Types Registers contain either data or control information Control information is a bit or group of bits used to specify the sequence of command signals needed for

More information

Guru Ghasidas Vishwavidyalaya, Bilaspur (C.G.) Institute of Technology. Electronics & Communication Engineering. B.

Guru Ghasidas Vishwavidyalaya, Bilaspur (C.G.) Institute of Technology. Electronics & Communication Engineering. B. Guru Ghasidas Vishwavidyalaya, Bilaspur (C.G.) Institute of Technology Electronics & Communication Engineering B.Tech III Semester 1. Electronic Devices Laboratory 2. Digital Logic Circuit Laboratory 3.

More information

The use of binary codes to represent characters

The use of binary codes to represent characters The use of binary codes to represent characters Teacher s Notes Lesson Plan x Length 60 mins Specification Link 2.1.4/hi Character Learning objective (a) Explain the use of binary codes to represent characters

More information

FORDHAM UNIVERSITY CISC 3593. Dept. of Computer and Info. Science Spring, 2011. Lab 2. The Full-Adder

FORDHAM UNIVERSITY CISC 3593. Dept. of Computer and Info. Science Spring, 2011. Lab 2. The Full-Adder FORDHAM UNIVERSITY CISC 3593 Fordham College Lincoln Center Computer Organization Dept. of Computer and Info. Science Spring, 2011 Lab 2 The Full-Adder 1 Introduction In this lab, the student will construct

More information

Digital Multiplexer and Demultiplexer. Features. General Description. Input/Output Connections. When to Use a Multiplexer. Multiplexer 1.

Digital Multiplexer and Demultiplexer. Features. General Description. Input/Output Connections. When to Use a Multiplexer. Multiplexer 1. PSoC Creator Component Datasheet Digital Multiplexer and Demultiplexer 1.10 Features Digital Multiplexer Digital Demultiplexer Up to 16 channels General Description The Multiplexer component is used to

More information

Chapter 1: Digital Systems and Binary Numbers

Chapter 1: Digital Systems and Binary Numbers Chapter 1: Digital Systems and Binary Numbers Digital age and information age Digital computers general purposes many scientific, industrial and commercial applications Digital systems telephone switching

More information

Operating Manual Ver.1.1

Operating Manual Ver.1.1 4 Bit Binary Ripple Counter (Up-Down Counter) Operating Manual Ver.1.1 An ISO 9001 : 2000 company 94-101, Electronic Complex Pardesipura, Indore- 452010, India Tel : 91-731- 2570301/02, 4211100 Fax: 91-731-

More information

Standart TTL, Serie 74... Art.Gruppe 13.15. 1...

Standart TTL, Serie 74... Art.Gruppe 13.15. 1... Standart TTL, Serie 74... Art.Gruppe 13.15. 1... Standart TTL, Serie 74... 7400 Quad 2-Input Nand Gate (TP) DIL14 7402 Quad 2 Input Nor Gate (TP) DIL14 7403 Quad 2 Input Nand Gate (OC) DIL14 7404 Hex Inverter

More information

Seven-Segment LED Displays

Seven-Segment LED Displays Seven-Segment LED Displays Nicholas Neumann 11/19/2010 Abstract Seven-segment displays are electronic display devices used as an easy way to display decimal numerals and an alterative to the more complex

More information

Digital circuits make up all computers and computer systems. The operation of digital circuits is based on

Digital circuits make up all computers and computer systems. The operation of digital circuits is based on Digital Logic Circuits Digital circuits make up all computers and computer systems. The operation of digital circuits is based on Boolean algebra, the mathematics of binary numbers. Boolean algebra is

More information

Decimal Number (base 10) Binary Number (base 2)

Decimal Number (base 10) Binary Number (base 2) LECTURE 5. BINARY COUNTER Before starting with counters there is some vital information that needs to be understood. The most important is the fact that since the outputs of a digital chip can only be

More information

Digital Fundamentals. Lab 8 Asynchronous Counter Applications

Digital Fundamentals. Lab 8 Asynchronous Counter Applications Richland College Engineering Technology Rev. 0 B. Donham Rev. 1 (7/2003). Horne Rev. 2 (1/2008). Bradbury Digital Fundamentals CETT 1425 Lab 8 Asynchronous Counter Applications Name: Date: Objectives:

More information

Android based Alcohol detection system using Bluetooth technology

Android based Alcohol detection system using Bluetooth technology For more Project details visit: http://www.projectsof8051.com/android-based-alcohol-detection-system-usingbluetooth-technology/ Code 1435 Project Title Android based Alcohol detection system using Bluetooth

More information

HCF4028B BCD TO DECIMAL DECODER

HCF4028B BCD TO DECIMAL DECODER BCD TO DECIMAL DECODER BCD TO DECIMAL DECODING OR BINARY TO OCTAL DECODING HIGH DECODED OUTPUT DRIVE CAPABILITY "POSITIVE LOGIC" INPUTS AND OUTPUTS: DECODED OUTPUTS GO HIGH ON SELECTION MEDIUM SPEED OPERATION

More information

ENGI 241 Experiment 5 Basic Logic Gates

ENGI 241 Experiment 5 Basic Logic Gates ENGI 24 Experiment 5 Basic Logic Gates OBJECTIVE This experiment will examine the operation of the AND, NAND, OR, and NOR logic gates and compare the expected outputs to the truth tables for these devices.

More information

plc numbers - 13.1 Encoded values; BCD and ASCII Error detection; parity, gray code and checksums

plc numbers - 13.1 Encoded values; BCD and ASCII Error detection; parity, gray code and checksums plc numbers - 3. Topics: Number bases; binary, octal, decimal, hexadecimal Binary calculations; s compliments, addition, subtraction and Boolean operations Encoded values; BCD and ASCII Error detection;

More information

INTEGRATED CIRCUITS. For a complete data sheet, please also download:

INTEGRATED CIRCUITS. For a complete data sheet, please also download: INTEGRATED CIRCUITS DATA SHEET For a complete data sheet, please also download: The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications The IC06 74HC/HCT/HCU/HCMOS Logic Package Information The IC06 74HC/HCT/HCU/HCMOS

More information

Experiment # 9. Clock generator circuits & Counters. Eng. Waleed Y. Mousa

Experiment # 9. Clock generator circuits & Counters. Eng. Waleed Y. Mousa Experiment # 9 Clock generator circuits & Counters Eng. Waleed Y. Mousa 1. Objectives: 1. Understanding the principles and construction of Clock generator. 2. To be familiar with clock pulse generation

More information

Chapter 4: Computer Codes

Chapter 4: Computer Codes Slide 1/30 Learning Objectives In this chapter you will learn about: Computer data Computer codes: representation of data in binary Most commonly used computer codes Collating sequence 36 Slide 2/30 Data

More information

Binary Adders: Half Adders and Full Adders

Binary Adders: Half Adders and Full Adders Binary Adders: Half Adders and Full Adders In this set of slides, we present the two basic types of adders: 1. Half adders, and 2. Full adders. Each type of adder functions to add two binary bits. In order

More information

RAM & ROM Based Digital Design. ECE 152A Winter 2012

RAM & ROM Based Digital Design. ECE 152A Winter 2012 RAM & ROM Based Digital Design ECE 152A Winter 212 Reading Assignment Brown and Vranesic 1 Digital System Design 1.1 Building Block Circuits 1.1.3 Static Random Access Memory (SRAM) 1.1.4 SRAM Blocks in

More information

EE360: Digital Design I Course Syllabus

EE360: Digital Design I Course Syllabus : Course Syllabus Dr. Mohammad H. Awedh Fall 2008 Course Description This course introduces students to the basic concepts of digital systems, including analysis and design. Both combinational and sequential

More information

DEPARTMENT OF INFORMATION TECHNLOGY

DEPARTMENT OF INFORMATION TECHNLOGY DRONACHARYA GROUP OF INSTITUTIONS, GREATER NOIDA Affiliated to Mahamaya Technical University, Noida Approved by AICTE DEPARTMENT OF INFORMATION TECHNLOGY Lab Manual for Computer Organization Lab ECS-453

More information

Interfacing To Alphanumeric Displays

Interfacing To Alphanumeric Displays Interfacing To Alphanumeric Displays To give directions or data values to users, many microprocessor-controlled instruments and machines need to display letters of the alphabet and numbers. In systems

More information

DATA SHEETS DE COMPONENTES DA FAMÍLIA LÓGICA TTL GATES AND INVERTERS POSITIVES NAND GATES AND INVERTERS DESCRIÇÃO

DATA SHEETS DE COMPONENTES DA FAMÍLIA LÓGICA TTL GATES AND INVERTERS POSITIVES NAND GATES AND INVERTERS DESCRIÇÃO GATES AND INVERTERS POSITIVES NAND GATES AND INVERTERS Hex Invertes 74LS04 Quadruple 2 Inputs Gates 74LS00 Triple 3 Inputs Gates 74LS10 Dual 4 Inputs Gates 74LS20 8 Inputs Gates 74LS30 13 Inputs Gates

More information

HOMEWORK # 2 SOLUTIO

HOMEWORK # 2 SOLUTIO HOMEWORK # 2 SOLUTIO Problem 1 (2 points) a. There are 313 characters in the Tamil language. If every character is to be encoded into a unique bit pattern, what is the minimum number of bits required to

More information

Lecture 4: Binary. CS442: Great Insights in Computer Science Michael L. Littman, Spring 2006. I-Before-E, Continued

Lecture 4: Binary. CS442: Great Insights in Computer Science Michael L. Littman, Spring 2006. I-Before-E, Continued Lecture 4: Binary CS442: Great Insights in Computer Science Michael L. Littman, Spring 26 I-Before-E, Continued There are two ideas from last time that I d like to flesh out a bit more. This time, let

More information

Logic gates. Chapter. 9.1 Logic gates. MIL symbols. Learning Summary. In this chapter you will learn about: Logic gates

Logic gates. Chapter. 9.1 Logic gates. MIL symbols. Learning Summary. In this chapter you will learn about: Logic gates Chapter 9 Logic gates Learning Summary In this chapter you will learn about: Logic gates Truth tables Logic circuits/networks In this chapter we will look at how logic gates are used and how truth tables

More information

Programming A PLC. Standard Instructions

Programming A PLC. Standard Instructions Programming A PLC STEP 7-Micro/WIN32 is the program software used with the S7-2 PLC to create the PLC operating program. STEP 7 consists of a number of instructions that must be arranged in a logical order

More information

BINARY CODED DECIMAL: B.C.D.

BINARY CODED DECIMAL: B.C.D. BINARY CODED DECIMAL: B.C.D. ANOTHER METHOD TO REPRESENT DECIMAL NUMBERS USEFUL BECAUSE MANY DIGITAL DEVICES PROCESS + DISPLAY NUMBERS IN TENS IN BCD EACH NUMBER IS DEFINED BY A BINARY CODE OF 4 BITS.

More information

Content Map For Career & Technology

Content Map For Career & Technology Content Strand: Applied Academics CT-ET1-1 analysis of electronic A. Fractions and decimals B. Powers of 10 and engineering notation C. Formula based problem solutions D. Powers and roots E. Linear equations

More information

Section 1.4 Place Value Systems of Numeration in Other Bases

Section 1.4 Place Value Systems of Numeration in Other Bases Section.4 Place Value Systems of Numeration in Other Bases Other Bases The Hindu-Arabic system that is used in most of the world today is a positional value system with a base of ten. The simplest reason

More information

TCOM 370 NOTES 99-6 VOICE DIGITIZATION AND VOICE/DATA INTEGRATION

TCOM 370 NOTES 99-6 VOICE DIGITIZATION AND VOICE/DATA INTEGRATION TCOM 370 NOTES 99-6 VOICE DIGITIZATION AND VOICE/DATA INTEGRATION (Please read appropriate parts of Section 2.5.2 in book) 1. VOICE DIGITIZATION IN THE PSTN The frequencies contained in telephone-quality

More information

Oct: 50 8 = 6 (r = 2) 6 8 = 0 (r = 6) Writing the remainders in reverse order we get: (50) 10 = (62) 8

Oct: 50 8 = 6 (r = 2) 6 8 = 0 (r = 6) Writing the remainders in reverse order we get: (50) 10 = (62) 8 ECE Department Summer LECTURE #5: Number Systems EEL : Digital Logic and Computer Systems Based on lecture notes by Dr. Eric M. Schwartz Decimal Number System: -Our standard number system is base, also

More information

Layout of Multiple Cells

Layout of Multiple Cells Layout of Multiple Cells Beyond the primitive tier primitives add instances of primitives add additional transistors if necessary add substrate/well contacts (plugs) add additional polygons where needed

More information

Upon completion of unit 1.1, students will be able to

Upon completion of unit 1.1, students will be able to Upon completion of unit 1.1, students will be able to 1. Demonstrate safety of the individual, class, and overall environment of the classroom/laboratory, and understand that electricity, even at the nominal

More information

A Lesson on Digital Clocks, One Shots and Counters

A Lesson on Digital Clocks, One Shots and Counters A Lesson on Digital Clocks, One Shots and Counters Topics Clocks & Oscillators LM 555 Timer IC Crystal Oscillators Selection of Variable Resistors Schmitt Gates Power-On Reset Circuits One Shots Counters

More information

Digital Systems Based on Principles and Applications of Electrical Engineering/Rizzoni (McGraw Hill

Digital Systems Based on Principles and Applications of Electrical Engineering/Rizzoni (McGraw Hill Digital Systems Based on Principles and Applications of Electrical Engineering/Rizzoni (McGraw Hill Objectives: Analyze the operation of sequential logic circuits. Understand the operation of digital counters.

More information

Chapter 4 Register Transfer and Microoperations. Section 4.1 Register Transfer Language

Chapter 4 Register Transfer and Microoperations. Section 4.1 Register Transfer Language Chapter 4 Register Transfer and Microoperations Section 4.1 Register Transfer Language Digital systems are composed of modules that are constructed from digital components, such as registers, decoders,

More information

Gray Code Generator and Decoder by Carsten Kristiansen Napier University. November 2004

Gray Code Generator and Decoder by Carsten Kristiansen Napier University. November 2004 Gray Code Generator and Decoder by Carsten Kristiansen Napier University November 2004 Title page Author: Carsten Kristiansen. Napier No: 04007712. Assignment title: Design of a Gray Code Generator and

More information

Lecture 8: Synchronous Digital Systems

Lecture 8: Synchronous Digital Systems Lecture 8: Synchronous Digital Systems The distinguishing feature of a synchronous digital system is that the circuit only changes in response to a system clock. For example, consider the edge triggered

More information

DM74LS47 BCD to 7-Segment Decoder/Driver with Open-Collector Outputs

DM74LS47 BCD to 7-Segment Decoder/Driver with Open-Collector Outputs DM74LS47 BCD to 7-Segment Decoder/Driver with Open-Collector Outputs General Description The DM74LS47 accepts four lines of BCD (8421) input data, generates their complements internally and decodes the

More information

University of St. Thomas ENGR 230 ---- Digital Design 4 Credit Course Monday, Wednesday, Friday from 1:35 p.m. to 2:40 p.m. Lecture: Room OWS LL54

University of St. Thomas ENGR 230 ---- Digital Design 4 Credit Course Monday, Wednesday, Friday from 1:35 p.m. to 2:40 p.m. Lecture: Room OWS LL54 Fall 2005 Instructor Texts University of St. Thomas ENGR 230 ---- Digital Design 4 Credit Course Monday, Wednesday, Friday from 1:35 p.m. to 2:40 p.m. Lecture: Room OWS LL54 Lab: Section 1: OSS LL14 Tuesday

More information

CDA 3200 Digital Systems. Instructor: Dr. Janusz Zalewski Developed by: Dr. Dahai Guo Spring 2012

CDA 3200 Digital Systems. Instructor: Dr. Janusz Zalewski Developed by: Dr. Dahai Guo Spring 2012 CDA 3200 Digital Systems Instructor: Dr. Janusz Zalewski Developed by: Dr. Dahai Guo Spring 2012 Outline Data Representation Binary Codes Why 6-3-1-1 and Excess-3? Data Representation (1/2) Each numbering

More information

Using Logic to Design Computer Components

Using Logic to Design Computer Components CHAPTER 13 Using Logic to Design Computer Components Parallel and sequential operation In this chapter we shall see that the propositional logic studied in the previous chapter can be used to design digital

More information

Let s put together a Manual Processor

Let s put together a Manual Processor Lecture 14 Let s put together a Manual Processor Hardware Lecture 14 Slide 1 The processor Inside every computer there is at least one processor which can take an instruction, some operands and produce

More information

Chapter 2 Logic Gates and Introduction to Computer Architecture

Chapter 2 Logic Gates and Introduction to Computer Architecture Chapter 2 Logic Gates and Introduction to Computer Architecture 2.1 Introduction The basic components of an Integrated Circuit (IC) is logic gates which made of transistors, in digital system there are

More information

WEEK 8.1 Registers and Counters. ECE124 Digital Circuits and Systems Page 1

WEEK 8.1 Registers and Counters. ECE124 Digital Circuits and Systems Page 1 WEEK 8.1 egisters and Counters ECE124 igital Circuits and Systems Page 1 Additional schematic FF symbols Active low set and reset signals. S Active high set and reset signals. S ECE124 igital Circuits

More information

Course Requirements & Evaluation Methods

Course Requirements & Evaluation Methods Course Title: Logic Circuits Course Prefix: ELEG Course No.: 3063 Sections: 01 & 02 Department of Electrical and Computer Engineering College of Engineering Instructor Name: Justin Foreman Office Location:

More information

Karnaugh Maps (K-map) Alternate representation of a truth table

Karnaugh Maps (K-map) Alternate representation of a truth table Karnaugh Maps (K-map) lternate representation of a truth table Red decimal = minterm value Note that is the MS for this minterm numbering djacent squares have distance = 1 Valuable tool for logic minimization

More information

Asynchronous counters, except for the first block, work independently from a system clock.

Asynchronous counters, except for the first block, work independently from a system clock. Counters Some digital circuits are designed for the purpose of counting and this is when counters become useful. Counters are made with flip-flops, they can be asynchronous or synchronous and they can

More information

DM74LS153 Dual 1-of-4 Line Data Selectors/Multiplexers

DM74LS153 Dual 1-of-4 Line Data Selectors/Multiplexers Dual 1-of-4 Line Data Selectors/Multiplexers General Description Each of these data selectors/multiplexers contains inverters and drivers to supply fully complementary, on-chip, binary decoding data selection

More information

Memory unit. 2 k words. n bits per word

Memory unit. 2 k words. n bits per word 9- k address lines Read n data input lines Memory unit 2 k words n bits per word n data output lines 24 Pearson Education, Inc M Morris Mano & Charles R Kime 9-2 Memory address Binary Decimal Memory contents

More information

54157 DM54157 DM74157 Quad 2-Line to 1-Line Data Selectors Multiplexers

54157 DM54157 DM74157 Quad 2-Line to 1-Line Data Selectors Multiplexers 54157 DM54157 DM74157 Quad 2-Line to 1-Line Data Selectors Multiplexers General Description These data selectors multiplexers contain inverters and drivers to supply full on-chip data selection to the

More information

CONTENTS PREFACE 1 INTRODUCTION 1 2 NUMBER SYSTEMS AND CODES 25. vii

CONTENTS PREFACE 1 INTRODUCTION 1 2 NUMBER SYSTEMS AND CODES 25. vii 2006 Pearson Education, Inc., Upper Saddle River, NJ. All rights reserved. This material is CONTENTS PREFACE xv 1 INTRODUCTION 1 1.1 About Digital Design 1 1.2 Analog versus Digital 3 1.3 Digital Devices

More information

Course: Bachelor of Science (B. Sc.) 1 st year. Subject: Electronic Equipment Maintenance. Scheme of Examination for Semester 1 & 2

Course: Bachelor of Science (B. Sc.) 1 st year. Subject: Electronic Equipment Maintenance. Scheme of Examination for Semester 1 & 2 UPDATED SCHEME OF EXAMS. & SYLLABI FOR B.SC. Course: Bachelor of Science (B. Sc.) 1 st year Subject: Electronic Equipment Maintenance Scheme of Examination for Semester 1 & 2 (i) Theory: Two papers of

More information

Cyber Security Workshop Encryption Reference Manual

Cyber Security Workshop Encryption Reference Manual Cyber Security Workshop Encryption Reference Manual May 2015 Basic Concepts in Encoding and Encryption Binary Encoding Examples Encryption Cipher Examples 1 P a g e Encoding Concepts Binary Encoding Basics

More information