Improvement of Energy Efficiency in Power Electronics at Partial Load

Transcription

1 Improvemet of ergy fficiecy i Power lectroics at Partial Load Klaus Muehlbauer, ieter Gerlig Istitute for lectrical rives ad Actuators, iversitaet der Budeswehr Mueche, Germay klaus.muehlbauer@uibw.de, dieter.gerlig@uibw.de Abstrt-I commo applicatios electric drives mostly do ot operate at full but at partial load. Cocerig the eergy efficiecy of the electric drive ot the maximum efficiecy is essetial but the efficiecy at low load is relevat. I this paper a ew method is preseted which improves the efficiecy of the power electroics of a electric drive at partial load. he method is based o a variatio of the tive trasistor area. I case of a electric vehicle a power losses reductio of about 15% ca be rehed just i the power electroics i the drivig cycle ARMIS ROA. I. INROCION he eergy efficiecy of a electric drive ca be specified i a rage betwee 9% ad 98%. However, this value is rehed i a small operatio area of the electric drive, especially at full load which correspods to the desig poit of the electric drive, but beside this workig poit the efficiecy of the drive decreases sigificatly. I may applicatios the electric drives maily do ot operate at full load, but at low load. xamples are pumps, wid turbies or the trtio motor of a battery or hybrid electric vehicle. Cosequetly, for this task ot the maximum efficiecy of the electric drive, but the efficiecy at low load is importat cocerig the eergy efficiecy. I geeral, there is great potetial improvig the efficiecy of electric drives especially at partial load whereas the maximum efficiecy is ot dowgraded. Improvemets will save eergy, raise the eergy output of wid turbies or expad the rage of the electric vehicle. I case of a speed or curret cotrolled electric drive the drive cosists of a electric mhie, power electroics ad a cotroller uit. All three compoets cotribute to the total eergy efficiecy of the electric drive. Great ivestigatios have bee doe i [1] by improvig the eergy efficiecy of the electric motor especially at low load. he beefit of the efficiecy improvemets o the power losses of the electric mhie i the drivig cycle ARMIS ROA is show i [] by usig the simulatio model described i [3]. he efficiecy improvemet of the electric mhie results i a low phase curret for a desired torque at a certai speed which leads agai to lower power losses i the power electroics. Furthermore, this beefit ca be exteded whe the power electroics system is fitted to the partial load optimized electric mhie which is described i []. I a ext step the eergy efficiecy of the power electroics itself should be improved especially at partial load. herefore i this paper a method is described which reduces the power losses i the power electroics at partial load i additio to the above metioed ivestigatios. II. POWR LCRONICS LOSSS he efficiecy improvemet is doe by reducig the power losses of the power electroics. hese losses ca be divided ito coductio ad switchig losses. he former ca be calculated aalytically by approximatio for siusoidal fed electric mhie, as described theoretically i [5] ad disposed i simulatio platforms for a electric trtio drive aalysis i [6], [7] ad [8]. he coductio behavior of the switchig devices ca be approhed by a threshold voltage ad a differetial resistace. his switchig-o-resistace is proportioal to the chip area of the power semicoductors. Cosequetly, the coductio losses are approximately iversely proportioal to the chip area of the semicoductors. he reaso for the switchig losses are the charge carriers which have to be ijected i case of tur o ad rejected durig the switchig off stage. his behavior is deeply depedig o the curret which is tured o ad off ad ca be parameterized by a polyomial which makes it possible calculatig the average power losses i a electric mhie period. his method is used i [6] ad [7] for a polyomial without a offset ad exteded with switchig losses at zero curret i [8]. As it ca be see from the work doe i [] the switchig losses are approximately proportioal to the chip area of the power semicoductors. III. IMPROVMN OF NRGY FFICINCY IN POWR LCRONICS hese basic physical priciples of the particular power losses proportios ca be used i order to improve the eergy efficiecy of the power electroics. he idea is to chage the chip area of the power semicoductors durig operatio. his ca be realized as eh power semicoductor device is built up by several parallel coected semicoductor chips. o some extet this cofiguratio is already realized particularly i idustrial power modules, but the idividual chips are powered by oe driver ad switched o ad off sychroously. his setup eeds just some margial chages ad the the tive chip area of the trasistor ca be chaged i discrete steps cordig to the discrete chose semicoductor chips. he basic desig of a sigle valve i power electroics is plotted i Fig. 1. here, the parallel /11/$6. 11 I 69

2 river Cotrol 1 1 Fig. 1. esig of oe valve of power electroics for improvemet of eergy efficiecy circuit is exemplary implemeted with four parallel coected trasistors ad four parallel coected diodes. Because the switchig behavior of the diodes caot be iflueced exterally, the four diodes ca be repled by oe diode with the quadruplicate semicoductor area. he umber of parallel coected trasistors is a tradeoff betwee additioal expese ad eergy efficiecy. he exemplary four parallel coected trasistors build up oe switchig device of commo power electroics. he gates of the semicoductor chips are supplied by a driver circuit. he extesios which have to be made for the improvemet of the eergy efficiecy ad which are colored red i Fig. 1 cosist of a additioal switch for eh semicoductor chip ad a cotrol uit which optimizes the tive power semicoductor chip area ad cotrols the additioal switches. I cotrast to the trasistor chips (blk) the additioal switches (red) do ot carry a high curret desity ad ca be realized as simple low power switches. With this proposed extesio the basic costructio of the power electroics ad the cotroller uit of the electric drive system are ot chaged. Furthermore passive or tive compoets are ot added i the power circuit of the power electroics. I additio the covetioal cotrol loops have ot to be adapted to the ew method improvig the eergy efficiecy. he additioal switches ad cotrol uit (red) ca be added i the covetioal cotrol system of the power electroics ad because the power desity of the additioal switches (red) is low the cessory spe for the switches is maageable. he additioal cotrol (red) ca be implemeted withi the existig cotroller of the power electroics. Based o the physical cosideratios doe i chapter II the modificatio of the tive chip area of the trasistors gives the opportuity ifluecig the coductio ad switchig losses of the power electroics. By reducig the tive chip area the switchig losses are reduced i cotrast to the coductio losses which icrease. epedig o the operatio poit ad the resultig absolute coductio ad switchig losses whe the absolute switchig losses are higher tha the coductio losses a reductio of the tive chip area may decrease the switchig losses sigificatly ad icrease the coductio losses margial. So the total losses i the power electroics ca be miimized by reducig the tive chip area of the trasistors. his method is promisig, especially whe electric drives mostly operate at low load as metioed i chapter I. IV. SIMLAION I order to verify the correlatio betwee the coductio ad switchig losses, the variatio of the tive chip area of the trasistors ad the operatio of electric mhies at low load a simulatio model is built up [9]. It is based o a power electroics model which aalytically calculates the power losses i the power electroics based o physical charteristics of the power semicoductor devices ad is described i [8]. I compariso to other published power electroic models, like i [6] ad [7], the model i [8] already icludes a discrete variatio of the parallel switched power semicoductor chips i 1A steps. A typical example for a electric drive workig maily at partial load is a trtio drive for a battery electric vehicle. With the system simulatio platform described i [3] ad the power electroics model proposed i [8] the drivig cycle ARMIS ROA is aalyzed by simulatio. herefore, the above metioed partial load optimized electric mhie whose operatio mode is published i [1] ad beefits are show i [] is used. he correspodig power electroics system is dimesioed ad aalyzed cordig power losses i []. Appropriate to the phase curret request of the chose electric mhie of maximum A four parallel switched trasistors ad diodes are selected for eh power valve of the power electroics i the IGB-geeratio IGB3 from Ifieo as displayed i Fig. 1. he simulatio results are plotted i Fig. without a variatio of the trasistors` chip area. At the top the power losses i the power electroics are plotted. Blue are the total, red the switchig ad gree the coductio losses. It ca be see that the switchig losses are higher tha the coductio losses especially at low load where the coductio losses are low. here, the switchig losses have a offset of about 3W. his comes from the ft that the power electroics is desiged for a high phase curret but i the drivig cycle oly low power is demaded 15 1 ergy (J) 5 Power Losses of Power lectroics otal Switchig Coductio x 15 otal ergy Losses of Power lectroics ime (s) Fig.. Power ad eergy losses of power electroics without a variatio of trasistors chip area 693

3 15 1 ergy (J) 5 otal Power Losses of Power lectroics x 15 otal ergy Losses of Power lectroics ime (s) Fig. 3. Compariso of power ad eergy losses of power electroics with ad without a variatio of trasistors chip area Coductio Losses of Power lectroics Switchig Losses of Power lectroics ime (s) Fig.. Compariso of coductio ad switchig losses of power electroics with ad without a variatio of trasistors chip area Curret (A) 1-1 Number (-) 3 Phase Curret of Power lectroics Number of Parallel Switched rasistors ime (s) Fig. 5. Phase curret ad compariso of umber of trasistor chips of power electroics with ad without a variatio of trasistors chip area from the trtio drive. At the bottom the total eergy losses are displayed durig the drivig cycle. For this applicatio the described method improvig the eergy efficiecy ca be used because the switchig losses are higher tha the coductio losses. With a variatio of the trasistors` tive chip area the power losses distributio betwee coductio ad switchig losses ca be optimized with the aim of reducig the total losses i the power electroics. 1. : first estimatio For a first estimatio the cotrol uit (Fig. 1 red) maagig the tive chip area of the trasistors is implemeted i a simple maer. As the parallel switched trasistors ca be varied i 1A steps i the simulatio platform the umber of parallel switched trasistors is determied by the tual phase curret of the power electroics. So uder a phase curret of 1A oly oe trasistor chip is tive, betwee 1A ad A two trasistor chips are tive ad so o. his is just a first assessmet ad ca be easily implemeted i the simulatio platform. he determiatio of the optimal umber of parallel switch trasistor chips follows i the ext chapter. he simulatio results with this first estimatio ca be see i Fig. 3 to Fig. 5. here, the power electroics without a variatio of the parallel switched trasistor chips is called stadard, colored i blue ad is kow from Fig. 1. he losses optimized method with variatio of the tive chip area is plotted i gree. From Fig. 3 it ca be see that with the losses optimized method the total power losses are reduced at low load ad icreased at high load. But all i all the eergy losses below show that a fial reductio of the total losses is rehed of about 1% at the ed of the drivig cycle. his correlatio ca be explaied by Fig.. At the top the coductio ad o the bottom the switchig losses are displayed. With the variatio of the tive trasistors` chip area the coductio losses are higher at high load, whereas the switchig losses are reduced durig the etire operatio. Although the coductio losses at high load are icreasig the beefit with this additioal cotrol strategy is obvious. I additio i Fig. 5 the phase curret ad below the umber of parallel switched trasistor chips are show. I the optimized mode the umber of chips depeds o the tual phase curret, whereas i the stadard mode the umber is kept costat to four chips. he cotrol algorithm of this optimizatio ca be implemeted o the cotroller i a simple maer via a additioal look-up table ad a compariso of the phase curret whose sigal is already available o the cotroller board for the curret cotrol loop. herefore, o mathematical calculatio or optimizatio, however, just the omial allowed curret of the IGB-chip is eeded. 69

4 dp d L P S, = = o, a P o, a1 S, I = a o, a I a1 I off, a a off, a1 I I off, a f s I, om f s, om I I P 1 α C u r 1 α, = cosϕ cosϕ (3) I I P 1 α C u r 1 α, = cosϕ cosϕ () = P P P P (5) P L C, C, S, S, I 1!,,,, α o a off a o a off a r cos ϕ f s fs f s 8 3, om, om, om = 1 α o, a off, a r cosϕ f s 8 3, om o, a off, a f s, om ( I ) = (1) () (6) (7). I: mathematical Optimum With the possibility of the variatio of the parallel switched trasistor chips cordig to the setup of Fig. 1 a further degree of freedom is itroduced to the power electroics system. he aim is to optimize the total power losses of the power electroics. With the additioal degree of freedom this ca be rehed by optimizig the coductio ad switchig losses i order to get lower total losses. So the optimizatio I with the first estimatio ca be developed further by optimizig the total losses which exist of coductio ad switchig losses i a mathematical maer. he switchig losses of the parallel switched trasistors ad the diodes for eh valve of the power electroics is give by equatio (1) 15 1 ergy (J) 5 otal Power Losses of Power lectroics I x 15 otal ergy Losses of Power lectroics I ime (s) Fig. 6. Compariso of power ad eergy losses of power electroics with ad without a variatio of trasistors chip area ad (), respectively. he correspodig coductio losses ca be calculated by equatios (3) ad (). here, ad are the umber of parallel switched trasistors ad diodes, f s is the switchig frequecy, the C-voltage of the coverter, I the phase curret, x are the switchig losses parameters ad u x ad r x the charteristics of the coductio losses. he summatio of all four equatios correspods to the total power losses P L of the power electroics i oe valve, as give i (5). he miimum total power losses cordig to the umber of parallel switched trasistor chips ca be foud by differetiatio of equatio (5) by the umber of parallel switched trasistor chips. he result ca be see i (6). I order to get a aalytical equatio for the optimum Curret (A) 1-1 Number (-) 3 Phase Curret of Power lectroics Number of Parallel Switched rasistors I ime (s) Fig. 7. Phase curret ad compariso of umber of trasistor chips of power electroics with ad without a variatio of trasistors chip area 695

5 umber of parallel switched trasistor chips the equatio (6) is set to zero ad solved cordig to the parameter. he result is show i equatio (7). I a ext step the mathematical optimized umber of parallel switched trasistor chips of equatio (7) is implemeted i the simulatio platform ad reples the estimatio of optimizatio I of the chapter before. he simulatio results are plotted i Fig. 6 ad Fig. 7. he optimizatio II is added to the already kow results from chapter 1 i mageta. I the top diagram of Fig. 6 it ca be see that the power losses with the mathematical optimizatio II is lower tha the stadard cofiguratio ad i the same rage of the optimizatio I. However, especially at high load with the optimizatio II a further reductio ca be rehed. his results i a further decrease of eergy losses of about 1% compared to optimizatio I ad of about 15% related to the stadard cofiguratio. he effect of the mathematical optimizatio II compared to the first estimatio (optimizatio I) ca be see i Fig. 7. At the bottom the umber of parallel switched trasistors is plotted. epedig o the phase curret (at the top of Fig. 7) the mathematical optimizatio II varies the umber of parallel switched trasistors ot i 1A-itervalls, as the optimizatio I does, but icreases the umber of parallel switched trasistors i smaller phasecurret-itervals due to the ft that with a icreasig phase curret the coductio losses rise higher tha the switchig losses as this ca be see from equatios (1) to (). V. CONCLSION here is still great potetial for optimizig the eergy efficiecy of electrical drives especially for those ruig maily at partial load. I this paper a method is proposed which improves the eergy efficiecy of the power electroics at low load. his is doe by chagig the tive area of the trasistors durig operatio ad followig a prtical realizatio is give. he beefit of this method is prove by simulatio ad is exemplary calculated for a trtio drive of a battery electric vehicle i the drivig cycle ARMIS. I a mathematical optimizatio betwee coductio ad switchig losses a fial reductio of the eergy losses of the power electroics at the ed of the drivig cycle is rehed of about 15%. RFRNCS [1] G. ajaku,. Gerlig: A Novel -Slots/1-Poles Widig opology for lectric Mhies, Iteratioal lectric Mhies ad rives Coferece (IMC), 11, Niagara Falls, Caada []. Gerlig, G. ajaku, K. Muehlbauer: Cost-ffective lectric rtio rive with High fficiecy at Low-Load Operatio, Iteratioal V Cogress emobility, 1, Leipzig, Germay [3] K. Muehlbauer, F. Bhl,. Gerlig: lectric rive Model for the Simulatio of the lectric Powertrai i a Battery lectric Vehicle, lectric Vehicle Symposium & xhibitio (VS), 1, Shezhe, Chia [] K. Muehlbauer,. Gerlig: Aalysis of Power Losses i AC/C-Coverter for lectric Vehicle rive, 7th I Vehicle Power ad Propulsio Coferece (VPPC), 11, Chicago, SA [5]. Schroeder: Leistugselektroische Schaltuge (Power lectroic Circuits), 8, Spriger (Germa) [6] M. Ade, A. Bider: Modelig the drive trai for two Parallel Hybrid lectric Vehicles i MALAB/Simulik, I Vehicle Power ad Propulsio Coferece (VPPC), 9, earbor, SA [7] R. Maigrasso, F.L. Mapelli: esig ad Modellig of Asychroous rtio rives Fed by Limited Power Source, I Vehicle Power ad Propulsio Coferece (VPPC), 5, Chicago, SA [8] K. Muehlbauer, F. Bhl,. Gerlig: Compariso of Measuremet ad Calculatio of Power Losses i AC/C- Coverter for lectric Vehicle rive, Iteratioal Coferece o lectrical Mhies ad Systems (ICMS), 11, Beijig, Chia [9] L. Guzzella, A. Sciaretta: Vehicle Propulsio Systems, 7, Spriger 696