1 High peed CAN Transceiver The NCV CAN transceiver is the interface between a controller area network (CAN) protocol controller and the physical bus and may be used in both V and V systems. The transceiver provides differential transmit capability to the bus and differential receive capability to the CAN controller. The NCV is an addition to the CAN high speed transceiver family complementing NCVx CAN stand alone transceivers and previous generations such as AMI, AMI0x, etc. Due to the wide common mode voltage range of the receiver inputs and other design features, the NCV is able to reach outstanding levels of electromagnetic susceptibility (EM). imilarly, extremely low electromagnetic emission (EME) is achieved by the excellent matching of the output signals. KEY FEATURE General Compatible with the IO 9 tandard High peed (up to Mbps) V IO Pin on NCVD Version Allowing Direct Interfacing with V to V Microcontrollers EN Pin on NCVDE Version Allowing witching the Transceiver to a Very Low Current OFF Mode Excellent Electromagnetic usceptibility (EM) Level Over Full Frequency Range. Very Low Electromagnetic Emissions (EME) Low EME also Without Common Mode (CM) Choke Bus Pins Protected Against > kv ystem ED Pulses Transmit Data () Dominant Time out Function Under all upply Conditions the Chip Behaves Predictably. No Disturbance of the Bus Lines with an Unpowered Node Bus Pins hort Circuit Proof to upply Voltage and Ground Bus Pins Protected Against Transients in an Automotive Environment Thermal Protection These are Pb Free Devices Quality NCV Prefix for Automotive and Other Applications Requiring Unique ite and Control Change Requirements; AEC Q00 Qualified and PPAP Capable Typical Applications Automotive Industrial Networks OIC CAE AZ PIN AIGNMENT MARKING DIAGRAM NV y ALYW NV = pecific Device Code y =, 0, or E A = Assembly Location L = Wafer Lot Y = Year W = Work Week = Pb Free Package NCV NCVDRG (Top View) NCV 0 NCVD0RG (Top View) NCV E NCVDERG (Top View) V IO NC EN ORDERING INFORMATION ee detailed ordering and shipping information in the package dimensions section on page 0 of this data sheet. emiconductor Components Industries, LLC, 0 October, 0 Rev. 0 Publication Order Number: NCV/D
2 Table. KEY TECHNICAL CHARACTERITIC AND OPERATING RANGE ymbol Parameter Conditions Min Max Unit Power supply voltage.. V V UV Undervoltage detection voltage.. V on pin V DC voltage at pin 0 < <. V; no time limit 0 +0 V V DC voltage at pin 0 < <. V; no time limit 0 +0 V V,L DC voltage between and pin 0 < <. V 0 +0 V V,Lmax DC voltage at pin and during load dump condition V ED Electrostatic discharge voltage IEC 000 at pins and 0 < <. V, less than one second + V kv V O(dif)(bus_dom) Differential bus output voltage in dominant state < R LT <. V CM range Input common mode range for comparator Guaranteed differential receiver threshold and leakage current 0 + V I CC upply current Dominant; V = 0 V Recessive; V =.. ma I CC upply current in silent mode.. ma t pd Propagation delay to ee Figure 90 ns T J Junction temperature 0 0 C
3 BLOCK DIAGRAM V IO /NC V IO NCV Timer Thermal shutdown Mode control Driver control EN() COMP RB000 () Only present in the NCVDERG () Connected to on versions without V IO pin Figure. Block Diagram of NCV Table. NCV: PIN FUNCTION DECRIPTION Pin Number Pin Name Pin Type Pin Function digital input, internal pull up Transmit data input; low input dominant driver ground Ground supply upply voltage digital output Receive data output; dominant bus low output NC not connected Not connected, NCV 0 version only V IO supply upply voltage for digital inputs/outputs, NCV Version only EN digital input, internal pull down Enable control input, NCV E version only high voltage input/output Low level CAN bus line (low in dominant mode) high voltage input/output High level CAN bus line (high in dominant mode) digital input, internal pull down ilent mode control input
4 APPLICATION INFORMATION VBAT V reg V reg V IO. Micro controller NCV R LT = 0 R LT = 0 RB000 CAN BU Figure. NCV Application Diagram VBAT V reg. Micro controller EN NCV R LT = 0 R LT = 0 RB000 CAN BU Figure. NCV E Application diagram
5 FUNCTIONAL DECRIPTION NCV has three versions which differ from each other only by function of pin. (ee also Table ) NCV : Pin is V IO pin, which is supply pin for transceiver digital inputs/output (supplying pins,,, EN). The V IO pin should be connected to microcontroller supply pin. By using V IO supply pin shared with microcontroller the I/O levels between microcontroller and transceiver are properly adjusted. This allows in applications with microcontroller supply down to V to easy communicate with the transceiver. (ee Figure ) NCV 0: Pin is not connected. This version is full replacement of the previous generation CAN transceiver AMI00. NCV E: Pin is digital enable pin which allows transceiver to be switched off with very low supply current. OPERATING MODE The NCV modes of operation are provided as illustrated in Table. These modes are selectable through pin and also EN in case of NCV E. Table. OPERATING MODE Mode Pin Pin EN (Note ) Pin,L Pins Normal 0 0 Dominant 0 0 Recessive ilent X Recessive X Dominant (Note ) 0 Off (Note ) X 0 X floating floating. Only applicable to NCV E. X = don t care. CAN bus driven to dominant by another transceiver on the bus Normal Mode In the normal mode, the transceiver is able to communicate via the bus lines. The signals are transmitted and received to the CAN controller via the pins and. The slopes on the bus lines outputs are optimized to give low EME. ilent Mode In the silent mode, the transmitter is disabled. The bus pins are in recessive state independent of input. Transceiver listens to the bus and provides data to controller, but controller is prevented from sending any data to the bus. Off Mode In Off mode, complete transceiver is disabled and consumes very low current. The CAN pins are floating not loading the CAN bus. Over temperature Detection A thermal protection circuit protects the IC from damage by switching off the transmitter if the junction temperature exceeds a value of approximately 0 C. Because the transmitter dissipates most of the power, the power dissipation and temperature of the IC is reduced. All other IC functions continue to operate. The transmitter off state resets when the temperature decreases below the shutdown threshold and pin goes high. The thermal protection circuit is particularly needed in case of the bus line short circuits. Dominant Time out Function A dominant time out timer circuit prevents the bus lines being driven to a permanent dominant state (blocking all network communication) if pin is forced permanently low by a hardware and/or software application failure. The timer is triggered by a negative edge on pin. If the duration of the low level on pin exceeds the internal timer value t dom, the transmitter is disabled, driving the bus into a recessive state. The timer is reset by a positive edge on pin. This dominant time out time (t dom() ) defines the minimum possible bit rate to kbps. Fail afe Features A current limiting circuit protects the transmitter output stage from damage caused by accidental short circuit to either positive or negative supply voltage, although power dissipation increases during this fault condition. The pins and are protected from automotive electrical transients (according to IO ; Figure ). Internally, pin is pulled high, pin EN and low should the input become disconnected. Pins,, EN and will be floating, preventing reverse supply should the supply be removed.
6 Definitions: All voltages are referenced to (pin ). Positive currents flow into the IC. inking current means the current is flowing into the pin; sourcing current means the current is flowing out of the pin. Table. ABOLUTE MAXIMUM RATING ymbol Parameter Conditions Min Max Unit V sup upply voltage 0. + V V DC voltage at pin 0 < <. V; no time limit 0 +0 V V DC voltage at pin 0 < <. V; no time limit 0 +0 V V IOs DC voltage at pin,,, EN, V IO Notes and 0. V V esd V schaff Electrostatic discharge voltage at all pins according to EIA JED Electrostatic discharge voltage at,, pins according to EIA JED Electrostatic discharge voltage at, pins According to IEC 000 tandardized charged device model ED pulses according to ED TM Transient voltage at, pins, ee Figure Note kv Note kv Note kv 0 0 V Note 0 00 V Latch up tatic latch up at all pins Note 9 0 ma T stg torage temperature +0 C T J Maximum junction temperature 0 +0 C tresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.. EN pin Only available on NCV E version. V IO pin Only available on NCV version. tandardized human body model electrostatic discharge (ED) pulses in accordance to EIA JED. Equivalent to discharging a 00 pf capacitor through a. k resistor.. ystem human body model electrostatic discharge (ED) pulses. Equivalent to discharging a 0 pf capacitor through a 0 resistor referenced to. Verified by external test house. Pulses, a,a and b according to IO part. Results were verified by external test house. 9. tatic latch up immunity: tatic latch up protection level when tested according to EIA/JED. Table. THERMAL CHARACTERITIC ymbol Parameter Conditions Value Unit R JA_ Thermal Resistance Junction to Air, 0P PCB (Note 0) Free air K/W R JA_ Thermal Resistance Junction to Air, P PCB (Note ) Free air K/W 0. Test board according to EIA/JEDEC tandard JED, signal layer with 0% trace coverage.. Test board according to EIA/JEDEC tandard JED, signal layers with 0% trace coverage.
7 ELECTRICAL CHARACTERITIC =. V to. V; V IO =. V to. V; T J = 0 C to +0 C; R LT = 0 unless specified otherwise. On chip versions without V IO pin reference voltage for all digital inputs and outputs is instead of V IO. Table. CHARACTERITIC ymbol Parameter Conditions Min Typ Max Unit UPPLY (Pin ) I CC upply current in normal mode Dominant; V = 0 V Recessive; V = V IO. 0.. ma I CC upply current in silent mode... ma I CCOFF upply current in OFF mode on NCV E version only A I CCOFF upply current in OFF mode NCV E version only T J 00 C, Note 0 A V UVDVCC Undervoltage detection voltage on pin.. V UPPLY (Pin V IO ) on NCV Version Only V iorange upply voltage range on pin V IO.. V I IO upply current on pin V IO normal mode Dominant; V = 0 V 00 Recessive; V = V IO A I IO upply current on pin V IO silent mode Bus is recessive; V = V IO A V UVDVIO Undervoltage detection voltage on V IO pin... V TRANMITTER DATA INPUT (Pin ) V IH High level input voltage, on NCV version only Output recessive 0. x V IO + V IO 0. V V IH High level input voltage, on NCV and NCV E versions only Output recessive V V IL Low level input voltage Output dominant x V IO V R pin pull up 0 0 k C i Input capacitance Note 0 pf TRANMITTER MODE ELECT (Pin and EN) V IH High level input voltage, on NCV version only ilent mode 0. x V IO + V IO 0. V V IH High level input voltage on NCV and NCV E versions only ilent or enable mode V V IL Low level input voltage Normal mode x V IO V R,EN and EN pin pull down Note 0... M C i Input capacitance Note 0 pf RECEIVER DATA OUTPUT (Pin ) I OH High level output current Normal mode V = V IO 0. V ma I OL Low level output current V = 0. V. ma BU LINE (Pins and ). EN pin Only available on NCV E version. Not tested in production. Guaranteed by design and prototype evaluation.
8 Table. CHARACTERITIC ymbol BU LINE (Pins and ) V o(reces) (norm) I o(reces) () Parameter Recessive bus voltage on pins and Conditions V = V IO ; no load normal mode Recessive output current at pin 0 V < V < + V; 0 V < <. V I o(reces) () Recessive output current at pin 0 V < V < + V; 0 V < <. V Min Typ Max Unit.0..0 V. +. ma. +. ma I LI() Input leakage current to pin 0 < R( to ) < M A I LI() Input leakage current to pin V = V = V A V o(dom) () Dominant output voltage at pin V = 0 V; =. V to. V V o(dom) () Dominant output voltage at pin V = 0 V; =. V to. V V o(dif) (bus_dom) V o(dif) (bus_rec) V o(sym) (bus_dom) Differential bus output voltage (V V ) Differential bus output voltage (V V ) Bus output voltage symmetry V + V V = 0 V; dominant; =. V to. V < R LT < V = V IO ; recessive; no load V = 0 V =. V to. V.0.. V 0... V...0 V mv 0.9. I o(sc) () hort circuit output current at pin V = 0 V; V = 0 V ma I o(sc) () hort circuit output current at pin V = V; V = 0 V ma V i(dif) (th) Differential receiver threshold voltage V < V < + V; V < V < + V; V ihcm(dif) (th) R i(cm) () R i(cm) () R i(cm) (m) Differential receiver threshold voltage for high common mode Common mode input resistance at pin Common mode input resistance at pin Matching between pin and pin common mode input resistance 0 V < V < + V; 0 V < V < + V; V V k k V = V % R i(dif) Differential input resistance 0 k C i() Input capacitance at pin V = V IO ; not tested. 0 pf C i() Input capacitance at pin V = V IO ; not tested. 0 pf C i(dif) Differential input capacitance V = V IO ; not tested. 0 pf THERMAL HUTDOWN T J(sd) hutdown junction temperature Junction temperature rising C TIMING CHARACTERITIC (see Figures and ) t d( BUon) Delay to bus active C i = 00 pf between to t d( BUoff) Delay to bus inactive C i = 00 pf between to ns ns t d(buon ) Delay bus active to C rxd = pf 0 ns t d(buoff ) Delay bus inactive to C rxd = pf 0 ns t pd Propagation delay to (both edges) C i = 00 pf between to 90 0 ns t dom() dominant time for time out V = 0 V.. ms. EN pin Only available on NCV E version. Not tested in production. Guaranteed by design and prototype evaluation.
9 MEAUREMENT ETUP AND DEFINITION + V 00 nf V IO /EN nf NCV Transient Generator pf nf RB000 Figure. Test Circuit for Automotive Transients + V 00 nf uf V IO /EN NCV RL RB pf pf Figure. Test Circuit for Timing Characteristics 9
10 recessive dominant recessive 0% 0% 0.9 V V i(dif) = V V 0. V 0. x () 0. x () t d(buon) t d(buon ) t d(buoff) t d(buoff ) t pd () On NCV is replaced by V IO t pd RB009 Figure. Transceiver Timing Diagram DEVICE ORDERING INFORMATION Part Number NCVDRG NCVD0RG NCVDERG Description High peed CAN Transceiver with V IO pin High peed CAN Transceiver with pin NC High peed CAN Transceiver with EN pin Temperature Range Package hipping 0 C to + C OIC 0 GREEN (Matte n, JEDEC M 0) (Pb Free) 000 / Tape & Reel For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging pecifications Brochure, BRD0/D. 0
11 PACKAGE DIMENION OIC CAE AZ IUE O
12 ON emiconductor and are registered trademarks of emiconductor Components Industries, LLC (CILLC). CILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of CILLC s product/patent coverage may be accessed at Marking.pdf. CILLC reserves the right to make changes without further notice to any products herein. CILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does CILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Typical parameters which may be provided in CILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including Typicals must be validated for each customer application by customer s technical experts. CILLC does not convey any license under its patent rights nor the rights of others. CILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the CILLC product could create a situation where personal injury or death may occur. hould Buyer purchase or use CILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold CILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that CILLC was negligent regarding the design or manufacture of the part. CILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON emiconductor P.O. Box, Denver, Colorado 0 UA Phone: 0 or 00 0 Toll Free UA/Canada Fax: 0 or 00 Toll Free UA/Canada N. American Technical upport: 00 9 Toll Free UA/Canada Europe, Middle East and Africa Technical upport: Phone: Japan Customer Focus Center Phone: 00 ON emiconductor Website: Order Literature: For additional information, please contact your local ales Representative NCV/D
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