Basic Arithmetic (adding and subtracting)

Transcription

1 Basic Arithmetic (adding and subtracting) Digital logic to show add/subtract Boolean algebra abstraction of physical, analog circuit behavior 1 0 CPU components ALU logic circuits logic gates transistors

2 Digital Logic and (* or ^) A B A * B A B out or ( ) A B A B A B out

3 Digital Logic not (~,, ) A ~A A out xor ( ) A B A B A B out

4 Digital Logic nand A B A*B A B out nor A B A nor B A B out

5 Digital Logic Given the truth table: A B F A B A B A B A B F = A B + A B + A B + A B Sum of products from the truth table. Often we can simplify.

6 Unsigned Binary Arithmetic Binary Addition A B c out sum A B Half Adder sum c out Input Output A B S C

7 Unsigned Binary Arithmetic The half adder is an example of a simple digital circuit built from two logic gates. half adder logic - two one-bit inputs (a, b) and two one-bit outputs (carry_out, sum) a b carry_out sum carry_out = a and b sum = a xor b

8 Unsigned Binary Arithmetic The problem with a half-adder is that it doesn't handle carries. Consider adding the following two numbers: When we add the two numbers, we get (1) Look at the middle and leftmost columns. You add 3 bits. Half adders can only add two bits.

9 Unsigned Binary Arithmetic For adding multi-bit fields/words, e.g., 4 bits a_3 a_2 a_1 a_0 + b_3 b_2 b_1 b_ sum_3 sum_2 sum_1 sum_0 we also need to add a carry_in with a_i and b_i, where i>0

10 Unsigned Binary Arithmetic A full adder for a_i + b_i + carry_in is given in the figure below. three one-bit inputs (a, b, carry_in) and two one-bit outputs (carry_out, sum) cascade two half adders (sum output bit of first attached to one input line of the other) and then or together the carry_outs C in A B sum C out Input Output C A B S C

11 Full Adder An n-bit adder built by connecting n full adders carries propagate from right to left (i.e., connect the carry_out of an adder to the carry_in of the adder in the next leftmost bit position the initial, that is, rightmost, carry_in is zero) overflow occurs when a number is too large to represent for unsigned arithmetic, overflow occurs when a carry out occurs from the most significant (i.e., leftmost) bit position

12 Full Adder (there are faster forms of addition hardware where the carries do not have to propagate from one side to the other, e.g., carry-lookahead adder)

13 fundamental idea #1 finite width arithmetic - modulus r n, where r is radix, n is number of digits wide - wraps around from biggest number to zero, ignoring overflow e.g., 4-bit arithmetic => modulus is 2 4 = 16 0, 1, 2,..., 15 then wrap around back to 0 thus an addition of r n to an n-digit finite width value has no effect on the n-digit value

14 fundamental idea #2 subtraction is equivalent to adding the negative of number e.g., a - b = a + (-b) observation a - b == a - b + r n == a + (r n - b) \ / \ / #1 #2 \ / this term is our representation for (-b) it turns out that we can more easily perform r n - b than a - b

15 digit complement for n digits == (r n - 1) - number in binary, this is called one's complement and equals a value of n ones minus the bits of the number for binary, one's complement (2 n number) is equivalent to inverting each bit in decimal, this is called nine's complement and equals a value of n nines minus the digits of the number in hexadecimal, this is n f's (fifteens) minus the digits of the number

16 radix complement for n digits == (r n - 1) - number + 1 two's complement in binary ten's complement in decimal for binary, two's complement (2 n number + 1) is equivalent to inverting each bit and adding one

17 We can easily make a full adder do subtraction by adding an inverter in front of each b sub i and setting carry into the rightmost adder to one

18 range for n-bit field: unsigned is [ 0, 2 n - 1 ] 2's compl. signed is [ -2 n-1, 2 n-1-1 ] signed overflow occurs whenever the sign bits of the two operands agree, but the sign bit of the result differs (i.e., add two positives and result appears negative, or add two negatives and result appears nonnegative) range diagrams for three bits unsigned signed (2's compl) b2 b1 b0 sign b1 b0

19 modulo arithmetic (keep adding +1 and wrap around) (unsigned) (or 2's compl) ^^--carry occurs on wrap around

20 3-bit examples bits unsigned signed 111 = 7 = ( 1) +001 = +1 = +(+1) (0) (carry) OVF ^^^-- this is what the ALU computes for either unsigned or signed. but, while it is an unsigned overflow, it is CORRECT for signed

21 3-bit examples Example 2 bits unsigned signed = (+3) +001 = +1 = +(+1) ( 4) OVF ^^^-- this is what the ALU computes for either unsigned or signed, but, while it is correct for unsigned, it is SIGNED OVERFLOW!

22 16-bit signed (2's complement) examples in 16-bit arithmetic, we can represent values as four hex digits; if the leading hex digit is between 0 and 7 (thus it has a leading bit of 0), it is a nonnegative value; if the leading hex digit is between 8 and f (thus it has a leading bit of 1), it is a negative value signed overflow occurs if a. (+) added with (+) gives a (-), or b. (-) added with (-) gives a (+)

23 hexadecimal hexadecimal decimal 0x7654 = 0x7654 = (+30292) +0xffed = +(-0x13) = +( 19) 0x7641 0x7641 (+30273) (carry) carry occurs but there is no signed overflow (thus carry is ignored) (+) added with (-) cancels out, so signed overflow is not possible

24 hex decimal 0x7654 = (+30292) +0x1abc = +( ) x9110 (-28400) should be 37136, but is > max positive no carry occurs but there is signed overflow (+) added with (+) giving (-) => SIGNED OVERFLOW!

25 hex decimal 0x7654 = (+30292) +0x1abc = +( ) 0x9110 (-28400) should be 37136, but is > max positive no carry occurs but there is signed overflow (+) added with (+) giving (-) => SIGNED OVERFLOW!

26 hexadecimal 0x7654 change subtraction to addition by ffff -0xff8d taking two's complement of 0xff8d -ff8d hexadecimal hexadecimal decimal 0x7654 = 0x7654 = (+30292) -0xff8d = +0x0073 = +( +115) 0x76c7 = (+30407) no carry occurs and no signed overflow (+) added with (+) giving (+) => no signed overflow