KLEF University,Guntur. B.Tech-II Year, First Semester : B.Tech ELECTRONICS & COMPUTER ENGINEERING

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1 KLEF University,Guntur B.Tech-II Year, First Semester Date: Program Name Course Title : B.Tech ELECTRONICS & COMPUTER ENGINEERING : SWITCHING THEORY& LOGIC DESIGN Course Coordinator : Dr.S.Balaji Course Detail : Theory Lecture Hours : 45 I ELECTRONICS & COMPUTER ENGINEERING PROGRAMME OBJECTIVE: The main objective of an engineering course in Electronics & Computers is to prove the technical viability of new technology, together with, as appropriate, its possible economic advantages. Provides a quality education with emphasis on strong foundation, fostering creativity and use of modern ICT tools. Demonstration activities are expected to speed up the innovation of new technologies in the field of computers and electronics. The above programme objective can be broadly defined on five counts as below. 1. Preparation: To prepare students for successful careers both in software and hardware industry that meet the needs of Indian and Multinational companies and to prepare students for postgraduate programs in inter-disciplinary streams related to Electronics and Computers. 2. Core Competence: To provide students with solid foundation in mathematical, scientific and engineering fundamentals which are necessary to formulate, solve and analyze engineering problems and also to prepare them for graduate studies. 3. Breadth: To train the students with good engineering skills so as to work as part of teams in Multi disciplinary projects. 4. Professionalism: The instruction should emphasize the primary purpose of the profession as being the pursuit of a learned art in the sprit of public service. The sense of professionalism should convey the responsibility to evaluate the impact of the opportunity and obligation of the practitioner, to be in concert with peers, guides, and direct the profession. 1

2 5. Learning Environment: To develop the ability among students to synthesize data and technical concepts for application to product design. To promote student awareness of the life long learning and to introduce them to professional ethics and codes of professional practice. II Program Outcomes: a. Graduates will demonstrate basic knowledge in mathematics, science and engineering. b. Graduates will demonstrate an ability to identify, formulate and solve Electronics and Computer Engineering problems. c. Graduates will demonstrate the ability to design Electronic circuits and develop programs under different operating systems. d. Graduates will demonstrate the ability to design the Embedded System and application software that meets the desired specifications and requirements. e. Graduates will demonstrate the ability to visualize and work in both electronic and software industry, involving Multidisciplinary tasks. f. Graduate will demonstrate skills to use modern engineering tools, software and equipment to analyze problems. g. Graduates will demonstrate knowledge of professional and ethical responsibilities. h. Graduate will be able to communicate effectively in both verbal and written form. i. Graduate will show the understanding of impact of engineering solutions on the society and also will be aware of contemporary issues. j. Graduate will develop confidence for self education and ability for life long learning. k. Graduate who can participate and succeed in competitive examinations like GATE, PGECET, IES, GRE etc. 2

3 Mapping of Program Objectives (I-V) with Program Outcome (a-k) Program Educational Objectives Program Outcomes a B C d e f g h i j k I X X X X X II X X X X X III X X X X IV X X X X X V X X III Course Description: Boolean Algebra, Postulates and theorems, Minimization of Switching functions, Karnaugh map method, Tabulation method, Logic gates, Binary Adders, Carry look ahead Adder, Decoders, Encoders, Multiplexer, De-multiplexer, Sequential circuit models, Flip Flops, Mealy Moore Models, Registers, Counters, RAM, PAL,PLA. IV COURSE OBJECTIVES After thorough learning of Switching Theory and Logic Design the student will be able to: 1. Understand the various methods of designing and construction of systems such as digital computers, data communication, digital recording and many other applications that require digital hardware. 2. Assess the various designing procedures for the given problems. 3. the various digital circuits. 4. Comprehend the applications of various digital circuits in designing higher model like computers, Microprocessors, ATMs and inculcate them into carrying out mini projects and further research. 3

4 V COURSE OUTCOMES At the end of the course the student will be able to 1. Design various Synchronous and Asynchronous counters. 2. Basic tools for the design of digital circuits and fundamental concepts used in the design of digital systems 3. Realize logic networks, digital computers with special attraction given to 3 basic structures of programmable logic devices. PROM, PLA, PAL devices. 4. Design combinational logic circuits, sequential logic circuits. Mechanism of ATP generation by alternate means Mapping of Course Objectives with Programme Outcomes Program Outcomes a b c d e f g h i j k 1 Course Objectives

5 VI SYLLABUS: UNIT-I BOOLEAN ALGEBERA: Axiomatic definition of Boolean algebra. Binary operation. Postulates and theorems, Switching functions, Canonical forms and standard forms, Simplification of switching functions using theorems. Minimization of switching functions: Karnaugh map method, Quine McCluskey tabular method, Prime implicants and essential prime implicants. UNIT-II COMBINATIONAL LOGIC DESIGN: Single output and multiple-output combinational logic circuit design, AND-OR, OR-AND and NAND/NOR relations, exclusive-or and Equivalence functions. Binary Adders, Carry look ahead Adder, magnitude comparator, sub tractors. LOGIC DESIGN WITH MSI COMPONENTS: Decoders, Encoders, Priority Encoders, Multiplexer, De-multiplexer, Parity generator checker, Code converters UNIT-III SEQUENTIAL LOGIC DESIGN: Classification of sequential circuits, sequential circuit model, latches, flip-flops, and excitation table, characteristic equation, state diagram, Mealy & Moore Models, sequence detectors, Analysis of clocked Sequential Circuits. UNIT-IV REGISTERS AND COUNTERS: Registers, Shift Register, Ripple Counters, Synchronous Counters. UNIT V Memory and Programmable logic: Random Access Memory Read only memory, Programmable logic Array, Programmable Array Logic. 5

6 VII UNIT WISE RATIONALIZATION: UNIT-I: Boolean algebra (or Boolean logic) is a logical calculus of truth values It resembles the algebra of real numbers, but with the numeric operations of multiplication xy, addition x + y, and negation x replaced by the respective logical operations of conjunction x y, disjunction x y, and complement x. This unit includes the fundamentals of switching algebras and basic combinational circuit design procedures and methods for minimizing switching functions. UNIT-II: Boolean algebra can be represented schematically by means of gates. Designing of various systems by using combinational circuits The unit introduces various commonly used number and coding systems and their conversions. The mapping from logic circuit to electronic circuit known as voltage symbolism is introduced. UNIT-III: Sequential logic is a type of logic circuit whose output depends not only on the present input but also on the history of the input. This is in contrast to combinational logic, whose output is a function of, and only of, the present input. In this unit the student will be able to understand about the a general mathematical model of sequential circuits, it also introduces general analysis and synthesis procedures based on sequential machine theory for synchronous and asynchronous Sequential circuits. UNIT-IV: Register is a group of flip-flops. Its basic function is to hold information within a digital system. Counter is essentially a register that goes through a predetermined sequence of states. It begins the presentation on sequential logic networks. The operational behavior of the three categories of flip flops and applications of flip flops in particular, registers and counters. The chapter concludes with a general design procedure for synchronous counters. UNIT-V: A memory unit is a collection of cells capable of storing a large quantity of binary information. A programmable logic device or PLD is an electronic component used to build reconfigurable digital circuits. Before the PLD can be used in a circuit it must be programmed, that is, reconfigured. This unit concerned with several MSI and LSI components. In this chapter student will design arrays like PLD, PLA, PAL etc. and basic design of memories like RAM and ROM. 6

7 VII.SESSION PLAN S.No Unit Session Content Learning objective 1 I 1. Boolean algebra Logic operations for two variables Methodology Faculty Student Learning Approach approach outcome Chalk and talk Explanation Listens Understand 2 I 2. Boolean algebra Logic operations for two variables 3 I 3. Postulates and theorems Theorems and properties 4 I 4. Postulates and theorems Theorems and properties participate Remember Understand 5 I 5. Switching functions Boolean Functions Chalk and talk Explanation Listen 6 I 6. Canonical forms and standard forms MinTerms and Max Terms participate 7 I 7. Canonical forms and standard forms Sum Of Max terms and Product of Min terms Chalk and talk Explanation Observe 8 I 8. Simplification of switching functions using theorems Theorems and Properties participate Explore the mechanism 9 I 9. Simplification of switching functions using theorems Theorems and Properties Chalk and talk Demonstration Observe and participate Application 10 I 10. Karnaugh map method Two, Four & Five variable map Chalk and talk Demonstration Observe and comprehend 7

8 11 I 11. Karnaugh map method SOP & POS Chalk and talk Explanation Listens and Participate 12 I 12. Karnaugh map method Prime Implicants & don t care conditions Application Remember and recall 13 I 13. Quine McCluskey tabular method Prime Implicants 14 I 14. Quine McCluskey tabular method 15 I 15. Prime implicants and essential prime implicants. 16 II 16. combinational logic circuit design 17 II 17. combinational logic circuit design Algorithms for generating Prime implicants Irredundant Expressions & Conjunctive Normal Formulas Basic Components used in design Basic Components used in design Chalk and talk Demonstration Listen Chalk and talk Explanation Listen Chalk and talk Explanation Listen Chalk and talk Explanation Observes 18 II 18. AND-OR, OR-AND and NAND/NOR relations 19 II 19. Exclusive-OR and Equivalence functions Two Level Circuits Two Level Circuits Evaluate 20 II 20. Binary Adders Design of Combinational 8

9 Circuits 21 II 21. Carry look ahead Adder Design of Combinational Circuits 22 II 22. Magnitude comparator, sub tractors Design of Combinational Circuits Chalk and talk Explanation Observe 23 II 23. Encoders, Priority Encoders Conversion of Information Chalk and talk facilitates Observe and 24 II 24. Decoders Conversion of Information Chalk and talk Explanation Observes 25 II 25. Multiplexer, Demultiplexer Signal Compression 26 II 26. Parity generator checker, Error Correcting and Verification 27 II 27. Code converters Conversion of codes 28 III 28. Classification of sequential circuits Design of sequential circuits Oral Explanation Listen 29 III 29. sequential circuits model Models of Synchronous sequential circuit Chalk and talk Explanation Listen and 9

10 30 III 30. Latches Two state Circuit Chalk and talk Explanation Listen 31 III 31. Flip-flops Feedback Property Chalk and talk Explanation Comprehend 32 III 32. Flip-flops Inputs to change states 33 III 33. Flip-flops Inputs to change states Chalk and talk Demonstration Listen Remember 34 III 34. Mealy & Moore Models State Models Chalk and talk Explanation Comprehend and 35 III 35. Mealy & Moore Models State Models Chalk and talk Demonstration Comprehend and 36 III 36. Sequence detectors, Analysis of clocked Sequential Circuits. State Diagram design example Chalk and talk Explanation Listen Application 37 IV 37. Registers Group of Flip flops Remember and 38 IV 38. Shift Register Shift Right & Shift Left 39 IV 39. Ripple Counters Asynchronous Counters Remember and Apply and evaluate 10

11 40 IV 40. Synchronous Counters. Modulus Design Chalk and talk Demonstration Observe Understand s and comprehends 41 IV 41. Synchronous Counters Modulus Design Synthesis 42 V 42. RAM&ROM Design of Memories Chalk and talk Explanation Listen understand 43 V 43 PLA Logic Array Design 44 V 44 PAL Array Logic Design 45 V 45 PAL Array Logic Design Understand Understand s and comprehends Understand s and comprehends 11

12 IX. Self Study Material: Unit Topic Source I Binary Operations Fundamentals of logic Design, Charles H.Roth,Jr. III Introduction to Combinational & Sequential circuits Digital Circuits& Logic Design, Samuel C.Lee III Conversion of Flip Flops Digital Logic Design, A.Anand Kumar IV Ring Counter & Johnson Counter Digital Design,3 rd Edition, M.Morris Mano V Complex Programmable Logic Devices Fundamentals of logic Design, Charles H.Roth,Jr. Dr.S.Balaji (Course Instructor) 12

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