MC14049UB. Hex Buffers

Transcription

1 MC4049UB Hex Buffers The MC4049UB hex inverer/buffer is coruced wih MOS Pchannel and Nchannel enhancemen mode devices in a single monolihic srucure. This complemenary MOS device finds primary use where low power dissipaion and/or high noise immuniy is desired. This device provides logiclevel conversion using only one supply volage,. The inpusignal high level (V IH ) can exceed he supply volage for logiclevel conversio. Two TTL/DTL Loads can be driven when he device is used as CMOSoTTL/DTL converers ( =.0 V, V OL 0.4 V, I OL 3.2 ma). Noe ha pi 3 and 6 are no conneced inernally on his device; coequenly connecio o hese erminals will no affec circui operaion. Feaures High Source and Sink Curre HighoLow Level Converer Supply Volage Range = 3.0 V o V Mees JEDEC UB Specificaio V IN can exceed Improved ESD Proecion on All Inpus These Devices are PbFree and are RoHS Complian NLV Prefix for Auomoive and Oher Applicaio Requiring Unique Sie and Conrol Change Requireme; AECQ00 Qualified and PPAP Capable MAXIMUM RATINGS (Volages Referenced o ) Symbol Parameer Value Uni DC Supply Volage Range 0. o +.0 V V in Inpu Volage Range 0. o +.0 V (DC or Traien) V ou Oupu Volage Range 0. o V (DC or Traien) +0. I in Inpu Curren (DC or Traien) per Pin ±0 ma I ou Oupu Curren (DC or Traien) per Pin P D Power Dissipaion, per Package (Noe ) Plasic SOIC +4 ma T A Ambien Temperaure Range o +2 C T sg Sorage Temperaure Range 6 o +0 C T L Lead Temperaure (Second Soldering) 260 C Sresses exceeding hose lised in he Maximum Raings able may damage he device. If any of hese limis are exceeded, device funcionaliy should no be assumed, damage may occur and reliabiliy may be affeced.. Temperaure Deraing: All Packages: See Figure 4. This device conai circuiry o proec he inpus agai damage due o high saic volages or elecric fields referenced o he pin, only. Exra precauio mus be aken o avoid applicaio of any volage higher han he maximum raed volages o his highimpedance circui. For proper operaion, he ranges V in V and V ou are recommended. Unused inpus mus always be ied o an appropriae logic volage level (e.g., eiher or ). Unused oupus mus be lef open. mw SOIC6 D SUFFIX CASE 7B TSSOP6 DT SUFFIX CASE 94F SOEIAJ6 F SUFFIX CASE 966 MARKING DIAGRAMS 4049UG AWLYWW MC4049UB ALYWG ORDERING INFORMATION See deailed ordering and shipping informaion in he package dimeio secion on page 3 of his daa shee UB ALYW A = Assembly Locaion WL, L = Wafer Lo YY, Y = Year WW, W = Work Week G or = PbFree Package (Noe: Microdo may be in eiher locaion) Semiconducor Compone Indusries, LLC, 204 May, 204 Rev. 9 Publicaion Order Number: MC4049UB/D

2 MC4049UB OUT A IN A OUT B IN B OUT C IN C Figure. Pin Assignmen 9 NC OUT F IN F NC OUT E IN E OUT D IN D NC = NO CONNECTION Figure 2. Logic Diagram MC4049UB NC = PIN 3, 6 = PIN = PIN MC4049UB Figure 3. Circui Schemaic (/6 of circui shown) ELECTRICAL CHARACTERISTICS (Volages Referenced o ) C ÎÎ 2 C Î 2 C V Î Characerisic Symbol DD Uni Î Min Max Min Typ Max Min ÎÎ (Noe 2) Max Î Oupu Volage 0 Level V OL Î ÎÎ 0.0 V Î in = or Î ÎÎ 0.0 Î Level OH V Î in = 0 or V Î Inpu Volage 0 Level V IL Î Î (V O = 4. ) (V Î O = 9.0 ) (V O Î ÎÎ = 3. ) Level V IH Î Î (V O = 0. ) Î ÎÎ (V Î O =.0 ) (V O Î =. ) Î Oupu Drive Curren I OH Î madc Î (V OH = 2. ) Source Î 2..0 ÎÎ (V Î OH = 9. ) (V OH = 3. ) Î ÎÎ Î (V OL = 0.4 ) Sink Î (V OL = 0. ) I OL Î.0Î ÎÎ madc (V OL =. ) ÎÎ Inpu Curren I in Î ± 0. ±0.000 ± 0. Î 0 Î ±.0 Adc Î Inpu Capaciance (V in = 0) Cin Î 0 20 ÎÎ pf Î Quiescen Curren (Per Package) I DD Î Î ÎÎ Adc Toal Supply Curren (Noe 3 and 4) I Î (Dynamic plus Quiescen, Per Package) T.0 I 0 T = (. A/kHz) f + I DD Adc I T = (3. A/kHz) f + I DD Î (C L = 0 pf on all oupus, all buffers I T = (.3 A/kHz) f + I DD swiching) 2. Daa labelled Typ is no o be used for design purposes bu is inended as an indicaion of he IC s poenial performance. 3. The formulas given are for he ypical characerisics only a 2 C. 4. To calculae oal supply curren a loads oher han 0 pf: I T (C L ) = I T (0 pf) + (C L 0) Vfk where: I T is in A (per package), C L in pf, V = ( ) in vols, f in khz is inpu frequency, and k =

3 MC4049UB SWITCHING CHARACTERISTICS (Noe ) (C L = 0 pf, T A = 2 C) ÎÎ Characerisic Î Symbol Î Î Min TypÎ Max Uni (Noe 6) Oupu Rise Time ÎÎ TLH = (0. /pf) C L + 60 Î TLH Î.0 Î ÎÎ TLH = (0.3 /pf) C L + 3 Î Î 0 Î Î 00 TLH = (0.27 /pf) C L ÎÎ Oupu Fall Time THL Î ÎÎ ÎÎ THL = (0.3 /pf) C L + 2 Î Î.0 Î ÎÎ THL = (0.2 /pf) C L THL = (0. /pf) C L Î Î 40 Î ÎÎ Propagaion Delay Time Î PLH Î ÎÎ ÎÎ PLH = (0.3 /pf) C L + 6 Î Î.0 Î 0 Î 20 ÎÎ PLH = (0.20 /pf) C L PLH = (0. /pf) C L Î Î Î 30 Î 0 ÎÎ Propagaion Delay Time Î PHL Î ÎÎ ÎÎ PHL = (0.3 /pf) C L PHL = (0.2 /PF) C L + 9 Î Î 0 Î Î 30 ÎÎ PHL = (0. /pf) C L + 4. Î Î Î 0 Î 20. The formulas given are for he ypical characerisics only a 2 C. 6. Daa labelled Typ is no o be used for design purposes bu is inended as an indicaion of he IC s poenial performance. ORDERING INFORMATION MC4049UBDG NLV4049UBDG* MC4049UBDR2G NLV4049UBDR2G* MC4049UBDTR2G MC4049UBFELG Device Package Shipping SOIC6 (PbFree) SOIC6 (PbFree) TSSOP6 (PbFree) SOEIAJ6 (PbFree) 4 Unis / Rail 200 / Tape & Reel 200 / Tape & Reel 2000 / Tape & Reel For informaion on ape and reel specificaio, including par orienaion and ape sizes, please refer o our Tape and Reel Packaging Specificaio Brochure, BRD0/D. *NLV Prefix for Auomoive and Oher Applicaio Requiring Unique Sie and Conrol Change Requireme; AECQ00 Qualified and PPAP Capable. V ou, OUTPUT VOLTAGE () = 0 = 0 = C +2 C 0 V in, INPUT VOLTAGE () Figure 4. Typical Volage Trafer Characerisics versus Temperaure 3

4 MC4049UB I OH V OH V DS = V OH - I OL V OL = V OL 0 60 I OH, OUTPUT SOURCE CURRNT (madc) V GS = 0 V GS = V GS =.0 MAXIMUM CURRENT LEVEL I OL, OUTPUT SINK CURRENT (madc) V GS = V GS = 0 MAXIMUM CURRENT LEVEL V GS = V DS, DRAIN-TO-SOURCE VOLTAGE () V DS, DRAIN-TO-SOURCE VOLTAGE () Figure. Typical Oupu Source Characerisics Figure 6. Typical Oupu Sink Characerisics P D, MAXIMUM POWER DISSIPATION (mw) PER PACKAGE (P) PDIP (D) SOIC T A, AMBIENT TEMPERATURE ( C) 0 7 mw (P) 20 mw (D) 7 PULSE GENERATOR V in INPUT PHL OUTPUT 90% 0% 0% 90% 0% 0% THL C L PLH TLH V ou V OH V OL Figure 7. Ambien Temperaure Power Deraing Figure. Swiching Time Tes Circui and Waveforms 4

5 MC4049UB PACKAGE DIMENSIONS SOIC6 D SUFFIX PLASTIC SOIC PACKAGE CASE 7B0 ISSUE K A 6 9 B P PL 0.2 (0.00) M B S NOTES:. DIMENSIONING AND TOLERANCING PER ANSI Y4.M, CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0. (0.006) PER SIDE.. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.27 (0.00) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. T SEATING PLANE G D 6 PL K C M R X 4 J F MILLIMETERS INCHES DIM MIN MAX MIN MAX A B C D F G.27 BSC 0.00 BSC J K M P R (0.00) M T B S A S SOLDERING FOOTPRINT* X X.2 6 6X PITCH 9 DIMENSIONS: MILLIMETERS *For addiional informaion on our PbFree sraegy and soldering deails, please download he ON Semiconducor Soldering and Mouning Techniques Reference Manual, SOLDERRM/D.

6 MC4049UB PACKAGE DIMENSIONS 0. (0.006) T 0. (0.006) T 0.0 (0.004) T SEATING PLANE L U PIN IDENT. U D S S 2X L/2 C 6X K REF 0.0 (0.004) M T U S V S 6 9 A V G B U H TSSOP6 DT SUFFIX CASE 94F ISSUE B J N N J DETAIL E DETAIL E ÇÇÇ ÉÉÉ SECTION NN SOLDERING FOOTPRINT* 7.06 F K K 0.2 (0.00) M W NOTES:. DIMENSIONING AND TOLERANCING PER ANSI Y4.M, CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A DOES NOT INCLUDE MOLD FLASH. PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0. (0.006) PER SIDE. 4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.2 (0.00) PER SIDE.. DIMENSION K DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.0 (0.003) TOTAL IN EXCESS OF THE K DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 7. DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE W. MILLIMETERS INCHES DIM MIN MAX MIN MAX A B C D F G 0.6 BSC BSC H J J K K L 6.40 BSC 0.22 BSC M PITCH 6X X.26 DIMENSIONS: MILLIMETERS *For addiional informaion on our PbFree sraegy and soldering deails, please download he ON Semiconducor Soldering and Mouning Techniques Reference Manual, SOLDERRM/D. 6

7 MC4049UB PACKAGE DIMENSIONS SOEIAJ6 F SUFFIX CASE 966 ISSUE A e 6 9 Z b D A H E A 0.3 (0.00) M 0.0 (0.004) E VIEW P M L E Q L DETAIL P c NOTES:. DIMENSIONING AND TOLERANCING PER ANSI Y4.M, CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS AND ARE MEASURED AT THE PARTING LINE. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0. (0.006) PER SIDE. 4. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY.. THE LEAD WIDTH DIMENSION (b) DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.0 (0.003) TOTAL IN EXCESS OF THE LEAD WIDTH DIMENSION AT MAXIMUM MATERIAL CONDITION. DAMBAR CANNOT BE LOCATED ON THE LOWER RADIUS OR THE FOOT. MINIMUM SPACE BETWEEN PROTRUSIONS AND ADJACENT LEAD TO BE 0.46 ( 0.0). MILLIMETERS INCHES DIM MIN MAX MIN MAX A A b c D E e.27 BSC 0.00 BSC H E L L E M Q Z ON Semiconducor and are regisered rademarks of Semiconducor Compone Indusries, LLC (SCILLC). SCILLC ow he righs o a number of pae, rademarks, copyrighs, rade secres, and oher inellecual propery. A lising of SCILLC s produc/paen coverage may be accessed a SCILLC reserves he righ o make changes wihou furher noice o any producs herein. SCILLC makes no warrany, represenaion or guaranee regarding he suiabiliy of is producs for any paricular purpose, nor does SCILLC assume any liabiliy arising ou of he applicaion or use of any produc or circui, and specifically disclaims any and all liabiliy, including wihou limiaion special, coequenial or incidenal damages. Typical parameers which may be provided in SCILLC daa shees and/or specificaio can and do vary in differen applicaio and acual performance may vary over ime. All operaing parameers, including Typicals mus be validaed for each cusomer applicaion by cusomer s echnical expers. SCILLC does no convey any licee under is paen righs nor he righs of ohers. SCILLC producs are no designed, inended, or auhorized for use as compone in sysems inended for surgical implan ino he body, or oher applicaio inended o suppor or susain life, or for any oher applicaion in which he failure of he SCILLC produc could creae a siuaion where personal injury or deah may occur. Should Buyer purchase or use SCILLC producs for any such uninended or unauhorized applicaion, Buyer shall indemnify and hold SCILLC and is officers, employees, subsidiaries, affiliaes, and disribuors harmless agai all claims, coss, damages, and expees, and reasonable aorney fees arising ou of, direcly or indirecly, any claim of personal injury or deah associaed wih such uninended or unauhorized use, even if such claim alleges ha SCILLC was negligen regarding he design or manufacure of he par. SCILLC is an Equal Opporuniy/Affirmaive Acion Employer. This lieraure is subjec o all applicable copyrigh laws and is no for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Lieraure Disribuion Cener for ON Semiconducor P.O. Box 63, Denver, Colorado 027 USA Phone: or Toll Free USA/Canada Fax: or Toll Free USA/Canada orderli@oemi.com N. American Technical Suppor: Toll Free USA/Canada Europe, Middle Eas and Africa Technical Suppor: Phone: Japan Cusomer Focus Cener Phone: ON Semiconducor Websie: Order Lieraure: hp:// For addiional informaion, please conac your local Sales Represenaive MC4049UB/D