Chapter 4: Combinational Logic Solutions to Problems: [1, 5, 9, 12, 23, 30]

Transcription

1 Chapter 4: Combinational Logic Solutions to Problems: [, 5, 9, 2, 23, 3] Problem: 4- Consider the combinational circuit shown in Fig. P4-. (a) Derive the Boolean epressions for T through T 4. Evaluate the outputs of F and F 2 as a function of the four inputs. (b) List the truth table with 6 binar combinations of the four inputs variables. Then list the binar values for T through T 4 and outputs F and F 2 in the table. (c) Plot the output Boolean functions obtained in part (b) on maps and show that the simplified Boolean epressions are equivalent to the ones obtained in part (a). Solution: (a) The Boolean epressions for T through T 4. The outputs of F and F 2 as a function of the four inputs. T T 4 F T F B C T T A( D) A BD B C B D ( A A )( A BD ) B C B D A BD B C B D D T T A B T D A BD ( A B) D A BD ( A B ) D A AD A BD B C B D D A B 3 A T A B C A BD AD B D Page of

2 (b) The truth table with 6 binar combinations of the four inputs variables with the binar values for T through T 4 and outputs F and F 2 : A B C D T T 2 T 3 T 4 F F 2 (c) Plot of the output Boolean functions obtained in part (b) on maps Map for F : C The simplified epression from the CD map is: AB F A BC BD B D A B Map for F 2 : The simplified epression from the map is: F D A B 2 AB CD D C A B The simplified Boolean epressions are equivalent to the ones obtained in part (a). Problem: 4-5 D Page 2 of

3 Design a combinational circuit with three inputs,, and, and the three outputs, A, B, and C. when the binar input is,, 2, or 3, the binar output is one greater than the input. When the binar input is 4, 5, 6, or 7, the binar output is one less than the input. Solution: Design procedure:. Derive the truth table that defines the required relationship between inputs and outputs. X Y A B C 2. Obtain the simplified Boolean functions for each output as a function of the input variables. Map for output A: The simplified epression from the map is: A Map for output B: The simplified epression from the map is: B Map for output C: The simplified epression from the map is: C ' Page 3 of

4 3. Draw the logic diagram. A B C ' Or alternativel: Page 4 of

5 Problem: 4-9 A BCD-to-seven-segment decoder is a combinational circuit that converts a decimal digit in BCD to an appropriate code for the selection of segments in a displa indicator used for displaing the decimal digit in a familiar form. The seven outputs of the decoder (a, b, c, d, e, f, g) select the corresponding segments in the displa as shown in Fig. P4-9(a). The numeric displa chosen to represent the decimal digit is shown Fig. P4-9(b). Design the BCD-to-seven-segment decoder using a minimum number of gates. The si invalid combinations should result in a blank displa. Solution: Design procedure:. Derive the truth table that defines the required relationship between inputs and outputs. w a b c d e f g X X X 2. Epress the Boolean epressions for the outputs (a-g) in sum of minterms a(w,,,)= (,2,3,5,6,7,8,9) b(w,,,)= (,,2,3,4,7,8,9) c(w,,,)= (,,3,4,5,6,7,8,9) d(w,,,)= (,2,3,5,6,8,9) e(w,,,)= (,2,6,8) f(w,,,)= (,4,5,6,8,9) g(w,,,)= (2,3,4,5,6,8,9) Page 5 of

6 3. Draw the logic circuit. Two 3-to-8-line decoders with enable inputs have been connected to form a 4-to-6-line decoder. Together the generate all the minterms of the input variables. OR gates are to be used to implement each of the functions a-g. The inputs to each OR gate are selected from the decoder outputs according to the list of minterm of each function. The diagram below shows the circuit for output a, d and e. The same procedure should be followed to include the remaining functions and complete the logic circuit. Decoder S S 2 D D 8 D D D 2 D 3 e w S 3 ENB Decoder D 4 D 5 D 6 D 7 d a D 8 S D D 9 S 2 D 8 D D S 3 D 2 D 3 ENB D 4 D 5 Page 6 of

7 Problem: 4-2 (a) Design a half subtractor circuit with inputs and and outputs D and B. The circuit subtracts the bits - and places the difference in D and the borrow in B. (b) Design a full subtractor circuit with three inputs, and and two outputs D and B. The circuit subtracts the bits --, where is the input borrow, B is the output borrow and D is the difference. Solution (a) To design a half subtractor circuit with inputs and and outputs D and B. The circuit subtracts the bits - and places the difference in D and the borrow in B. Design procedure:. Derive the truth table that defines the required relationship between inputs and outputs. D B 2. Obtain the simplified Boolean functions for each output as a function of the input variables. D= + B= 3. Draw the logic diagram. Page 7 of

8 Solution (b) Design a full subtractor circuit with three inputs, and and two outputs D and B. The circuit subtracts the bits --, where is the input borrow, B is the output borrow and D is the difference. Design procedure:. Derive the truth table that defines the required relationship between inputs and outputs. D B 2. Obtain the simplified Boolean functions for each output as a function of the input variables. D= B= Draw the logic diagram. Page 8 of

9 Or alternativel using 2 half subtractor and an OR gate: Problem: 4-23 Draw the logic diagram of a 2-to-4 line decoder using NOR gates onl. Include an enable input. Solution: Design procedure:. The truth table for the circuit. E A B D D D 2 D 3 X X D = EA B =(E +A+B) D 2 = EAB =(E +A +B) D = EA B =(E +A+B ) D 3 = EAB =(E +A +B ) A 2. The logic diagram D B D D 2 E D 3 Page 9 of

10 Problem: 4-3 Specif the truth table of an octal to binar priorit encoder. Provide an output V to indicate that at least one of the inputs is present. The input with the highest subscript number has the highest priorit. What will be the value of the four inputs if inputs D 5 and D 3 are at the same time? Solution: Below is the truth table of an Octal-to-Binar priorit encoder with an output V to indicate that at least one of the inputs is present. The input with the highest subscript number has the highest priorit. D D D 2 D 3 D 4 D 5 D 6 D 7 X Y Z V X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X The value of the four outputs if inputs D 5 and D 3 are at the same time will be X=, Y=, Z=, V=. Page of