MC74VHC1G Input NAND Schmitt Trigger

Transcription

1 M74G32 2 Input NAND Schmitt Trigger The M74G32 is a single gate MOS Schmitt NAND trigger fabricated with silicon gate MOS technology. It achieves high speed operation similar to equivalent Bipolar Schottky TT while maintaining MOS low power dissipation. The internal circuit is composed of three stages, including a buffer output which provides high noise immunity and stable output. The M74G32 input structure provides protection when voltages up to 7.0 are applied, regardless of the supply voltage. This allows the M74G32 to be used to interface.0 circuits to circuits. The M74G32 can be used to enhance noise immunity or to square up slowly changing waveforms. Features igh Speed: t PD = 3.6 ns (Typ) at =.0 ow Power Dissipation: I =.0 A (Max) at T A = 2 Power Down Protection Provided on Inputs Balanced Propagation Delays Pin and Function ompatible with Other Standard ogic Families hip omplexity: FETs = 68; Equivalent Gates = 6 Pb Free Packages are Available IN B S 88A/SOT 33/S 70 DF SUFFIX ASE 49A TSOP /SOT 23/S 9 DT SUFFIX ASE 483 MARKING DIAGRAMS D M D AYW D = Device ode M = Date ode* A = Assembly ocation Y = Year W = Work Week = Pb Free Package (Note: Microdot may be in either location) *Date ode orientation and/or position may vary depending upon manufacturing location. M IN A 2 PIN ASSIGNMENT IN B 2 IN A GND 3 4 OUT Y 3 GND 4 OUT Y Figure. Pinout (Top iew) FUNTION TABE Inputs Output A B Y IN A IN B & Figure 2. ogic Symbol OUT Y ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 4 of this data sheet. Semiconductor omponents Industries,, 200 August, 200 Rev. 7 Publication Order Number: M74G32/D

2 M74G32 MAXIMUM RATINGS Symbol Parameter alue Unit D Supply oltage 0. to 7.0 IN D Input oltage 0. to +7.0 OUT D Output oltage 0. to 0. I IK D Input Diode urrent 20 ma I OK D Output Diode urrent 20 ma I OUT D Output Sink urrent 2. ma I D Supply urrent per Supply Pin 2 ma T STG Storage Temperature Range 6 to 0 T ead Temperature, mm from ase for 0 Seconds 260 T J Junction Temperature Under Bias 0 JA Thermal Resistance S70 /S 88A (Note ) 30 /W TSOP 230 P D Power Dissipation in Still Air at 8 S70 /S 88A TSOP MS Moisture Sensitivity evel F R Flammability Rating Oxygen Index: 28 to 34 U 94 2 in ESD ESD Withstand oltage uman Body Model (Note 2) Machine Model (Note 3) harged Device Model (Note 4) N/A I ATUP atchup Performance Above and Below GND at 2 (Note ) 00 ma Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected.. Measured with minimum pad spacing on an FR4 board, using 0 mm by inch, 2 ounce copper trace with no air flow. 2. Tested to EIA/JESD22 A4 A. 3. Tested to EIA/JESD22 A A. 4. Tested to JESD22 0 A.. Tested to EIA/JESD78. REOMMENDED OPERATING ONDITIONS Symbol Parameter Min Max Unit D Supply oltage 2.0. IN D Input oltage 0.0. OUT D Output oltage 0.0 T A Operating Temperature Range 2 t r, t f Input Rise and Fall Time = 3.3 ± 0.3 =.0 ± 0. No imit No imit ns/ mw Device Junction Temperature versus Time to % Bond Failures Junction Temperature Time, ours Time, Years 80,032, , , , , , ,900.0 NORMAIZED FAIURE RATE FAIURE RATE OF PASTI = ERAMI UNTI INTERMETAIS OUR TJ = 30 TJ = 20 TJ = 0 TJ = 00 TJ = 90 TJ = TIME, YEARS Figure 3. Failure Rate vs. Time Junction Temperature 2

3 M74G32 D EETRIA ARATERISTIS Symbol Parameter Test onditions T+ T Positive Threshold oltage Negative Threshold oltage ().. ysteresis oltage. O O I IN I Minimum igh evel Output oltage I O = 0 A Maximum ow evel Output oltage Maximum Input eakage urrent Maximum Quiescent Supply urrent T A = 2 T A 8 T A 2 Min Typ Max Min Max Min Max IN = or GND IN = I or I I O = 0 A I O = 4 ma I O = 8 ma IN = I or I I O = 0 A I O = 4 ma I O = 8 ma IN =. or GND to Unit ± ±.0 ±.0 A IN = or GND A ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ A EETRIA ARATERISTIS load = 0 pf, Input t r /t f = ns ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ T A = 2 T A 8 T A 2 ÎÎÎÎ SymbolÎÎÎÎÎÎ Parameter ÎÎÎÎÎÎÎÎÎÎ Test onditions ÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎ MinÎÎÎ TypÎÎÎ MaxÎÎÎ MinÎÎÎ MaxÎÎÎ MinÎÎÎÎ Max ÎÎÎÎ Unit t P, ÎÎÎÎÎÎ Maximum ÎÎÎÎÎÎÎÎÎÎ = 3.3 ± 0.3 = pf ÎÎÎÎ 4.6ÎÎÎ.9ÎÎÎ.0ÎÎÎ 4.0ÎÎÎ.0ÎÎÎÎ 6. ÎÎ ns t ÎÎÎÎ P Propagation Delay, ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ = 0 pf ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ A or B to Y ÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎ =.0 ± 0. = pf ÎÎ ÎÎ ÎÎÎ 3.6 = 0 pf ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎ.0.0 ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ IN Maximum Input ÎÎÎÎÎÎ apacitance ÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ. ÎÎÎ ÎÎÎ ÎÎÎ 0 ÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎÎ 0 0 pf ÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ PD Power Dissipation apacitance (Note 6) 2, =.0 6. PD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average operating current can be obtained by the equation: I (OPR) = PD f in + I. PD is used to determine the no load dynamic power consumption; P D = PD 2 f in + I. pf 3

4 M74G32 TEST POINT A or B 0% t P t P GND DEIE UNDER TEST OUTPUT * Y 0% *Includes all probe and jig capacitance Figure 4. Switching Waveforms Figure. Test ircuit DEIE ORDERING INFORMATION Device Order Number Package Type Tape and Reel Size M74G32DFT S70 /S 88A/SOT mm (7 in) M74G32DFTG S70 /S 88A/SOT 33 (Pb Free) 78 mm (7 in) M74G32DFT2 S70 /S 88A/SOT mm (7 in) M74G32DFT2G S70 /S 88A/SOT 33 (Pb Free) 78 mm (7 in) M74G32DTT SOT23 /TSOP S9 78 mm (7 in) M74G32DTTG SOT23 /TSOP S9 (Pb Free) 78 mm (7 in) For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD80/D. 4

5 M74G32 PAKAGE DIMENSIONS S 88A / SOT 33 / S70 ASE 49A 02 ISSUE S A G 4 B 2 3 D P 0.2 (0.008) M B M N J NOTES:. DIMENSIONING AND TOERANING PER ANSI YM, ONTROING DIMENSION: IN A 0 OBSOETE. NEW STANDARD 49A DIMENSIONS A AND B DO NOT INUDE MOD FAS, PROTRUSIONS, OR GATE BURRS. INES MIIMETERS DIM MIN MAX MIN MAX A B D G BS 0.6 BS J K N REF 0.20 REF S K SODERING FOOTPRINT* SAE 20: mm inches *For additional information on our Pb Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SODERRM/D.

6 M74G32 PAKAGE DIMENSIONS TSOP / SOT23 / S9 DT SUFFIX ASE ISSUE D 0.0 (0.002) S D G A B K J M NOTES:. DIMENSIONING AND TOERANING PER ANSI YM, ONTROING DIMENSION: MIIMETER. 3. MAXIMUM EAD TIKNESS INUDES EAD FINIS TIKNESS. MINIMUM EAD TIKNESS IS TE MINIMUM TIKNESS OF BASE MATERIA. 4. A AND B DIMENSIONS DO NOT INUDE MOD FAS, PROTRUSIONS, OR GATE BURRS. MIIMETERS INES DIM MIN MAX MIN MAX A B D G J K M S SODERING FOOTPRINT* SAE 0: mm inches *For additional information on our Pb Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SODERRM/D. ON Semiconductor and are registered trademarks of Semiconductor omponents Industries, (SI). SI reserves the right to make changes without further notice to any products herein. SI makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SI assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Typical parameters which may be provided in SI data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including Typicals must be validated for each customer application by customer s technical experts. SI does not convey any license under its patent rights nor the rights of others. SI products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SI product could create a situation where personal injury or death may occur. Should Buyer purchase or use SI products for any such unintended or unauthorized application, Buyer shall indemnify and hold SI and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SI was negligent regarding the design or manufacture of the part. SI is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBIATION ORDERING INFORMATION ITERATURE FUFIMENT: iterature Distribution enter for ON Semiconductor P.O. Box 632, Phoenix, Arizona USA Phone: or Toll Free USA/anada Fax: or Toll Free USA/anada orderlit@onsemi.com N. American Technical Support: Toll Free USA/anada Japan: ON Semiconductor, Japan ustomer Focus enter 2 9 Kamimeguro, Meguro ku, Tokyo, Japan 3 00 Phone: ON Semiconductor Website: Order iterature: For additional information, please contact your local Sales Representative. M74G32/D