IR21593(S) DIMMING BALLAST CONTROL IC. Features. Packages. Description. Typical Connection ADVANCE DATA. Data Sheet No. PD

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1 Feaures Ballas conrol and half-bridge driver in one IC Transformer-less lamp power sensing Closed-loop lamp power conrol Closed-loop prehea curren conrol Programmable prehea ime Programmable prehea curren Lamp igniion deecion Programmable igniion-o-dim ime 0.5 o 5VDC dimming conrol inpu Min and max lamp power adjusmens Programmable minimum frequency Inernal curren sense blanking Descripion Typical Connecion Daa Shee No. PD60194 DIMMING BALLAST CONTOL IC Descripion: The I159/I1593 are complee dimming ballas conrollers and 600V half-bridge drivers all in one IC. The archiecure includes phase conrol for ransformer-less lamp power sensing and regulaion which minimizes changes needed o adap non-dimming ballass for dimming. Exernally programmable feaures such as prehea ime and curren, igniion-o-dim ime, and a complee dimming inerface wih minimum and maximum seings provide a high degree of flexibiliy for he ballas design engineer. Proecion from failure of a lamp o srike, filamen failures, hermal overload, or lamp failure during normal operaion, as well as an auomaic resar funcion, have been included in he design. The hear of his conrol IC is a volageconrolled oscillaor wih exernally programmable minimum frequency. The I159/ I1593 are available in boh 16 pin DIP and 16 pin narrow body SOIC packages. + ecified AC Line Full lamp faul proecion Brown-ou proecion Auomaic resar Micro-power sarup Zener clamped Vcc Over-emperaure proecion 16-pin DIP and SOIC package ypes I159(S) I1593(S) Parameer I159 I1593 Deadime 1.8us 1.0us Frequency ange See Graph 3 See Graph 4 Packages 16 Lead SOIC (narrow body) 16 Lead PDIP + DC Bus VDC VAC PULL-UP Single Lamp Dimmable C VDC 1 VDC HO 16 C VCO VCO VS 15 C PH 3 CPH VB o 5VDC DIM 4 DIM VCC 13 MAX 5 MAX COM 1 MIN 6 MIN 11 FMIN 7 FMIN CS 10 IPH 8 9 IPH SD CS - DC Bus 1

2 I159/I1593 (S) Absolue Maximum aings Absolue maximum raings indicae susained limis beyond which damage o he device may occur. All volage parameers are absolue volages referenced o COM, all currens are defined posiive ino any lead. The hermal resisance and power dissipaion raings are measured under board mouned and sill air condiions. Symbol Definiion Min. Max. Unis V B High side floaing supply volage V S High side floaing supply offse volage V B - 5 V B + 5 V HO High side floaing oupu volage V S V B V Low side oupu volage -0.3 V CC I OMAX Maximum allowable oupu curren (eiher oupu) due o exernal power ransisor miller effec V VCO Volage conrolled oscillaor inpu volage V I CPH CPH curren -5 5 ma V IPH IPH volage V DIM Dimming conrol pin inpu volage V MAX Maximum lamp power seing pin inpu volage V MIN Minimum lamp power seing pin inpu volage V CS Curren sense inpu volage I SD Shudown pin curren -5 5 I CC Supply curren (noe 1) 5 dv/d Allowable offse volage slew rae V/ns P D h JA Package power T A +5 C Thermal resisance, juncion o ambien (16 pin DIP) (16 pin DIP) P D = (T JMAX -T A )/h JA (16 pin SOIC) (16 pin SOIC) W C/W T J Juncion emperaure T S Sorage emperaure T L Lead emperaure (soldering, 10 seconds) 300 o C V ma V ma Noe 1: This IC conains a zener clamp srucure beween he chip V CC and COM which has a nominal breakdown volage of 15.6V (V CLAMP ). Please noe ha his supply pin should no be driven by a DC, low impedance power source greaer han he diode clamp volage (V CLAMP ) as specified in he Elecrical Characerisics secion.

3 I159/I1593 (S) ecommended Operaing Condiions For proper operaion he device should be used wihin he recommended condiions. Symbol Definiion Min. Max. Unis V BS High side floaing supply volage V CC V CLAMP V S Seady sae high side floaing supply offse volage V V CC Supply volage V CCUV+ V CLAMP (15.6) I CC Supply curren noe 10 ma V VCO VCO pin volage 0 5 V DIM DIM pin volage 0 5 V V MAX MAX pin curren (noe 3) µa V MIN MIN pin volage 1 3 V FMIN Minimum frequency seing resisance kω I SD Shudown pin curren -1 1 I CS Curren sensing pin curren -1 1 ma T J Juncion emperaure o C Noe : Noe 3: Enough curren should be supplied ino he VCC lead o keep he inernal 15.6V zener clamp diode on his lead regulaing is volage, V CLAMP. The MAX lead is a volage-conrolled curren source. For opimum dim inerface curren mirror performance, his curren should be kep beween 0 and 750µA. Elecrical Characerisics V CC = V BS = V BIAS = 14V +/- 0.5V, V CS = 0.5V, V SD = 0.0V, FMIN = 40k, C VCO = 10 nf, V DIM = 0.0V, MAX = 33k, MIN = 56k, V CPH = 0.0V, C,HO = 1000pF, T A = 5 o C unless oherwise specified. Symbol Definiion Min. Typ. Max. Unis Tes Condiions Supply Characerisics V CCUV+ V CC supply undervolage posiive going hreshold V V CCHYS V CC supply undervolage lockou hyseresis I QCCUV UV mode quiescen curren 00 V CC = 10V I QCCFLT Faul-mode quiescen curren 40 µa SD=5V, CS=V, or Tj > TSD I QCCFMIN V CC supply FMIN (I159) 5.6 V VCO = 0V I QCCFMAX V CC supply FMAX (I159) 6.6 ma V VCO = 5V I QCCFMIN V CC supply FMIN (I1593) 5.4 V VCO = 0V I QCCFMAX V CC supply FMAX (I1593) 6.8 V VCO = 5V V CLAMP V CC zener shun clamp volage V I CC = 10mA 3

4 I159/I1593 (S) Elecrical Characerisics (con.) V CC = V BS = V BIAS = 14V +/- 0.5V, V CS = 0.5V, V SD = 0.0V, FMIN = 40k, C VCO = 10 nf, V DIM = 0.0V, MAX = 33k, MIN = 56k, V TPH = 0.0V, C,HO = 1000pF, T A = 5 o C unless oherwise specified. Symbol Definiion Min. Typ. Max. Unis Tes Condiions Floaing Supply Characerisics I QBS0 Quiescen V BS supply curren 0 V HO = V S µa I QBS1 Quiescen V BS supply curren 30 V HO = V B V BSMIN Minimum required VBS volage for proper 4 5 V HO funcionaliy I LK Offse supply leakage curren 50 µa V B = V S = 600V Oscillaor I/O Characerisics fvco VCO frequency range (I159) 5 VVCO=0V, FMIN=39KΩ (See graph 3) 95 VVCO=5V, FMIN=10KΩ fvco VCO frequency range (I1593) 30 khz VVCO=0V, FMIN=68KΩ (See graph 4) 30 VVCO=5V, FMIN=10KΩ d Gae drive oupus duy cycle 50 % V VCO = 0V VVCOFLT Faul-mode VCO pin volage (UV, 5 V shudown, over-curren/emp.) IVCOPH Prehea mode VCO pin discharge curren 1.0 VCPH < 5V µa IVCODIM Dim mode VCO pin discharge curren 16.0 IVCOPK Ampliude conrol VCO pin charging curren 60.0 µa V CPH < 5V, V CS >V IPH DT oupu deadime (I159) 1.8 DTHO HO oupu deadime (I159) 1.8 DT oupu deadime (I1593) 1.0 µs DTHO HO oupu deadime (I1593) 1.0 Gae Driver Oupu Characerisics VOL Low-level oupu volage 100 mv VOH High-level oupu volage 100 VBIAS - Vo r Turn-on rise ime 150 ns f Turn-off fall ime

5 I159/I1593 (S) Elecrical Characerisics (con.) V CC = V BS = V BIAS = 14V +/- 0.5V, V CS = 0.5V, V SD = 0.0V, FMIN = 40k, C VCO = 10 nf, V DIM = 0.0V, MAX = 33k, MIN = 56k, V TPH = 0.0V, C,HO = 1000pF, T A = 5 o C unless oherwise specified. Symbol Definiion Min. Typ. Max. Unis Tes Condiions Prehea Characerisics ICPH CPH pin charging curren 1.3 µa VCPHIGN CPH pin igniion mode hreshold volage 5.0 VCPHCLMP CPH pin clamp volage 10 V IIPH IPH pin DC source curren 5.0 µa IIPH = 1/FMIN VCSTH Peak prehea curren regulaion hreshold 0.7 V VCSTH =(IIPH) x (IPH) VCPHFLT CPH pin volage during UV or faul 0.0 V SD = 5V, or CS = V, or Tj > TSD Igniion Deecion I IPHIGN+ IPH source curren (Vcs rising) 30 VCPH>5.1V,VCS<VIPH µa I IPHIGN- IPH source curren (Vcs falling) 7.5 VCPH>5.1V,VCS>VIPH Proecion Characerisics V SDTH+ ising shudown pin hreshold volage.0 V CSTH Peak over curren hreshold 1.6 V VCPH < 5V V VDCTH+ ising VDC pin hreshold volage 5.1 V SDHYS SD hreshold hyseresis 150 mv V VDCHYS VDC hreshold hyseresis.1 V SDCLMP SD pin clamp volage 7.6 V ISD = 100mA V CSTH Peak over-curren lach hreshold volage 1.6 V CPH > 5.1V T SD Thermal shudown juncion emperaure 165 o C Phase Conrol VCSTHZX Zero-crossing hreshold volage 0.0 V FB Phase conrol FB resisor (Inernal) 5.7 kω Blank Zero-crossing inernal blank ime 400 ns Dimming Inerface VDIMOFF DIM pin offse volage 0.5 V DIM DIM pin inpu volage range V MINMIN DIM minimum reference volage (MIN pin) 1.0 VDIM = 5V V V MINMAX DIM maximum reference volage (MIN pin) 3.0 VDIM = 0V V DIMTH DIM mode VCO Threshold (I159) 0.5 V DIMTH DIM mode VCO Threshold (I1593) 1.1 Minimum Frequency Seing V FMIN FMIN pin volage during normal operaion 5.1 V V FMINFLT FMIN pin volage during faul mode 0.0 V SD = 5V, or CS = V, or Tj > TSD 5

6 I159/I1593 (S) Block Diagram 60uA VCC VCO 1uA 15uA FB I CT V 14 VB VDC 1 1.3uA S Q Q E LEVEL SHIFT PULSE FILTE & LATCH 16 HO 15 VS CPH 3 10V DIM 4 5.1V S Q Q EF CT I CT I DT + I CT 5.1V 1.0V CT S Q 1 Q T Q Q 400ns DELAY 15.6V 13 VCC 11 1 COM I DIM FB MAX 5 10 CS MIN 6 FMIN 7 IPH 8 4/ FMIN 0.1/ FMIN 0.1/ FMIN I DIM /5 I FMIN 1/ FMIN 5.1V 1 1.6V 0 3V 5.1V S Q Q IGN DET UNDE- VOLTAGE DETECT Q Q S OVE- TEMP DETECT.0V 7.6V 9 SD Lead Assignmens & Definiions VDC VCO CPH DIM MAX MIN FMIN IPH Pin Assignmens HO VS VB VCC COM CS SD Pin # Symbol Descripion VDC VCO CPH DIM MAX MIN FMIN IPH SD CS COM VCC VB VS HO Line inpu volage deecion Volage conrolled oscillaor Inpu Prehea iming inpu 0.5 o 5VDC dimming conrol inpu Maximum lamp power seing Minimum lamp power seing Minimum frequency seing Peak prehea curren reference Shudown inpu Curren sensing inpu Low-side gae driver oupu IC power & signal ground Logic & low-side gae driver supply High-side gae driver floaing supply High volage floaing reurn High-side gae driver oupu 6

7 I159/I1593 (S) Sae Diagram Power Turned On UV Mode 1/-Bridge Off IQCC=00mA CPH=0V Oscillaor Off SD >.0V (Lamp emoval) or VCC < 10.9V (Power Turned Off) VCC > 1.5V (UV+) and VDC > 5.1V (Bus OK) and SD < 1.7V (Lamp OK) and T J < 165C (T jmax ) VCC < 10.9V (VCC Faul or Power Down) or VDC < 3.0V (dc Bus/ac Line Faul or Power Down) or SD >.0V (Lamp Faul or Lamp emoval) FAULT Mode Faul Lach Se 1/-Bridge Off I QCC =40µA CPH=0V VCC=15.6V Oscillaor Off T J > 165C (Over-Temperaure) PEHEAT Mode 1/-BridgeOscillaor On V CSPK +V IPH (Peak Curren Conrol) CPH Charging@I PH +1µA DIM+Open Circui Over-Curren Disabled CS > V CSTH (1.6V) (Failure o Srike Lamp or Hard Swiching) or T J > 165C (Over-Temperaure) CS > V CSTH (1.6V) (Over-Curren or Hard Swiching) or T J > 165C (Over-Temperaure) V CS >V IPH (enable igniion deecion) hen V CS <V IPH (igniion deeced) IGNITION Mode f PH ramps o fmin CPH Charging@I PH +1µA DIM=Open Circui Over-Curren Enabled CPH > 5.1V (End of PEHEAT Mode) DIM Mode Phase CS =Phase EF DIM=CPH Over-Curren Enabled 7

8 I159/I1593 (S) Timing Diagram Non-srike faul condiion wih lamp exchange VCC 15.6V VDCTH- UV+ UV- VDC VDCTH+ CPH 5.1V VDIM VCO 5V f SD 5V HO CS 1.6V VIPH UV PH IGN FLT SD PH IGN DIM UV 8

9 I159/I1593 (S) Exernal Componens Selecion Procedure BEGIN (Noe: Please refer o "Typical Connecion" Calculae PULL-UP diagram, page 1) VACTUN ON PULL = UP I QCCUV Calculae VDC Se VAC and VDC such ha he volage on pin VDC will exceed 5.1 vols a he desired line urn-on volage. VDC 5.1 VAC = VAC TUN ON TUN ON VAC VDC VAC TUN-ON The minimun operaing frequency mus be lower han f 100% of f IGN (whichever is lower). FMIN also programs I MIN and I IPH, so FMIN mus be se firs. Selec FMIN Use Graph 5 or Graph 6 FMIN f MIN CS ses he maximum igniion curren which corresponds o he maximum igniion volage across he lamp. Calculae CS CS 1.6 = I IGN PK CS I IGN V IGN The volage a pin IPH is he reference for ampliude curren conrol during prehea mode. IPH mus be se afer FMIN. Selec & Calculae IPH Use Graph 8 o find I IPH, hen calculae IPH : IPH I = PH PK I IPH CS IPH I PH V PH During prehea, an inernal 1.3 µa curren source a pin CPH charges exernal capacior CCPH. Prehea mode ends when VCPH exceeds 5.1 vols. Calculae C CPH CPH (.6e ) PH C = 7 C CPH PH Calculae MIN MIN ses he lower phase boundary corresponding o minimum lamp power when V DIM = 0 vols. MIN mus be se afer FMIN. Find I MIN (Graph 7) Calculae ϕ MIN (Equaions 8 & 9) Find V MIN (Graph 9) V MIN = I MIN MIN MIN ϕ MIN P LAMP MAX ses he upper phase boundary corresponding o maximum lamp power when V DIM = 5 vols. MAX mus be se afer FMIN and MIN. Calculae MAX Use Equaion 15 MAX ϕ MAX P LAMP 9

10 I159/I1593 (S) Characerisic Curves Frequency (KHz) FMIN=10K FMIN=16K FMIN=0K FMIN=7K FMIN=39K V VCO (V) Frequency (KHz) FMIN=10K FMIN=16K FMIN=0K FMIN=7K FMIN=39K FMIN=68K Graph 1. Frequency vs V VCO (I159) Graph. Frequency vs V VCO (I1593) Frequency (KHz) V VCO =5V V VCO =0.5V Frequency (KHz) V VCO =5V V VCO =1.1V 45 V VCO =0V FMIN KΩ Graph 3. Frequency vs FMIN (I159) 70 V VCO =0V FMIN KΩ Graph 4. Frequency vs FMIN (I1593) 10

11 I159/I1593 (S) Frequency (KHz) V VCO =0.5V FMIN KΩ Graph 5. Frequency vs FMIN (I159) Frequency (KHz) V VCO =1.1V FMIN KΩ Graph 6. Frequency vs FMIN (I1593) IMIN ( A) FMIN (KΩ) Graph 7. I MIN vs FMIN (I159/I1593) IIPH ( A) FMIN (KΩ) Graph 8. I IPH vs FMIN (I159/I1593) 11

12 I159/I1593 (S) 0 30 IIVSI/VVSI MIN (KΩ) FMIN=39K FMIN=33K FMIN=7K FMIN=0K FMIN=16K FMIN=10K V MIN (V) V MIN (V) Graph 9. ϕ II VS /V VS I vs V MIN (I159/I1593) Graph 10. MIN vs V MIN ICPH µa 1.5 IMIN µa Temperaure C Temperaure C Graph 11. I CPH vs Temperaure (I159/I1593) Graph 1. I MIN vs Temperaure (I159/I1593) 1

13 I159/I1593 (S) IIPH (µa) 3 8 VFMIN (V) Temperaure C Temperaure C Graph 13. I IPH vs Temperaure (I159/I1593) Graph 14. V FMIN vs Temperaure (I159/I1593) Frequency (KHz) I1593 I Temperaure C Graph 15. Frequency vs Temperaure V VCO = 0V (I159/I1593) Frequency (KHz) I1593 I Temperaure C Graph 16. Frequency vs Temperaure V VCO = V (I159/I1593) 13

14 I159/I1593 (S) 3 Dead Time Sec I159 I Temperaure C Graph 17. Dead Time vs Temperaure (I159/I1593) 14

15 I159/I1593 (S) Phase Conrol Funcional Descripion 0 PH/IGN 10% To undersand phase conrol, a simplified model for he ballas oupu sage is used (Figure 1). The lamp and filamens are replaced wih resisors, wih he lamp insered beween he filamen resisors (1,, 3 and 4). Magniude [db] % 10% 50% 100% PH/IGN Phase [deg] 100% -50 L Frequency [khz] Vin lamp Figure 1, Dimming ballas oupu sage. During prehea and igniion (Figure ), he circui is a high-q series LC wih a srong inpu curren o inpu volage phase inversion from +90 o -90 degrees a he resonance frequency. For operaing frequencies slighly above resonance and higher, he phase is fixed a -90 degrees for he duraion of prehea and igniion. During dimming, he circui is an L in series wih a parallel and C, wih a weak phase inversion a high lamp power and a srong phase inversion a low lamp power. 3 4 C Figure, Typical oupu sage ransfer funcion for differen lamp power levels. In he ime domain (Figure 3), he inpu curren is shifed -90 degrees from he inpu half-bridge volage during prehea and igniion, and somewhere beween 0 and -90 degrees afer igniion during running. Zero phase-shif corresponds o maximum power 0 Vin Iinrun Iin ph/ign n run n ph/ign Figure 3, Typical ballas oupu sage waveforms. When he phase is calculaed and ploed versus lamp power (Figure 4), he resul is a linear dimming curve, even down o ulra-low ligh levels where he resisance of he lamp can change by orders of magniude. 15

16 I159/I1593 (S) Phase [degrees] The sar-up capacior (C1) is charged by curren hrough resisor (1) minus he sar-up curren drawn by he IC. This resisor is ypically chosen o provide X he maximum sar-up curren a low line o guaranee sar-up under he wors case condiion. Once he capacior volage reaches he sar-up hreshold, and, he volage on pin VDC is above 5.1V (see Brown-ou Proecion), he IC urns on and HO and begin o oscillae. The capacior begins o discharge due o he increase in IC operaing curren (Figure 6) Lamp Power [Was] V C1 C1 DISCHAGE INTENAL CLAMP VOLTAGE V UV+ Figure 4, Lamp power vs. phase of oupu sage. VHYST Under-volage Lock-Ou (UV) V UV- DISCHAGE TIME The I159/I1593 undervolage lock-ou is designed o mainain an ulra low quiescen curren of less han 00uA, while guaraneeing he IC is fully funcional before he high and low side oupu drivers are acivaed. Figure 5 shows an efficien supply volage using he sar-up curren of he I159/I1593 ogeher wih a charge pump from he ballas oupu sage (1, C1, C, D1 and D). V BUS (+) ecified AC Line CVDC V BUS (-) 3 VDC 1 VDC HO VS VB VCC COM 1 11 C3 D3 1 C1 D1 Q1 Q CS Half-Bridge Oupu Figure 5, Typical applicaion of sar-up circuiry. C D 1 & C1 TIME CONSTANT CHAGE PUMP OUTPUT Figure 6, Sar-up capacior (C1) volage. During he discharge cycle, he recified curren from he charge pump charges he capacior above he minimum operaing volage of he device and he charge pump and inernal 15.6V zener clamp of he IC ake over as he supply volage. The sar-up capacior and snubber capacior mus be seleced such ha wors case IC condiions are saisfied. A boosrap diode (D3) and supply capacior (C3) comprise he supply volage for he high side driver circuiry. To guaranee ha he high-side supply is charged up before he firs pulse on pin HO, he firs pulse from he oupu drivers comes from he pin. During UV, he high and low side driver oupus are low, pin VCO is pulled-up inernally o 5V reseing he saring frequency o he maximum, and pin CPH is shor-circuied inernally o COM reseing he prehea ime. 16

17 I159/I1593 (S) Brown-ou Proecion In addiion o he volage on VCC being above he sar-up hreshold, pin VDC mus also be above 5.1V for HO and o begin oscillaing. A volage divider (3,VDC) from he recified AC line conneced o pin VDC measures he recified AC line inpu volage o he ballas and programs he urn-on and urn-off line volages. A filer capacior (CVDC) is also conneced o pin VDC ha mus be chosen such ha he ripple is low enough and he lower urn-off hreshold of 3V is no crossed during normal line condiions. This deecion is necessary due o he possibiliy of he lamp exinguishing during low-line condiions before he IC is properly rese. Should a brownou occur, he DC bus can drop o a level below he minimum required for he ank circui o mainain he necessary lamp volage. This deecion will insure a clean urn-off before he DC bus drops oo low and properly reses he IC o he prehea mode when he line reurns. Prehea (PH) The I159/I1593 eners prehea mode when VCC exceeds he UV+ hreshold and VDC exceeds 5.1V. HO and begin o oscillae a he maximum operaing frequency wih 50% duy cycle and a he inernally se dead-ime of us. Pin CPH is disconneced from COM and an inernal 1uA curren source (Figure 7) charges he exernal iming capacior on CPH linearly. V BUS (+) V BUS (-) C VCO VCO CPH 3 C CPH FMIN 7 FMIN IPH IPH 8 60uA 1uA 1uA I FMIN 1/ FMIN 7.6V 5.1V VCO PH GIC Half Bridge Driver I159/I1593 HO 16 VS CS 10 COM 1 Figure 7, I159/I1593 prehea circuiry. Q Q Half Bridge Oupu CS I AD Load eurn An inernal 1uA curren source slowly discharges he exernal capacior on pin VCO and he volage on pin VCO begins o decrease. This decreases he frequency, which, for operaing frequencies above resonance, increases he load curren. When he peak volage measured on pin CS, produced by a porion of he load curren flowing hrough an exernal sense resisor (CS), exceeds he volage level on pin IPH, a 60uA inernal curren source is conneced o pin VCO and he capacior charges (Figure 8). This forces he frequency o increase and he load curren o decrease. When he volage on pin CS decreases below IPH, he 60uA curren source is disconneced and he frequency decreases again. 17

18 I159/I1593 (S) HO V BUS (+) VS VCO VCO HO 16 Q V CS V IPH C VCO CPH 3 C CPH 1uA 1uA 7.6V PH GIC Half Bridge Driver VS Q Half Bridge Oupu I AD 0.5 o 5V DIM 4 DIM INTEFACE DIM FAULT GIC 1.6V CS 10 I CVCO 60uA PHASE CONTOL I159/I1593 COM 1 CS Load eurn V BUS (-) -1uA Figure 9, I159/I1593 igniion circuiry. V CVCO Figure 8, Peak load curren regulaion iming diagram. This feedback keeps he peak prehea curren regulaed o he user-programmable seing on pin IPH for he duraion of he prehea ime. An inernal curren source conneced o an exernal resisor on pin IPH ses a volage reference for he peak pre-hea curren. The pre-hea ime coninues unil he volage on pin CPH exceeds 5V. Igniion (IGN) The I159/I1593 eners igniion mode when he volage on pin CPH exceeds 5V. The peak curren regulaion reference volage is disconneced from he user-programmable seing on pin IPH and is conneced o a higher inernal hreshold of 1.6V (Figure 9). The igniion ramp is hen iniiaed as he capacior on pin VCO discharges linearly hrough an inernal 1uA curren source. The frequency decreases linearly owards he resonance frequency of he high-q ballas oupu sage, causing he lamp volage and load curren o increase (Figure 10). The frequency coninues o decrease unil he lamp ignies or he curren limi of he I159/I1593 is reached. If he curren limi is reached, he I159/I1593 eners FAULT mode. The 1.6V hreshold ogeher wih he exernal curren sensing resisor on pin CS deermine he maximum allowable peak igniion curren (and herefore peak igniion volage) of he ballas oupu sage. The peak igniion curren mus no exceed he maximum allowable curren raings of he oupu sage MOSFETs or IGBTs, and, he resonan inducor mus no saurae a any ime. To preven a "flash" across he lamp during igniion a low dim seings, an igniion deecion 18

19 I159/I1593 (S) circui measures he volage a he CS pin and compares i agains he volage a he IPH pin. During he rising igniion ramp, he volage a he IPH pin is increased o 0% above is value conrol inpu on pin DIM. To conrol he rae a which he dim seing changes from maximum brighness o he user seing (IGN-TO-DIM ime, Figure 11), CS V CPH 5.1V V IPH + 0% V IPH + 10% DIM & C TPH TIME CONSTANT V IPH V DIM V VCO IGN-TO-DIM TIME PH IGN DIM PH IGN DIM Figure 10, I159/I1593 igniion deecion. during prehea mode. When he volage on he CS pin exceeds his volage, he volage on he IPH pin is decreased o 10% and he igniion deecion circui is hen acive (See Figure 10). When he lamp ignies, he volage on he CS pin will hen fall below he volage on he IPH pin and he IC eners DIM Mode and he phase conrol loop is closed. In order for he igniion deecion circui o funcion properly and for he IC o ener DIM mode, he volage on he CS pin mus firs rise above VIPH + 0% during he igniion ramp o acivae he circui, and hen decrease below VIPH + 10% when he lamp ignies. Igniion-o-Dim (IGN-o-DIM) When he I159/I1593 eners dim mode. The phase conrol loop is closed and he phase of he load curren is regulaed agains he user Figure 11, I159/I1593 igniion iming diagram. pin DIM is conneced inernally o pin CPH when he I159/I1593 eners DIM mode. The resisor on pin DIM (DIM) discharges he capacior on pin CPH down o he user dim seing. The resisor can be seleced for a fas ime consan o minimize he amoun of flash visible over he lamp jus afer igniion, or, a long ime consan such ha he brighness ramps down smoohly o he user seing. Should he igniion-o-dim ime be oo fas, however, he loop can respond faser han he ionizaion consan of he lamp (milliseconds) causing he VCO o over-shoo. This can resul in a frequency ha is higher han he minimum brighness frequency and can exinguish he lamp. The capacior on pin CPH serves muliple funcions by seing he prehea ime, he ravel rae jus afer igniion (ogeher wih resisor DIM), and, serving as a filer capacior on pin 19

20 I159/I1593 (S) DIM during dimming o increase high-frequency noise immuniy and minimize componen coun. V CS Dimming (DIM) To regulae lamp power, he error beween he reference phase and he phase of he oupu sage curren forces he VCO o seer he frequency in he proper direcion, as deermined by he ransfer funcion of he oupu sage, such ha he error is forced o zero. An inernal 15uA curren source is conneced o pin VCO during dimming mode (Figure 1) o discharge he VCO capacior and decrease he frequency owards lock. n EF n FB n E V BUS (+) V VCO VCC I o 5V V BUS (-) C VCO C CPH VCO CPH 3 DIM 4 DIM MAX 5 MAX MIN 6 MIN FB 16uA 7.6V PHASE CONTOL VCO DIM INTEFACE Half Bridge Driver 1.6V HO 16 VS CS 10 COM 1 Figure 1, I159/I1593 dimming circuiry. FAULT GIC Q Q Half Bridge Oupu CS I AD Load eurn Figure 13, Phase conrol iming diagram. The I159/I1593 includes a dimming inerface for analog lamp power conrol. The DIM pin inpu requires a volage in he range of 0.5 o 5VDC, wih 5V corresponding o minimum phase shif (maximum lamp power). The oupu of he dim inerface is he volage on pin MIN, which is compared wih he inernal iming capacior (CT) volage o produce a frequencyindependen digial reference phase (Figure 14). Once lock is achieved, he phase deecor (PDET) oupus shor pulses o an open-drain PMOS ha charges he VCO capacior hrough an inernal resisor (FB) each ime an error pulse occurs (Figure 13). This acion "nudges" he inegraor a he inpu of he VCO o keep he phase of he oupu sage curren exacly locked in phase wih he reference. 0

21 I159/I1593 (S) V MIN 5V deecion comparaor for 400ns afer goes 'high' (Figure 16). V CT 3V MIN MAX V BUS (+) I159 1V 0 USE 0.5V SETTING 5V V DIM DIM ANGE Half Bridge Driver HO 16 VS 15 Q Half Bridge Oupu I AD n EF 11 Q 0E -90E -180E Figure 14, Dimming inerface The charging ime of CT from 1V o 5.1V deermines he on-ime of oupu gae drivers HO and and corresponds o -180 degrees of possible phase shif in load curren (minus deadime). For he 0 o -90 degree dim range, he volage on pin MIN is bounded beween 1V and 3V using pins MIN and MAX. An exernal resisor on pin MAX programs he minimum phase shif reference (maximum lamp power) corresponding o 5V on pin DIM, and an exernal resisor on pin MIN ses he maximum phase shif (minimum lamp power) corresponding o 0.5V on pin DIM. Curren Sensing During dimming, he curren sensing circuiry (Figure 15) deecs over-curren which can occur during hard-swiching (see Faul secion), and zero-crossing o measure he phase of he oal load curren. To rejec any swiching noise which can occur a he urn-on of he low-side MOSFET or IGBT, a digial curren sense blanking circui blanks ou he signal from he zero-crossing n V BUS (-) PHASE CONTOL 400ns BLANK FAULT GIC 1.6V CS 10 1 COM Figure 15, Curren sensing circuiry. 1 CS Load eurn The inernal blank ime reduces he dimming range slighly (Figure 16) when operaing a minimum phase shif (maximum lamp power). The exernal programming resisor on pin MAX mus be seleced such ha he minimum phase shif is se a safe margin away from he blank ime. A series resisor (1) is required o limi he amoun of curren flowing ou of pin CS when he volage across CS goes below -0.7V. A filer capacior a pin CS may be required due o oher possible asynchronous noise sources presen in he ballas sysem. 1

22 I159/I1593 (S) V BUS (+) V CS I159 Swiching Noise HO 16 Q Half Bridge Driver VS 15 Half Bridge Oupu I AD 11 Q J BLANK FAULT GIC 1.6V CS 10 1 Dimming ange CS PHASE CONTOL 400ns BLANK 1 COM Load eurn Figure 16, Curren sense iming diagram. V BUS (-) Faul Mode (FAULT) Figure 15, Curren sensing circuiry. The inernal blank ime reduces he dimming range slighly (Figure 16) when operaing a minimum phase shif (maximum lamp power). The exernal programming resisor on pin MAX mus be seleced such ha he minimum phase shif is se a safe margin away from he blank ime. A series resisor (1) is required o limi he amoun of curren flowing ou of pin CS when he volage across CS goes below -0.7V. A filer capacior a pin CS may be required due o oher possible asynchronous noise sources presen in he ballas sysem. During dimming, he peak curren regulaion circui acive during prehea and igniion is disabled. Should non-zero volage swiching a he oupu of he half-bridge occur (Figure 17), high curren spikes will resul. A lamp filamen failure, lamp end-of-life, lamp removal, or a deadime shorer han wha is required for commuaion, can all cause hard-swiching. HO VS AD EMOVAL V CS 1.6V NOMAL OPEATION HAD SWITCHING FAULT Figure 17, hard-swiching wih lach off

23 I159/I1593 (S) Should he peak volage on pin CS exceed 1.6V a any ime during dimming, he I159/I1593 eners FAULT mode and he high and low-side driver oupus, HO and, are boh urned off. Cycling he supply volage on VCC below or he volage on pin SD will rese he I159/I1593 o prehea (PH) mode (see STATE DIAGAM). Lamp equiremens Ballas Design Before selecing componen values for he ballas oupu sage and he programmable inpus of he I159/I1593, he following lamp requiremens mus firs be defined: Variable Descripion Unis I ph Filamen pre-hea curren Arms ph Filamen pre-hea ime s V phmax Maximum lamp pre-hea volage Vpp V ign Lamp igniion volage Vpp P 100% Lamp power a 100% brighness W V 100% I P V 1% 1% Cahmin Lamp volage a 100% brighness Lamp power a 1% brighness Lamp volage a 1% brighness Minimum cahode heaing curren Table I, Typical lamp requiremens Vpp W Vpp Arms Ballas Oupu Sage The componens comprising he oupu sage are seleced using a se of equaions. Differen ballas operaing frequencies and heir respecive volages and currens are calculaed. The inducor and capacior values are obained using equaions () hrough (7). The resuls of hese equaions reveal he locaion of each operaing frequency and he corresponding volages and currens. For a given L, C, DC bus volage, and pre-hea curren, he resuling volage over he lamp during pre-hea is given as: V ph The resuling operaing frequency during pre-hea is given as: f ph I ph = [Hz] (3) πcv ph The resuling operaing frequency during igniion is given as: f V DC 8L V DC = + I ph () π C π ign 4 π VDC 1+ 1 Vign = [Hz] (4) π LC 1 The oal load curren during igniion is given as: Iign = figncvignπ [App] (5) 3

24 I159/I1593 (S) The operaing frequency [Hz] a maximum lamp power is given as: f 100% = 1 π 1 3P LC C V 100% 4 100% LC C V P 100% 4 100% 4V 1 DC V 100% π L C (6) f % 1 = π 1 3P + LC C V % 4 % V% P% V% 3 ϕ an [( ) 4 3 % = C L πf % LCπ f% ] (9) π P V P % 1 3P % 4 LC C V% % 4V DC 1 V % π LC % (8) The cahode heaing curren a minimum lamp power is given as: I Cah 1% Design Consrains V1% f1% πc = (7) The inducor and capacior values should be ieraed unil he following design consrains have been fulfilled (Table II). Design Consrain Vph < Vph max eason Igniion during prehea f f >5 khz Producion olerances ph ign Iign < Iign max Inducor sauraion ICah I Lamp exinguishing 1% Cahmin during dimming Table II, Ballas design consrains I159/I1593 Programmable Inpus In order o program he MIN and MAX seings of he dimming inerface, he phase of he oupu sage curren a minimum and maximum lamp power mus be calculaed. This is obained using he following equaions: Wih he lamp requiremens defined, he L and C of he ballas oupu sage seleced, and he minimum and maximum phase calculaed, he componen values for seing he programmable inpus of he I159/I1593 are obained wih he following equaions: FMIN CS (5e 6) ( f MIN 10000) (1e 10) = ( f MIN 10000) (e 14) [Ohms] (10) (1.6) = [Ohms] (11) I ign = I [Ohms] (1) C IPH FMIN CS ph ϕ 1% = FMIN MIN [Ohms] (14) CPH MAX =.6E 7)( ) [Farads] (13) ( PH 0.86 = 4 MIN FMIN FMIN 1 MIN ϕ 100% 45 [Ohms] (15) 4

25 I159/I1593 (S) This ballas design procedure has been summarized ino he following 3 seps: Define Lamp equiremens Ierae L and C o fulfill consrains Calculae I159/I1593 Programmable Inpus Figure 19, Simplified Ballas Design Procedure Case ouline 16 Lead PDIP (MS-001A) 5

26 I159/I1593 (S) 16 -Lead SOIC (narrow body) (MS-01AC) I WOLD HEADQUATES: 33 Kansas S., El Segundo, California 9045 Tel: (310) Daa and specificaions subjec o change wihou noice. 10/10/