ECEN4618: Experiment #1 Timing circuits with the 555 timer

Transcription

1 ECEN4618: Experimen #1 Timing circuis wih he 555 imer cæ 1998 Dragan Maksimović Deparmen of Elecrical and Compuer Engineering Universiy of Colorado, Boulder The purpose of his lab assignmen is o examine operaing principles and several pracical applicaions of he 555 inegraedcircui imer. The 555 is capable of producing accurae ime delays or oscillaions. These funcions are needed in many analog, digial or mixedsignal applicaions. The circuis you design and es in his lab assignmen will be applied as building blocks in he lab assignmens ha follow. 1 The 555 Timer A funcional block diagram of he 555 imer is shown in Fig. 1. Various iming funcions can be obained by connecing resisors and capaciors around he 555. The 555 consiss of wo volage comparaors (C1 andc2), an RS flipflop FF, a discharge ransisor Q 14, a resisive volage divider (R, R 4, R 5 ), and an oupu buffer. The (,) inpu of he volage comparaor C1 is inernally conneced o he resisive volage divider. The volage a he (,) inpu is equal o V H = 2V CC =, which is called he hreshold level. The () inpu of he comparaor C1 is conneced o he exernal THRESHOLD pin (pin 6). The () inpu of he volage comparaor C2 is conneced o V L = V CC =, which is called he rigger level, while he (,) inpu is he exernal TRIGGER pin (pin 2). The (,) inpu of he volage comparaor C1 is also available as he CONTROL pin (pin 5), which can be used for exernal adjusmen of he hreshold and rigger levels. The comparaor C1 andc2 oupus are he rese R and he se S inpus, respecively, for he flipflop. When he TRIGGER inpu falls bellow he rigger level V L, he oupu of he volage comparaor C2 goes high and ses he flipflop. If he TRIGGER inpu is above he rigger level, and he THRESHOLD inpu is above he hreshold level, he oupu of he volage comparaor C1 is high and he flipflop is rese. The flipflop oupu Q drives he discharge ransisor Q 14, and an invering oupu buffer: when he flipflop oupu Q is high, Q 14 is on and he volage a he OUTPUT pin (pin ) is low (close o zero); when he flipflop oupu Q is low, Q 14 is off and he OUTPUT is high (close o V CC ). The oupu driver is capable of sinking or sourcing curren up o abou 200mA. The collecor of he discharge ransisor Q 14 is available a he DISCHARGE pin (pin 7). The acivelow RESET inpu (pin 4) o he flipflop can be used o disable he imer operaion and ensure ha he OUTPUT says a zero, regardless of he comparaor oupus. The dc supply volage can be beween V CC = 5V and V CC = 15V. I should be conneced beween he VCC (pin 8) and he GROUND (pin 1). Wih a 5V supply, he oupu, and he RESET inpu levels are compaible wih sandard TTL or CMOS digial logic circuis. 2 Basic Applicaions Wih he addiion of an exernal capacior and one or wo exernal resisors, he 555 can provide wo basic funcions: monosable operaion, where an oupu pulse of fixed duraion is iniiaed by a shor negaive pulse on he TRIGGER inpu, and asable operaion, where he imer produces periodic oupu pulses. 1

2 THRESHOLD CONTROL TRIGGER DISCHARGE VCC RESET 8 4 R C1 RES R4 R5 Q14 C2 R S FF 555 R8 100 Q Q OUTPUT 1 GND Figure 1: Funcional block diagram of he 555 inegraedcircui imer. 2.1 Monosable operaion The circui connecion for he monosable operaion is shown in Fig. 2. The corresponding waveforms are shown in Fig.. Iniially, he TRIGGER inpu volage is above he rigger level. Therefore, he flipflop is rese, Q is high, OUTPUT is low, and he discharge ransisor Q 14 is on. Since Q 14 is on, and he DISCHARGE pin is conneced o he THRESHOLD inpu, he capacior C is discharged. The THRESHOLD volage is equal o he sauraion V CES volage of he discharge ransisor Q 14, which is close o zero. Noe ha he CONTROL inpu is lef open so ha he rigger and he hreshold levels are V L = V CC =andv H = 2V CC =. In applicaions where he CONTROL inpu is no used, i is a good pracice o connec a noisedecoupling capacior C d = 10,100nF from he CONTROL pin o ground. This provides a lowimpedance pah for ac noise o ground and ensures ha he rigger and he hreshold levels say a he expeced dc levels. Noe also ha he RESET inpu is high (ied o V CC ) so ha he imer operaion is enabled. A = 0, a shor pulse akes he TRIGGER inpu below he rigger level. This ses he flipflop, he OUTPUT goes high, and he discharge ransisor Q 14 is urned off. Since Q 14 is off, he capacior C sars o charge up hrough he resisor R oward V CC. Afer he inerval T w, he capacior volage reaches he hreshold level V H = 2V CC =, he flipflop is rese, he oupu reurns o low, and he discharge ransisor Q 14 is urned on again. When Q 14 is urned on, is collecor curren quickly discharges he capacior oward zero, and he circui is again in he iniially assumed seady sae. Anoher shor pulse on he TRIGGER 2

3 VCC Trigger pulse V Cd 0.1uF Vc R C VL 8 4 R C1 RES VH R Q R4 FF S Q R5 Q14 1 C2 555 R8 100 Vo Figure 2: Monosable circui buil around he 555 imer. inpu would be needed o produce anoher oupu pulse of duraion T w. Wihou he exernal rigger inpu, he oupu always says low, which is why he circui is called monosable, or onesho. The basic design specificaion for a monosable circui is he oupu pulse duraion T w. The pulse duraion depends on he selecion of he exernal R and C componens. Therefore, we would like o deermine how T w depends on R and C. The soluion will be found here in more general erms, so ha he resuls can be applied o oher similar problems. Consider he R, C circui in Fig. 4, where a = 0, he iniial capacior volage is v c è0è =V o. For ç 0, he circui is described by he firsorder differenial equaion: dv c v c = V 1 d RC RC ; v cè0è=v o : (1) where V 1 is a dc volage. If we le he capacior charge (or discharge) compleely (for!1), he final capacior volage is v c è1è=v 1 è. The soluion o Eq. 1 is given by 1 : v c èè=v 1 èv o,v 1 èe,=ç ; ç = RC : (2) Now, if we wan o know when he capacior volage reaches a cerain hreshold V TH, we can use he soluion given by Eq. 2 as follows: v c èè=v TH = V 1 èv o,v 1 èe,=ç ; () 1 This should be well known...

4 >VL TRIGGER V() <VL close o VCC OUTPUT Vo() 0 CAP VOLTAGE Vc() 0 Tw VH Figure : Typical waveforms in he monosable circui wih he 555 imer. R V1 C Vc() Vc(0)=Vo Figure 4: Capacior charging (or discharging) circui. Therefore, e =ç = V o, V 1 ; V TH,V 1 (4) ç ç Vo, V = 1 ç ln : V TH,V 1 (5) Le us apply he above soluion o he problem of finding he oupu pulse widh T w as a funcion of he ime consan ç = RC. From Figs. 2 and, we have ha V o ç 0, V 1 = V CC,andV TH = V H = 2V CC =, so ha ç T w = ç ln = ç ln ç 1:1RC : (6) ç,v CC 2V CC =, V CC For a specified T w, Eq. 6 gives only one consrain for R and C. Furher consrains, which are less obvious, can neverheless make a difference beween a good and a bad design. Here is a summary of consideraions ha should be aken ino accoun when selecing he values for R and C: 4

5 1. When he oupu is in he low seadysae, he discharge ransisor Q 14 is on, and we assume ha he ransisor is sauraed so ha he volage a he DISCHARGE and he THRESHOLD pins is V CES ç 0. The curren hrough he resisor R is hen given by: I R = V CC, V CES R ç V CC R : (7) If R is smaller, I R is higher, and he imer akes more power from he dc supply V CC. Also, if R is oo small, he discharge ransisor Q 14 will come ou of sauraion, and he volage a he DISCHARGE/THRESHOLD pins can be significanly higher han zero. As a resul, in addiion o he waseful power loss, we may have a significan error in he oupu pulse widh T w. 2. The inpu currens o he comparaors C1 andc2 are small, bu no equal o zero. From he daa shees, we read ha he hreshold inpu curren can be as high as 250nA, and ha he rigger inpu curren can be as high as 0:9çA. Even worse, he hreshold/rigger inpu curren is no a very reliable parameer, because i can vary in a wide range from one device o anoher. For example, as given in he daa shees, he ypical value for he hreshold curren is only 0nA, alhough i can be as high as 250nA. In addiion, he hreshold inpu curren (which is he base curren of he inernal BJT Q 1 (see daa shees), cerainly has a very srong emperaure dependence, which would furher invalidae any design based on he precise knowledge of his curren. In he analysis for T w, we assumed ha he hreshold inpu curren is zero. In a good design, we should aemp o make he conribuion of he hreshold curren negligible. Therefore, R should be seleced so ha I R is always much greaer han he hreshold inpu curren, which gives a maximum R ha can be used in he circui. The condiion: I R éé 250nA (8) resuls in Réé V CC 250nA : (9) For V CC = 10V, we need R éé 40MΩ. A pracical limi would include a facor of 10, so: Ré4MΩ.. A he end of he oupu pulse, he discharge ransisor Q 14 is urned on o discharge he capacior C oward zero. The discharge is no insananeous. During he discharge ransien, Q 14 operaes in he acive region wih approximaely consan collecor curren I C. Assuming ha I C éé I R,whichis he case if R was seleced properly (see commen 1. above), he discharge akes discharge ç C I C 2V CC (10) If he discharge ime is oo long, he imer may no be ready in ime o respond o anoher rigger pulse a he TRIGGER inpu. 4. Parasiic capaciances on he circui board and on he inpus o he inegraed circui are usually around 5,10pF. These values are no known in advance, may vary from one seup o anoher, and from one componen o anoher. Therefore, o avoid errors, he capaciance C should be much greaer han he parasiic capaciances. 5

6 VCC RB RA VL 8 4 R C1 RES VH R Q R4 FF S Q R5 C2 555 Vo Cd 0.1uF Vc C 7 Q14 1 R8 100 Figure 5: Asable circui (pulse generaor) buil around he 555 imer. 2.2 Asable operaion Wih he addiion of an exernal capacior and wo exernal resisors, he 555 can be configured o produce a periodic pulsaing waveform a he oupu, wihou any exernal rigger pulses. The basic configuraion for he asable operaion is shown in Fig. 5, ogeher wih ypical seadysae waveforms in Fig. 6. The key difference beween he monosable and he asable operaion is ha he TRIGGER inpu is conneced ogeher wih he THRESHOLD inpu so ha he imer riggers iself during operaion. The capacior C is periodically charged and discharged beween he rigger level V L = V CC = and he hreshold level V H = 2V CC =. Suppose ha a = 0 he oupu is high, and he discharge ransisor Q 14 is off. The capacior is charged hrough R A and R B unil he capacior volage reaches V H = 2V CC =a = H. A his poin, he flipflop is rese, he oupu goes low, and he discharge ransisor Q 14 is urned on. As a resul, C is discharged hrough R B and he sauraed discharge ransisor Q 14. A = H L = T p, he capacior volage drops o V L = V CC =, he flipflop is se again, he oupu volage goes high and he discharge ransisor is urned off, saring anoher period. The imes H and L can be deermined using he same approach used o deermine T w in he monosable circui. The resuls are: L = R B C ln 2 ç 0:69R B C (11) H =èr A R B ècln 2 ç 0:69èR A R B èc (12) 6

7 close o VCC OUTPUT Vo() 0 H L CAP VOLTAGE Vc() VH VL 0 Tp Figure 6: Typical waveforms in he asable circui wih he 555 imer. The period of he waveforms is and he frequency is f p = 1=T p. The oupu waveform duy cycle D is: T p =èr A 2R B ècln 2 : (1) D = H T p = H H L = R A R B R A 2R B : (14) Since H é L, he duy cycle mus be greaer han 50% in his configuraion. Experimen The experimen has hree pars. Unless oherwise noed, use V CC = 15V supply volage in all experimens. Before you sar consrucing any circui on he prooboard, make sure ha he DC supply volage is properly decoupledwih an elecrolyic capaciorof a leas 10çF. Also, your firs sep in puing he circui ogeher on he prooboard should be o connec he DC supply pins (V CC and ground) and o place a ceramic decoupling capacior of a leas 0:1çF beween he supply pins. Errors in connecing he supply volages can easily lead o permanen damages o he ICs. Also, wihou proper DC volage decoupling, many seemingly well designed and correcly conneced circuis fail o operae properly..1 Monosable circui design and experimenal verificaion Design he monosable circui of Fig. 2 o produce he oupu pulse of duraion T w = 0çs, æ2%, for each shor rigger pulse. To verify operaion of he monosable, generae he rigger pulses from a laboraory pulse generaor. If necessary, i.e., if he lab signal generaor canno produce he required rigger pulses, use he circui you designed in he prelab problem #2. Verify he ampliude, he frequency and he pulse widh of he rigger signal before connecing he rigger pulses o he TRIGGER inpu of he monosable. You mus no apply a volage ouside he supplyvolage range (zero o V CC ) o any pin of he 555! 7

8 In he repor, show he circui diagram wih labeled componen names and values, ogeher wih a labeled oscilloscope plo ha verifies operaion of he monosable. Show waveforms of he TRIGGER inpu, he capacior volage, and he OUTPUT.Label he waveforms wih signal names,and significanvolage levels, and ime inervals. Measure and record he oupu pulse duraion, and he frequency of he rigger pulses used in he es. Correc he design if he error in he lengh of he oupu pulse is more han æ2%. Explain wha happens if anoher rigger pulse comes before he end of he oupu pulse. Show he same scope waveforms as above, and explain he resuls, if he frequency of he rigger pulses is 50kHz..2 Asable circui design and experimenal verificaion Design he asable circui of Fig. 5 o produce periodic oupu pulses wih frequency f p = 40kHz (æ2%), and wih he widh of he LOW oupu ha saisfies 0:5çs é L é 1çs. In his par, you should observe ha he acual f p is significanly lower ha he heoreical value from your paper design. Your ask is o invesigae and explain he source of he error. Hin: look a he volage waveform across he capacior. Why doesn i oscillae beween V L = V CC =andv H = 2V CC =? Correc he componen values o mee he specificaions. Show a complee circui diagram wih labeled componen names and values. Aach labeled scope waveforms of he capacior volage and he oupu. Measure and record he acual frequency f p and he widh L. Measure and record he acual frequency f p and he widh L for V CC = 10V and V CC = 5V. Can he design mee he specs for he range of supply volages beween 5V and 15V?. Design of a ouchone circui I is required o design a circui where pressing a pushbuon swich (or ouching a jumper wire on he prooboard) produces a 50kHz (æ5%) one (squarewave waveform wih 50 æ 1% duy raio, ( H = L, 1=è H L è=20khz) ha lass 0:1(æ5%) seconds. Show he complee circui diagram wih labeled componen names and values. Repor he resuls of experimenal verificaion of your design. Measure he acual one frequency, he acual duy raio, and he acual duraion of he one. 8

9 4 Prelab Assignmen The prelab assignmen is due in he lab on he day when you sar working on he experimen. 1. Derive expressions (11) and (12). 2. Suppose a signal generaor produces a squarewave signal of æ7:5v ampliude, and f = 10kHz frequency, as shown below. Using a resisor, a diode, and a capacior, and a V CC = 15V DC power supply, design a circui ha would produce oupu pulses as shown in he figure below. Find he capaciance and he resisance values. This circui can be used o generae he shor rigger pulses required in Secion.1 of he experimen. 7.5V from signal generaor 15V 7.5V 150.7V (approx) oupu 0V 2us (approx). Design he monosable circui of Fig. 2 o produce an oupu pulse of duraion T w for each shor rigger pulse, as specified in Secion.1. Show he circui diagram wih labeled componen names and values. Do a PSpice ransien simulaion o verify he design and aach he simulaion resuls (one page of waveforms). A 555 Spice model is available wih he evaluaion version of PSpice. This is a paper design for he experimenal ask described in Secion Design he asable circui of Fig. 5 o produce periodic oupu pulses wih frequency f p, and wih he widh of he LOW oupu L = 0:75çs, as specified in Secion.2. Show a complee circui diagram wih labeled componen names and values. Do a PSpice ransien simulaion o verify he design and aach he simulaion resuls (one page of waveforms). This is a paper design for he experimenal ask described in Secion Design he ouchone circui as specified in Secion.. Show a complee circui diagram wih labeled componen names and values. Make a copy of your prelab work so ha you can use i during he Lab session. 9