IR2110(S)/IR2113(S) & (PbF)

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1 Data Sheet No. PD6147 Rev.T Features Floating channel designed for bootstrap operation Fully operational to +5V or +6V Tolerant to negative transient voltage dv/dt immune Gate drive supply range from 1 to 2V Undervoltage lockout for both channels 3.3V logic compatible Separate logic supply range from 3.3V to 2V Logic and power ground ±5V offset CMOS Schmitt-triggered inputs with pull-down Cycle by cycle edge-triggered shutdown logic Matched propagation delay for both channels Outputs in phase with inputs Also available LEAD-FREE Description The IR211/IR2113 are high voltage, high speed power MOSFET and IGBT drivers with independent high and low side referenced output channels. Proprietary HVIC and latch immune CMOS technologies enable ruggedized monolithic construction. Logic inputs are compatible with standard CMOS or LSTTL output, down to 3.3V logic. The IR211(S)/IR2113(S) & (PbF) HIGH AND LOW SIDE DRIVER Product Summary V OFFSET (IR211) 5V max. (IR2113) 6V max. I O +/- 2A / 2A V OUT 1-2V t on/off (typ.) 12 & 94 ns Delay Matching (IR211) 1 ns max. (IR2113) 2ns max. Packages 14-Lead PDIP IR211/IR Lead SOIC IR211S/IR2113S output drivers feature a high pulse current buffer stage designed for minimum driver cross-conduction. Propagation delays are matched to simplify use in high frequency applications. The floating channel can be used to drive an N-channel power MOSFET or IGBT in the high side configuration which operates up to 5 or 6 volts. Typical Connection up to 5V or 6V V DD V DD V B HIN SD HIN SD V S TO LOAD LIN LIN V CC V SS V SS COM V CC LO (Refer to Lead Assignments for correct pin configuration). This/These diagram(s) show electrical connections only. Please refer to our Application Notes and DesignTips for proper circuit board layout. 1

2 IR211(S)/IR2113(S) & (PbF) Absolute Maximum Ratings Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured under board mounted and still air conditions. Additional information is shown in Figures 28 through 35. Symbol Definition Units V B High side floating supply voltage (IR211) (IR2113) V S High side floating supply offset voltage V B - 25 V B +.3 V High side floating output voltage V S -.3 V B +.3 V CC Low side fixed supply voltage V LO Low side output voltage -.3 V CC +.3 V DD Logic supply voltage -.3 V SS + 25 V SS Logic supply offset voltage V CC - 25 V CC +.3 V IN Logic input voltage (HIN, LIN & SD) V SS -.3 V DD +.3 dv s /dt Allowable offset supply voltage transient (figure 2) 5 V/ns P D Package power T A +25 C (14 lead DIP) 1.6 W (16 lead SOIC) 1.25 R THJA Thermal resistance, junction to ambient (14 lead DIP) 75 C/W (16 lead SOIC) 1 T J Junction temperature 15 T S Storage temperature T L Lead temperature (soldering, 1 seconds) 3 Recommended Operating Conditions The input/output logic timing diagram is shown in figure 1. For proper operation the device should be used within the recommended conditions. The VS and VSS offset ratings are tested with all supplies biased at 15V differential. Typical ratings at other bias conditions are shown in figures 36 and 37. Symbol Definition Units V B High side floating supply absolute voltage V S + 1 V S + 2 V S High side floating supply offset voltage (IR211) Note 1 5 (IR2113) Note 1 6 V C V High side floating output voltage V S V B V CC Low side fixed supply voltage 1 2 V LO Low side output voltage VCC V DD Logic supply voltage V SS + 3 V SS + 2 V SS Logic supply offset voltage -5 (Note 2) 5 V V IN Logic input voltage (HIN, LIN & SD) V SS V DD T A Ambient temperature -4 C Note 1: Logic operational for V S of -4 to +5V. Logic state held for V S of -4V to -V BS. (Please refer to the Design Tip DT97-3 for more details). Note 2: When V DD < 5V, the minimum V SS offset is limited to -V DD. 2

3 IR211(S)/IR2113(S) & (PbF) Dynamic Electrical Characteristics V BIAS (V CC, V BS, V DD ) = 15V, C L = 1 pf, T A = 25 C and V SS = COM unless otherwise specified. The dynamic electrical characteristics are measured using the test circuit shown in Figure 3. Symbol Definition Figure Units Test Conditions t on Turn-on propagation delay V S = V t off Turn-off propagation delay 8 94 V S = 5V/6V t sd Shutdown propagation delay V S = 5V/6V ns t r Turn-on rise time t f Turn-off fall time MT Delay matching, HS & LS (IR211) 1 turn-on/off (IR2113) 2 Static Electrical Characteristics V BIAS (V CC, V BS, V DD ) = 15V, T A = 25 C and V SS = COM unless otherwise specified. The V IN, V TH and I IN parameters are referenced to V SS and are applicable to all three logic input leads: HIN, LIN and SD. The V O and I O parameters are referenced to COM and are applicable to the respective output leads: or LO. Symbol Definition Figure Units Test Conditions V IH Logic 1 input voltage V IL Logic input voltage V OH High level output voltage, V BIAS - V O V I O = A V OL Low level output voltage, V O 15.1 I O = A I LK Offset supply leakage current 16 5 V B =V S = 5V/6V I QBS Quiescent V BS supply current V IN = V or V DD I QCC Quiescent V CC supply current V IN = V or V DD µa I QDD Quiescent V DD supply current V IN = V or V DD I IN+ Logic 1 input bias current V IN = V DD I IN- Logic input bias current V IN = V V BSUV+ V BS supply undervoltage positive going threshold V BSUV- V BS supply undervoltage negative going threshold V CCUV+ V CC supply undervoltage positive going threshold V V CCUV- V CC supply undervoltage negative going threshold I O+ Output high short circuit pulsed current V O = V, V IN = V DD PW 1 µs I O- Output low short circuit pulsed current A V O = 15V, V IN = V PW 1 µs 3

4 IR211(S)/IR2113(S) & (PbF) Functional Block Diagram V B V DD HIN R S Q V DD /V CC LEVEL SHIFT PULSE GEN HV LEVEL SHIFT UV DETECT PULSE FILTER R R S Q V S SD V CC LIN R S Q V DD /V CC LEVEL SHIFT UV DETECT DELAY LO V SS COM Lead Definitions Symbol Description V DD HIN SD LIN V SS V B V S V CC LO COM Logic supply Logic input for high side gate driver output (), in phase Logic input for shutdown Logic input for low side gate driver output (LO), in phase Logic ground High side floating supply High side gate drive output High side floating supply return Low side supply Low side gate drive output Low side return Lead Assignments 14 Lead PDIP 16 Lead SOIC (Wide Body) IR211/IR2113 IR211S/IR2113S 4

5 IR211(S)/IR2113(S) & (PbF) V =15V cc HV = 1 to 5V/6V 1 µf.1 µf KF6 1.1 µf OUTPUT MONITOR 1KF6 IRF82 2 µh 1KF6 + 1µF dv S >5 V/ns dt Figure 1. Input/Output Timing Diagram Figure 2. Floating Supply Voltage Transient Test Circuit V =15V cc HIN SD LIN 1 µf.1 µf C L C L.1 µf LO 1 µf V B + 15V - V S ( to 5V/6V) 1 µf HIN LIN LO t on 5% 5% t r t off t f 9% 9% 1% 1% Figure 3. Switching Time Test Circuit Figure 4. Switching Time Waveform Definition SD 5% HIN LIN 5% 5% LO LO t sd 9% MT 1% 9% MT LO Figure 5. Shutdown Waveform Definitions Figure 6. Delay Matching Waveform Definitions 5

6 IR211(S)/IR2113(S) & (PbF) Turn-On Delay Time (ns) 15 1 Turn-On Delay Time (ns) Figure 7A. Turn-On Time vs. Temperature VCC/VBS Supply Voltage (V) Figure 7B. Turn-On Time vs. VCC/VBS Supply Voltage Turn-On Delay Time (ns) Turn-Off Delay Time (ns) VDD Supply Voltage (V) Figure 7C. Turn-On Time vs. VDD Supply Voltage Figure 8A. Turn-Off Time vs. Temperature Turn-Off Delay Time (ns) Turn-Off Delay Time (ns) Typ VCC/VBS Supply Voltage (V) Figure 8B. Turn-Off Time vs. VCC/VBS Supply Voltage VDD Supply Voltage (V) Figure 8C. Turn-Off Time vs. VDD Supply Voltage 6

7 IR211(S)/IR2113(S) & (PbF) Shutdown Delay Time (ns) 15 1 Shutdown Delay time (ns) Figure 9A. Shutdown Time vs. Temperature VCC/VBS Supply Voltage (V) Figure 9B. Shutdown Time vs. VCC/VBS Supply Voltage 25 1 Shutdown Delay Time (ns) Typ Turn-On Rise Time (ns) VDD Supply Voltage (V) Figure 9C. Shutdown Time vs. VDD Supply Voltage Figure 1A. Turn-On Rise Time vs. Temperature Turn-On Rise Time (ns) 6 4 Turn-Off Fall Time (ns) VBIAS Supply Voltage (V) Figure 1B. Turn-On Rise Time vs. Voltage Figure 11A. Turn-Off Fall Time vs. Temperature 7

8 IR211(S)/IR2113(S) & (PbF) Turn-Off Fall Time (ns) Logic "1" Input Threshold (V) Max VBIAS Supply Voltage (V) Figure 11B. Turn-Off Fall Time vs. Voltage Figure 12A. Logic 1 Input Threshold vs. Temperature 15. Logic " 1" Input Threshold (V) Logic "" Input Threshold (V) VDD Logic Supply Voltage (V) Figure 12B. Logic 1 Input Threshold vs. Voltage Figure 13A. Logic Input Threshold vs. Temperature Logic "" Input Threshold (V) High Level Output Voltage (V) VDD Logic Supply Voltage (V) Figure 13B. Logic Input Threshold vs. Voltage Figure 14A. High Level Output vs. Temperature 8

9 IR211(S)/IR2113(S) & (PbF) High Level Output Voltage (V) Low Level Output Voltage (V) VBIAS Supply Voltage (V) Figure 14B. High Level Output vs. Voltage Figure 15A. Low Level Output vs. Temperature 1. 5 Low Level Output Voltage (V) Offset Supply Leakage Current (µa) VBIAS Supply Voltage (V) Figure 15B. Low Level Output vs. Voltage Figure 16A. Offset Supply Current vs. Temperature 5 5 Offset Supply Leakage Current (µa) VBS Supply Current (µa) IR211 IR2113 VB Boost Voltage (V) Figure 16B. Offset Supply Current vs. Voltage Figure 17A. VBS Supply Current vs. Temperature 9

10 IR211(S)/IR2113(S) & (PbF) VBS Supply Current (µa) VCC Supply Current (µa) VBS Floating Supply Voltage (V) Figure 17B. VBS Supply Current vs. Voltage Figure 18A. VCC Supply Current vs. Temperature VCC Supply Current (µa) VDD Supply Current (µa) VCC Fixed Supply Voltage (V) Figure 18B. VCC Supply Current vs. Voltage Figure 19A. VDD Supply Current vs. Temperature 6 1 VDD Supply Current (µa) VDD Logic Supply Voltage (V) Figure 19B. VDD Supply Current vs. VDD Voltage Logic "1" Input Bias Current (µa) Figure 2A. Logic 1 Input Current vs. Temperature 1

11 IR211(S)/IR2113(S) & (PbF) 6 5. Logic 1 Input Bias Current (µa) Logic "" Input Bias Current (µa) VDD Logic Supply Voltage (V) Figure 2B. Logic 1 Input Current vs. VDD Voltage Figure 21A. Logic Input Current vs. Temperature Logic Input Bias Current (µa) VDD Logic Supply Voltage (V) Figure 21B. Logic Input Current vs. VDD Voltage VBS Undervoltage Lockout + (V) Figure 22. VBS Undervoltage (+) vs. Temperature VBS Undervoltage Lockout - (V) VCC Undervoltage Lockout + (V) Figure 23. VBS Undervoltage (-) vs. Temperature Figure 24. VCC Undervoltage (+) vs. Temperature 11

12 IR211(S)/IR2113(S) & (PbF) VCC Undervoltage Lockout - (V) Output Source Current (A) Figure 25. VCC Undervoltage (-) vs. Temperature Figure 26A. Output Source Current vs. Temperature Output Source Current (A) Output Sink Current (A) VBIAS Supply Voltage (V) Figure 26B. Output Source Current vs. Voltage Figure 27A. Output Sink Current vs. Temperature V 4. Output Sink Current (A) Junction V 1V VBIAS Supply Voltage (V) Figure 27B. Output Sink Current vs. Voltage 1E+2 1E+3 1E+4 1E+5 1E+6 Frequency (Hz) Figure 28. IR211/IR2113 TJ vs. Frequency (IRFBC2) RGATE = 33Ω, VCC = 15V 12

13 IR211(S)/IR2113(S) & (PbF) 15 32V 15 32V 14V 14V Junction V Junction V E+2 1E+3 1E+4 1E+5 1E+6 Frequency (Hz) Figure 29. IR211/IT2113 TJ vs. Frequency (IRFBC3) RGATE = 22Ω, VCC = 15V 1E+2 1E+3 1E+4 1E+5 1E+6 Frequency (Hz) Figure 3. IR211/IR2113 TJ vs. Frequency (IRFBC4) RGATE = 15Ω, VCC = 15V 15 32V 14V 15 32V 14V Junction V Junction V E+2 1E+3 1E+4 1E+5 1E+6 Frequency (Hz) Figure 31. IR211/IR2113 TJ vs. Frequency (IRFPE5) RGATE = 1Ω, VCC = 15V 1E+2 1E+3 1E+4 1E+5 1E+6 Frequency (Hz) Figure 32. IR211S/IR2113S TJ vs. Frequency (IRFBC2) RGATE = 33Ω, VCC = 15V 15 32V 14V 15 32V 14V 1V Junction V Junction E+2 1E+3 1E+4 1E+5 1E+6 Frequency (Hz) Figure 33. IR211S/IR2113S TJ vs. Frequency (IRFBC3) RGATE = 22Ω, VCC = 15V 1E+2 1E+3 1E+4 1E+5 1E+6 Frequency (Hz) Figure 34. IR211S/IR2113S TJ vs. Frequency (IRFBC4) RGATE = 15Ω, VCC = 15V 13

14 IR211(S)/IR2113(S) & (PbF) 15 32V 14V 1V. -2. Junction VS Offset Supply Voltage (V) E+2 1E+3 1E+4 1E+5 1E+6 Frequency (Hz) Figure 35. IR211S/IR2113S TJ vs. Frequency (IRFPE5) RGATE = 1Ω, VCC = 15V VBS Floating Supply Voltage (V) Figure 36. Maximum VS Negative Offset vs. VBS Supply Voltage 2. VSS Logic Supply Offset Voltage (V) VCC Fixed Supply Voltage (V) Figure 37. Maximum VSS Positive Offset vs. VCC Supply Voltage 14

15 IR211(S)/IR2113(S) & (PbF) Case Outlines 14-Lead PDIP (MS-1AC) 16-Lead SOIC (wide body) (MS-13AA) 15

16 IR211(S)/IR2113(S) & (PbF) LEADFREE PART MARKING INFORMATION Part number IRxxxxxx Date code YWW? IR logo Pin 1 Identifier? MARKING CODE P Lead Free Released Non-Lead Free Released?XXXX Lot Code (Prod mode - 4 digit SPN code) Assembly site code Per SCOP 2-2 ORDER INFORMATION Basic Part (Non-Lead Free) 14-Lead IR211 order IR Lead IR2113 order IR Lead IR211S order IR211S 16-Lead IR2113S order IR2113S Leadfree Part 14-Lead IR211 order IR211PbF 14-Lead IR2113 order IR2113PbF 16-Lead IR211S order IR211SPbF 16-Lead IR2113S order IR2113SPbF IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 9245 Tel: (31) Data and specifications subject to change without notice. 3/23/

17 This datasheet has been download from: Datasheets for electronics components.

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