Monotonic, Inrush Current Limited Start-Up for Linear Regulators

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1 Applicaion epor SLA156 March 2004 Monoonic, Inrush urren Limied Sar-Up for Linear egulaors Jeff Falin PMP Porable Producs ABSA he oupu volage of a linear regulaor ends o rise quickly afer i is enabled. his ofen resuls in a nonmonoonic rise of he oupu volage (i.e., he oupu volage overshoos, hen dips), which can preclude proper operaion of he load circuiry. his applicaion repor addresses mehods o achieve a monoonic, inrush curren limied sar-up. he simplified block diagram of Figure 1 depics basic funcional blocks of a linear regulaor, consising of a reference, error amplifier, and pass elemen. Noe ha undervolage lockou (ULO) is no implemened in all linear regulaors. Figure 1. Simplified Block Diagram of a Linear egulaor A sar-up, he error amplifier senses ha he oupu volage is low and drives he pass elemen as hard as possible. Afer a shor delay, he pass elemen pulls a large inrush curren o charge he oupu capaciance and/or load abruply. he delay is caused by hree facors: he ime required for he inpu volage o rise above he ULO circuiry, if any; he ime required for he chip s inernal circuiry, paricularly he band-gap reference, o power up; and he ime required for he regulaor o sense is oupu volage and urn on he pass elemen (i.e., he feedback loop bandwidh). he size of he regulaor s oupu capaciance and he load resisance influences he sar-up response. If he regulaor sars up ino a large capaciive or small resisive load, he inrush curren is large, approaching he regulaor s curren limi in some cases. his applicaion repor discusses wo mehods of slew rae limiing a linear regulaor s oupu volage rise ime and, consequenly, limiing is inrush curren a sar-up, referred o as sof saring he regulaor. he PS796xx, high PS, low-noise family of regulaors, which are designed for approximaely 50-µs sar-up imes and hus large sar-up currens, are used as examples. 1

2 SLA156 Figures 2 and 3 show he simples sof-sar mehod in which a FE follows he regulaor s oupu. he and deermine he ramp ime, and provides a smooh, linear ramp of he oupu volage. A PMOS FE can be used when rying o sof sar volages ha are greaer han approximaely 1.5, given curren PMOS FE echnology. An NMOS FE can be used when rying o sof sar any volage, provided here is a conrol volage ha is abou 1 larger han he volage o be sof sared, given curren NMOS FE echnology. Figure 3 also shows how o provide he conrol volage using he PS supply volage supervisor () wih opendrain oupu. Figure 2. Sof Sar Using a PMOS FE Following he Oupu Noe ha he sof-saring FE mus be placed afer he regulaor s minimum required oupu capaciance ( OU ) in order o ensure ha he regulaor remains sable afer being enabled. Also, here mus be some capaciance, OU2, afer he swich ha is a leas an order of magniude larger han and. areful componen selecion is criical for proper operaion of he circui. Firs, he PMOS FE mus have a nominal hreshold volage ( H ) ha is less han he desired oupu volage (i.e., OU > H ) and he NMOS FE mus have a hreshold volage ha is less han he conrol volage ( NL ) minus he oupu volage ( NL O (LDO) > H ). Also, eiher FE s DS(on) mus be small enough so ha he drop across i due o he maximum D load curren does no significanly reduce he regulaed oupu volage. is seleced o be much larger he FE s inheren gae o drain capaciance ( > rss ). For he NMOS FE, he is spli, wih half going o O (LDO) and he oher half o ground. 2 o ground prevens he gae of he FE from charging up when O (LDO) urns on abruply. is seleced o be much larger han he gae o drain capaciance (i.e., >> ). is used primarily o preven a capaciive pah from O_LDO o OU and should be beween 10 Ω and 100 Ω. _PMOS and _NMOS are chosen using he following equaions: _ PMOS _ NMOS ( H (1) ( * )* NL H (2) * )* Where is he desired sof-sar ime, here 10 ms. hese equaions are derived in he appendix. 2 Monoonic, Inrush urren Limied Sar-Up for Linear egulaors

3 SLA156 Figure 3. Sof-Sar Using an NMOS FE Following he Oupu Being Driven by PS Figures 4 and 5 show he rise imes of he regulaor oupu volage wih and wihou he sof-sar circuiry for IN = 5.0 and I OU = 300 ma. he measured rise ime is 12 ms, slighly more han he desired 10 ms, bu wihin an accepable margin considering he variaion in Q1 s hreshold volage, H. he delay beween EN going high and OU ramping up is calculaed in he appendix as DELAY. Wih such a long sar-up delay, he variaion of hreshold volage of Q1, and hus he exac ime a which he swich urns on, can be negleced. Figure 4. esuls From PMOS FE Sof-Sar ircui Following he Oupu Monoonic, Inrush urren Limied Sar-Up for Linear egulaors 3

4 SLA156 Figure 5. esuls From NMOS FE Sof-Sar ircui Following he Oupu and P for NL One disadvanage o his mehod of sof saring is he difficuly in finding FEs wih low enough DS (on) no o affec regulaion under large load currens, or low enough hreshold volages for low oupu volages. he Si2333 PMOS FE s DS(on) is approximaely 59 mω a S = ; so, a 300-mA oupu curren, he oupu volage could be 18 m below he nominal volage, hus increasing he lower olerance limi of he regulaor soluion from -3% o -4%. he Si3460 NMOS FE s DS(on) is less han 30 mω a S = = 3.8 ; so, a 300-mA oupu curren, he oupu volage could be 9 m below he nominal volage, hus increasing he lower olerance limi of he regulaor soluion from -3% o -3.75%. he second mehod, shown in Figure 6, forces a volage on he feedback pin of he regulaor, hereby arificially changing he sar-up waveform. 4 Monoonic, Inrush urren Limied Sar-Up for Linear egulaors

5 SLA156 Figure 6. Sof-Sar ircui Using and Diode When he enable signal goes high, node charges o EN. Wih proper sizing of 1, he feedback node, FB, arificially rises above he regulaed inended feedback volage of 1.2 o FB2. FB2 is chosen o be a leas 200 m above he inended feedback volage bu less han a diode drop below EN. apacior hen discharges hrough and, as he feedback volage drops, he pass elemen slowly urns on and he oupu volage slowly rises. Diode D 2 keeps 1,, and ou of he feedback volage divider and herefore prevens any degradaion in oupu volage olerance or load ransien response afer sar-up. Diode D 1 clamps node o a diode drop below ground when EN is aken low and is opional. he following equaion deermines he appropriae size of 1 o raise node FB o FB2. min 0. 6 FB2 1 = IN (3) FB2 2 3 In his example, FB2 is = 1.4 and INmin is 3.3 ; so, he calculaed value of 1 is 9 kω. Once 1 is deermined, is seleced o be much smaller han 1 (roughly a facor of 10 or more, so ha i dominaes he ime consan), and hen can be sized o provide he appropriae rise ime. In his example, in order o ge a rise ime of 5 ms wih = 499 Ω, = 10 µf is required. Figure 7 shows he rise ime of he regulaor wih and wihou he addiional circuiry for IN = 3.3 and I OU = 300 ma. he measured rise ime is slighly below 4 ms. Monoonic, Inrush urren Limied Sar-Up for Linear egulaors 5

6 SLA156 EN ou w/o ou w/ Iou w/o Iou w/ Figure 7. ise ime of egulaor Wih and Wihou he Addiional ircuiry for IN = 3.3 and I OU = 300 ma he advanages of his mehod are simpliciy, cos, and isolaion from he regulaor afer sar-up due o diode D2 and due o he conrol volage no being a funcion of he oupu volage. he primary disadvanages are ha his circui requires he use of an adjusable regulaor, and i does no work wih some regulaors (see below). Some regulaors have exra feaures, like an inegraed or a fas ransien assis circuiry, ha require he oupu of he regulaor be biased above ground afer i is enabled. So, using his sof-sar mehod, he sar-up waveform could have an iniial jump up o 1.5 prior o he slow rise o he oupu volage. Eiher mehod limis he inrush curren and, hus, slows he ramp ime of he oupu of he linear regulaor. he firs mehod, which could heoreically be used wih any dc/dc converer, is bes suied for higher volage rails wih looser oupu volage olerances and fewer ransiens. he second mehod provides he bes performance because he addiional circuiry is effecively removed afer sar-up and hus affecs neiher load regulaion nor ransien response. he second mehod may also be effecive in increasing he sof-sar ime of a swicher wih fixed sof sar. However, he second mehod may no work wih all dc/dc converers, especially hose wih NMOS insead of PMOS differenial pair in he error amplifier, hose wih inegraed, digially conrolled sof-sar, or hose wih exra circuiry, such as fas ransien circuiry or inegraed, which is powered from he oupu volage. 6 Monoonic, Inrush urren Limied Sar-Up for Linear egulaors

7 Appendix A. PMOS FE and NMOS FE Swiching haracerisics he PMOS FE swiching characerisics are show in Figure A-1. SLA156 Figure A-1. PMOS Swiching haracerisics During region 1, e and I D So, d = - ln H During region 2, Where: H is he FE hreshold volage. PL = - I inrush H + gfmmax H for I inrush small. Monoonic, Inrush urren Limied Sar-Up for Linear egulaors 7

8 SLA156 Where: I d ( ) d = d ( ) d O( LDO) H O( LDO) = D is he desired profile for D = OU. hen, d I + I + I bu I = d d because d So, I + I ` + H = H = ( )( ) H he NMOS FE swiching characerisics are shown in Figure A-2, which follows. 8 Monoonic, Inrush urren Limied Sar-Up for Linear egulaors

9 SLA156 Figure A-2. NMOS Swiching haracerisics During region 2, d d I = = ( ) d d I + I NL d d NL ( ) + d d + NL Monoonic, Inrush urren Limied Sar-Up for Linear egulaors 9

10 SLA156 Bu, + = = + And we wan So, hen: OU = S H + d d OU H + H OU + H + H NL + + H NL Need: = d + Solve: = NL 1 e for d ln 1 H NL Bu for > 100 s, µ So, = NL H 10 Monoonic, Inrush urren Limied Sar-Up for Linear egulaors

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