03 Logic networks Gate-level design. Design metrics

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1 03 Logic networks Design metrics Design styles Examples Adders alessandro bogliolo isti information science and technology institute /8 Design metrics Area (A) Number of gates Number of -input NANDs Number of gates inputs Performance Propagation time (delay): pin-to-pin, overall (Tp) Contamination time: pin-to-pin, overall (Tc) Throughput (rate) Power Static (W) Dynamic (W) alessandro bogliolo isti information science and technology institute /8

2 Prop. and Cont. Time (ex) in out Tp A Out Out Tc A Out Out B B alessandro bogliolo isti information science and technology institute 3/8 Prop. and Cont. Time (ex) alessandro bogliolo isti information science and technology institute 4/8

3 Prop. and Cont. Time (ex3) alessandro bogliolo isti information science and technology institute 5/8 Prop. and Cont. Time (ex4) alessandro bogliolo isti information science and technology institute 6/8 3

4 Design approaches Logic synthesis: General Inefficient Non-scalable Example: Boolean functions of a few variables Top-down problem partitioning: Application-specific Modular Scalable Example: Arithmetic operators alessandro bogliolo isti information science and technology institute 7/8 T-D Example: Ripple-carry adder Functional specification: S=A+B alessandro bogliolo isti information science and technology institute 8/8 4

5 T-D Example: Full adder () Functional specification: Cin A B S Cout S = Cin' A' B + Cin' AB' + CinA' B' + CinAB S = Cin' ( A' B + AB') + Cin( A' B' + AB) S = Cin'( A B) + Cin( A B)' = Cin A B alessandro bogliolo isti information science and technology institute 9/8 T-D Example: Full adder () Functional specification: Cin A B S Cout Cout = Cin' AB + CinA' B + CinAB' + CinAB Cout = Cin' AB + Cin( A + B) Cout = Cin' AB + Cin( A + B + AB) Cout = AB + Cin( A + B) alessandro bogliolo isti information science and technology institute 0/8 5

6 T-D Example: Full adder (3) Putting it all together: S = Cin ( A B) Cout = AB + Cin( A + B) Cout = AB + Cin( A B + AB) Cout = AB + Cin( A B) Cout = (( AB)' + ( Cin( A B))')' alessandro bogliolo isti information science and technology institute /8 Adders. Ripple-Carry Adder (RCA). Synchronous RCA 3. Pipelined RCA 4. Bit-serial Adder 5. Carry-Lookahead Adder alessandro bogliolo isti information science and technology institute /8 6

7 Ripple-carry adder (RCAn) A(RCAn) = n A(FA) = O(n) Tp(RCAn) = n Tp(FA) = O(n) Tc(RCAn) = Tc(FA) = O() Rate(RCAn) < /Tp(RCAn) = O(/n) alessandro bogliolo isti information science and technology institute 3/8 Synchronous RCAn (SRCAn) A(SincRCAn) = na(fa) + n(n-)a(ff) = O(n ) Tp(SincRCAn) = ntclk > ntp(fa) = O(n) Tc(SincRCAn) = ntclk > ntp(fa) = O(n) Rate(SincRCAn) = /(ntclk) = O(/n) alessandro bogliolo isti information science and technology institute 4/8 7

8 Pipelined RCAn (PRCAn) A(PRCAn) = na(fa) + n(n-)a(ff) = O(n ) Tp(PRCAn) = ntclk > ntp(fa) = O(n) Tc(PRCAn) = ntclk > ntp(fa) = O(n) Rate(PRCAn) = /Tclk = O() alessandro bogliolo isti information science and technology institute 5/8 Bit-serial adder (BSAn) A(BSAn) = A(FA) + A(FF) = O() Tp(BSAn) = ntclk > ntp(fa) = O(n) Tc(BSAn) = Tclk > Tp(FA) = O() Rate(BSAn) = /(ntclk) = O(/n) alessandro bogliolo isti information science and technology institute 6/8 8

9 Carry Lookahead Adder (CLAn) Observations: c i = a i *b i + (a i +b i )c i- = g i + p i * c i- The first term generates the carry out (generate g i = a i *b i ) The second term propagates the carry (propagate p i = a i +b i ) Implementation: c i = g i + p i (g i- +p i- (g i- +p i- (... (g 0 +p 0 *Cin)...))) c i = g i + p i g i- +p i p i- g i- + p i p i- p i- g i p i p i- p i-...p 0 Cin () () (3) alessandro bogliolo isti information science and technology institute 7/8 Carry Lookahead Adder (CLAn) Unit delay model A(CLAn) = A(FA 0 )+ +A(FA n- ) = A(FA 0 )+ +O(n ) = O(n 3 ) Tp(CLAn) = Tp(FA) = O() Tc(CLAn) = Tc(FA 0 ) = O() Rate(CLAn) > /Tp(CLAn) = O() Gate delay proportional to the number of inputs A(CLAn) = A(FA 0 )+ +A(FA n- ) = A(FA 0 )+ +O(n ) = O(n 3 ) Tp(CLAn) = Tp(FA n- ) = O(n) Tc(CLAn) = Tc(FA 0 ) = O() Rate(CLAn) > /Tp(CLAn) = O(/n) Actual O(n) < A(CLAn) < O(n 3 ) O() < Tp(CLAn) < O(n) Tc(CLAn) = O() O(/n) < Rate(CLAn) < O() alessandro bogliolo isti information science and technology institute 8/8 9

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