Academic year: 2015/2016 Code: IES s ECTS credits: 6. Field of study: Electronics and Telecommunications Specialty: -

Transcription

1 Module name: Digital Electronics and Programmable Devices Academic year: 2015/2016 Code: IES s ECTS credits: 6 Faculty of: Computer Science, Electronics and Telecommunications Field of study: Electronics and Telecommunications Specialty: - Study level: First-cycle studies Form and type of study: - Lecture language: English Profile of education: Academic (A) Semester: 3 Course homepage: Responsible teacher: Academic teachers: Wiatr Kazimierz ([email protected]) Jamro Ernest ([email protected]) Wiatr Kazimierz ([email protected]) Wielgosz Maciej ([email protected]) Description of learning outcomes for module MLO code Student after module completion has the knowledge/ knows how to/is able to Connections with FLO Method of learning outcomes verification (form of completion) Social competence M_K001 Student is aware of the responsibility for their own work and willingness to comply with the principles of working in a team and bearing responsibility for cooperative tasks ES1A_K04 Involvement in teamwork Skills M_U001 Student can design, implement and test his own digital module. ES1A_U12, ES1A_U16, ES1A_U22 M_U002 Student can use the well-known methods, logical models and computer simulations for analysis and evaluation of the performance of digital electronic circuits ES1A_U07 M_U003 Student can develop documentation on the engineering projects and prepares a texts containing an overview of the project results ES1A_U03 M_U004 Student can compare the design of basic digital electronic systems and considering usability, power, speed, cost ES1A_U09, ES1A_U15 1 / 5

2 Knowledge M_W001 Student has knowledge of describing and analyzing the operation of basic logical functions; knows the hardware platform and tools to design and simulate digital circuits ES1A_W01, ES1A_W16 M_W002 Student has the ordered knowledge of propagation of digital signal, operation principles of digital electronic components; analog to digital, digital to analog converters ES1A_W05, ES1A_W12 M_W003 Student knows and understands principles of operation of complex digital components such as, memory, programmable devices, basic arithmetic modules ES1A_W05, ES1A_W12 FLO matrix in relation to forms of MLO code Student after module completion has the knowledge/ knows how to/is able to Form of Auditorium Laboratory Project Conversation seminar Seminar Practical Fieldwork Workshops Others E-learning Social competence M_K001 Skills M_U001 M_U002 M_U003 M_U004 Student is aware of the responsibility for their own work and willingness to comply with the principles of working in a team and bearing responsibility for cooperative tasks Student can design, implement and test his own digital module. Student can use the wellknown methods, logical models and computer simulations for analysis and evaluation of the performance of digital electronic circuits Student can develop documentation on the engineering projects and prepares a texts containing an overview of the project results Student can compare the design of basic digital electronic systems and considering usability, power, speed, cost / 5

3 Knowledge M_W001 M_W002 M_W003 Student has knowledge of describing and analyzing the operation of basic logical functions; knows the hardware platform and tools to design and simulate digital circuits Student has the ordered knowledge of propagation of digital signal, operation principles of digital electronic components; analog to digital, digital to analog converters Student knows and understands principles of operation of complex digital components such as, memory, programmable devices, basic arithmetic modules Module content This module is delivered as: lectures (45h), exercises (15h), laboratory (30h). 1.Propagation of digital signals in RLC network and transmission lines (3h) Response of RC network (differentiator and integrator, oscilloscope probe) and RLC network on step function and square wave. Response of transmission line on step function. Elimination of the reflections by proper termination of a transmission line in digital modules. 2.Boolean Algebra (3h) Boolean algebra (axioms, selected theorems and definitions), logical functions, canonical form of Boolean expressions, basic arithmetic operations, codes 3.Combinational circuits, gates (8h) Definition of combinational logic, gates (types, structure, technologies, parameters, characteristics, connection of gates constructed in different technologies). Logic simplifications methods: Karnaugh Map, Quina-McMcuskey a; hazards, multiplexers and demultiplexers. 4.Sequential circuits (10h) Sequential logic definition, types and parameters. Flip-flops, counters, registers, analysis of sequential logic, Moor and Mealy Finite State Machine (FSM), minimization of FSM, synchronous and asynchronous FSM, race condition, implementation of basic FSMs in the hardware description language, shift-registers. 5.Memory (4h) Memory types, structures and concept of operation: ROM/RAM, SRAM/DRAM. Typical read/write cycles for synchronous and asynchronous memories. Dual port memory, Specialized memories: FIFO (First-In First-Out), LUT (Look-Up Table). 6.Analog to Digital and Digital to Analog Converters (5h) Converters parameters. Structures and principle of operation for common converters: binary weighted DAC, R-2R (C-2C) ladder DAC, resistor string DAC, Flash 3 / 5

4 ADC, signle- dual-slop ADC, SAR ADC, Pulse-Width Modulation DAC, sigma-delta. 7.Programmable Devices (6h) Programmable Devices structure and principle of operation, PAL / GAL/ FPGA. Implementation of combinational and sequencial logic in FPGAs. Dedicated modules incorporated in FPGAs: LUT, dedicated adders and multipliers, different memory types. Auditorium Exercises: 1.Combinational circuit (4h) Boolean algebra functions, canonical form of Boolean functions, analysis of combinational circuits, minimization of Boolean functions, elimination of hazards in combinational circuits, designing of combinational and arithmetic circuits 2.Sequential circuits (9h) flip-flop (timing, converting flip-flops), analysis and synthesis of basic sequential circuits (simple counter example), synthesis of Moore and Mealy FSM minimization of FSM, the complete design of a sequential circuit 3.Test (2h) Laboratory Laboratory 1.Propagation of digital signals in RLC network and transmission lines (3h) Introduction to the laboratory: generators and oscilloscopes. Response of RC network (differentiator and integrator, oscilloscope probe) and RLC network on step function and square wave. Response of transmission line on step function for different loads, elimination of the reflections, measurement of characteristic impedance. 2.Gates and Flip-Flops (3h) Measurement of true table, excitation table basic gates and flip-flops. Measurement of static and dynamic parameters of gates and flip-flops 3.Introduction to Computer Design (6h) Editing digital circuit schematic: add elements such as gates, flip-flops and others, connecting elements using single lines and buses. Editing a hierarchical schematics. The schematic simulation: editing stimules, analysing simulation results. Synthesis and implementation on specific hardware platform elected designs. 4.Combinational logics (3h) Design, simulation and implementation in FPGA an arbitrary selected combination logic or arithmetic unit. 5.Counters and registers (3h) Design, simulation and implementation in FPGA an arbitrary selected counter or register. 6.Finite State Machne (FSM) (3h) Design, simulation and implementation in FPGA an arbitrary selected FSM. 7.Memory (3h) Design, simulation and implementation in FPGA an arbitrary selected memory unit. 8.AD DA converters (3h) The measurement of selected parameters of the DAC. Getting familiar with the principle of operation (timing waveforms) of PWM and Sigma-Delta converters. Method of calculating the final grade In order to obtain a positive final evaluation a positive mark of laboratory, exercises and exam must be obtained. The final mark is a weighted average of labaratory (40%), exercises (20%) and exam (40%). 4 / 5

5 The final mark OK is equal: OK= [average[ (rounded up to the nearest half degree) provided that student obtained all positive marks in the first term. OK= [average] (rounded down to the nearest half degree) provided that student obtained all positive marks in the second term. OK= 3.0 student obtained positive marks in the third term Prerequisites and additional requirements Non Recommended literature and teaching resources (English version) and other links given in the lectures. A. K. Maini, Digital Electronics, Principle, Devices and Applications, Wiley, Indie, 2007 F. Vahid Digital Design, USA, Wiley 2007 Scientific publications of module course instructors related to the topic of the module Additional scientific publications not specified Additional information None Student workload (ECTS credits balance) Student activity form Participation in lectures Realization of independently performed tasks Participation in laboratory Preparation for Preparation of a report, presentation, written work, etc. Participation in auditorium Summary student workload Module ECTS credits Student workload 42 h 45 h 28 h 30 h 15 h 14 h 174 h 6 ECTS 5 / 5