# A single register, called the accumulator, stores the. operand before the operation, and stores the result. Add y # add y from memory to the acc

Size: px
Start display at page:

Download "A single register, called the accumulator, stores the. operand before the operation, and stores the result. Add y # add y from memory to the acc"

## Transcription

1 Other architectures Example. Accumulator-based machines A single register, called the accumulator, stores the operand before the operation, and stores the result after the operation. Load x # into acc from memory Add y # add y from memory to the acc Store z # store acc to memory as z Can we have an instruction Add z, x, y # z:= x + y, (x, y, z in memory)? For some machines, YES, not in MIPS. MIPS is a load-store architecture. What is a load-store architecture?

2 Load-store architecture Only load and store instructions access the memory, all other instructions use registers as operands. What is the motivation? Primary motivation is speedup registers are faster. Reduced Instruction Set Computers (RISC) The instruction set has only a small number of frequently used instructions. This lowers processor cost, without much impact on performance. All instructions have the same length. Load-store architecture. Non-RISC machines are called CISC (Complex Instruction Set Computer). Example: Pentium

3 Another classification 3-address add r1, r2, r3 (r1 r2 + r3) 2-address add r1, r2 (r1 r1 + r2) 1-address add r1 (to the accumulator) 0-address or stack machines (see below) Example of stack architecture Push x x x x x * (y+z) Push y y y+z Push z z Add Multiply Pop z Computes z = x * (y + z)

4 Computer Arithmetic How to represent negative integers? The most widely used convention is 2 s complement representation. +14 = 0, = 1, Largest integer represented using n-bits is + 2 n-1-1 Smallest integer represented using n-bits is - 2 n-1 Review binary-to decimal and binary-to-hex conversions. Review BCD (Binary Coded Decimal) and ASCII codes. How to represent fractions?

5 Overflow +12 = 0, = 0, = 0, = 0, add add +14 = 0, ? = 1, Addition of a positive and a negative number does not lead to overflow. How to detect overflow? Some machines use the following instructions: Add the operands B (overflow) OVERFLOW #sets condition codes # conditional branch Z N V C Condition code register Not MIPS

6 Exceptions MIPS instructions that detect overflow cause an exception (also called an interrupt), and transfer control to a predefined address to invoke a routine for handling the exception. L: add \$t0, \$t1, \$t2 overflow! Return address (L+4) is saved in EPC Next instruction Exception handler routine Ra EPC jr ra Exceptions cause unscheduled procedure calls.

7 The following sequence of MIPS instructions can detect overflow in signed addition: addu \$t0, \$t1, \$t2 xor \$t3, \$t1, \$t2 # add but don t trap # check if signs differ slt \$t3, \$t3, \$zero # \$t3=1 if signs differ bne \$t3 \$zero, no_overflow xor \$t3, \$t0, \$t1 # sum sign = operand sign? slt \$t3, \$t3, \$zero # if not, then \$t3=1 bne \$t3, \$zero, overflow no_overflow: overflow:

8 More Programming Examples Copying a string a0 Each char is represented array x by an ASCII byte. In C, s0. a string is terminated by a 0 (Null in ASCII). s0 will hold the array index. a1 array y I O W A null add \$s0, \$zero, \$zero # i = 0 L1: add \$t1, \$a1, \$s0 # address of y[i] in t1 lb \$t2, 0(\$t1) add \$t3, \$a0, \$s0 sb \$t2, 0(\$t3) # t2 = y[i] # address of x[i] in t3 # x[i] = y[i] addi \$s0, \$s0, 1 # i = i+1 bne \$t2,\$zero, L1 # if y[i] 0 then goto L1

9 Loading a 32-bit constant into a register lui \$t0,255 (load upper-byte immediate) \$t addi \$t0, \$t0, 15, (add immediate), or ori \$t0, \$t0, 15 (or immediate) \$t This is how the la (pseudo-instruction) is implemented.

10 Example of shift instructions sll \$t2, \$s0, 8 # \$t2 = \$s0 << 8 bits (shift left logical) What is it used for? (shift right logical) What is it used for? Multiplication (or division) by 2 k Character manipulation etc.

11 Logic Design (Go to Appendix B) When you write add \$t0, \$t1, \$t2, you imagine something like this: \$t1 Adder \$t0 \$t2 What kind of hardware can ADD two binary integers? We need to understand about GATES and BOOLEAN ALGEBRA, that are foundations of logic design.

12 AND gate X Y X.Y X X.Y Y OR gate X Y X+Y X X+Y Y NOT gate X X 0 1 X X 1 0 Typically, logical 1 = +3.5 volt, and logical 0 = 0 volt. Other representations are possible.

13 Analysis of logical circuits X F Y What is the value of F when X=0 and Y=1? Draw a truth table. X Y F This is the exclusive or (XOR) function. In algebraic form F= X.Y + X.Y

14 More practice 1. Let A.B + A.C = 0. What are the values of A, B, C? 2. Let (A + B + C). (A + B + C) = 0. What are the possible values of A, B, C? Draw truth tables. Draw the logic circuits for the above two functions. A B C

15 Elementary Boolean Algebra A + A = 1 A. A = A = 1 1. A = A 0. A = A = A A + A = A A. A = A A. (B + C) = A.B + A.C Distributive Law A + B.C = (A+B). (A+C) A. B = A + B De Morgan s theorem A + B = A. B

16 Synthesis of logic circuits Many problems of logic design can be specified using a truth table. Give such a table, can you design the logic circuit? Design a logic circuit with three inputs A, B, C and one output F such that F=1 only when a majority of the inputs is equal to 1. A B C F Sum of product form F = A.B.C + A.B.C + A.B.C + A.B.C Draw a logic circuit to generate F

### Instruction Set Architecture. or How to talk to computers if you aren t in Star Trek

Instruction Set Architecture or How to talk to computers if you aren t in Star Trek The Instruction Set Architecture Application Compiler Instr. Set Proc. Operating System I/O system Instruction Set Architecture

### Understanding Logic Design

Understanding Logic Design ppendix of your Textbook does not have the needed background information. This document supplements it. When you write add DD R0, R1, R2, you imagine something like this: R1

### Instruction Set Architecture

Instruction Set Architecture Consider x := y+z. (x, y, z are memory variables) 1-address instructions 2-address instructions LOAD y (r :=y) ADD y,z (y := y+z) ADD z (r:=r+z) MOVE x,y (x := y) STORE x (x:=r)

### Reduced Instruction Set Computer (RISC)

Reduced Instruction Set Computer (RISC) Focuses on reducing the number and complexity of instructions of the ISA. RISC Goals RISC: Simplify ISA Simplify CPU Design Better CPU Performance Motivated by simplifying

### The string of digits 101101 in the binary number system represents the quantity

Data Representation Section 3.1 Data Types Registers contain either data or control information Control information is a bit or group of bits used to specify the sequence of command signals needed for

### Let s put together a Manual Processor

Lecture 14 Let s put together a Manual Processor Hardware Lecture 14 Slide 1 The processor Inside every computer there is at least one processor which can take an instruction, some operands and produce

### Chapter 4 Register Transfer and Microoperations. Section 4.1 Register Transfer Language

Chapter 4 Register Transfer and Microoperations Section 4.1 Register Transfer Language Digital systems are composed of modules that are constructed from digital components, such as registers, decoders,

### Boolean Algebra Part 1

Boolean Algebra Part 1 Page 1 Boolean Algebra Objectives Understand Basic Boolean Algebra Relate Boolean Algebra to Logic Networks Prove Laws using Truth Tables Understand and Use First Basic Theorems

### United States Naval Academy Electrical and Computer Engineering Department. EC262 Exam 1

United States Naval Academy Electrical and Computer Engineering Department EC262 Exam 29 September 2. Do a page check now. You should have pages (cover & questions). 2. Read all problems in their entirety.

### 1. True or False? A voltage level in the range 0 to 2 volts is interpreted as a binary 1.

File: chap04, Chapter 04 1. True or False? A voltage level in the range 0 to 2 volts is interpreted as a binary 1. 2. True or False? A gate is a device that accepts a single input signal and produces one

### Divide: Paper & Pencil. Computer Architecture ALU Design : Division and Floating Point. Divide algorithm. DIVIDE HARDWARE Version 1

Divide: Paper & Pencil Computer Architecture ALU Design : Division and Floating Point 1001 Quotient Divisor 1000 1001010 Dividend 1000 10 101 1010 1000 10 (or Modulo result) See how big a number can be

### Instruction Set Architecture (ISA)

Instruction Set Architecture (ISA) * Instruction set architecture of a machine fills the semantic gap between the user and the machine. * ISA serves as the starting point for the design of a new machine

### EC 362 Problem Set #2

EC 362 Problem Set #2 1) Using Single Precision IEEE 754, what is FF28 0000? 2) Suppose the fraction enhanced of a processor is 40% and the speedup of the enhancement was tenfold. What is the overall speedup?

### Exceptions in MIPS. know the exception mechanism in MIPS be able to write a simple exception handler for a MIPS machine

7 Objectives After completing this lab you will: know the exception mechanism in MIPS be able to write a simple exception handler for a MIPS machine Introduction Branches and jumps provide ways to change

### Chapter 2 Logic Gates and Introduction to Computer Architecture

Chapter 2 Logic Gates and Introduction to Computer Architecture 2.1 Introduction The basic components of an Integrated Circuit (IC) is logic gates which made of transistors, in digital system there are

### Advanced Computer Architecture-CS501. Computer Systems Design and Architecture 2.1, 2.2, 3.2

Lecture Handout Computer Architecture Lecture No. 2 Reading Material Vincent P. Heuring&Harry F. Jordan Chapter 2,Chapter3 Computer Systems Design and Architecture 2.1, 2.2, 3.2 Summary 1) A taxonomy of

### LSN 2 Computer Processors

LSN 2 Computer Processors Department of Engineering Technology LSN 2 Computer Processors Microprocessors Design Instruction set Processor organization Processor performance Bandwidth Clock speed LSN 2

### Solution for Homework 2

Solution for Homework 2 Problem 1 a. What is the minimum number of bits that are required to uniquely represent the characters of English alphabet? (Consider upper case characters alone) The number of

### Karnaugh Maps & Combinational Logic Design. ECE 152A Winter 2012

Karnaugh Maps & Combinational Logic Design ECE 52A Winter 22 Reading Assignment Brown and Vranesic 4 Optimized Implementation of Logic Functions 4. Karnaugh Map 4.2 Strategy for Minimization 4.2. Terminology

### COMP 303 MIPS Processor Design Project 4: MIPS Processor Due Date: 11 December 2009 23:59

COMP 303 MIPS Processor Design Project 4: MIPS Processor Due Date: 11 December 2009 23:59 Overview: In the first projects for COMP 303, you will design and implement a subset of the MIPS32 architecture

### Logic in Computer Science: Logic Gates

Logic in Computer Science: Logic Gates Lila Kari The University of Western Ontario Logic in Computer Science: Logic Gates CS2209, Applied Logic for Computer Science 1 / 49 Logic and bit operations Computers

### PROBLEMS (Cap. 4 - Istruzioni macchina)

98 CHAPTER 2 MACHINE INSTRUCTIONS AND PROGRAMS PROBLEMS (Cap. 4 - Istruzioni macchina) 2.1 Represent the decimal values 5, 2, 14, 10, 26, 19, 51, and 43, as signed, 7-bit numbers in the following binary

### İSTANBUL AYDIN UNIVERSITY

İSTANBUL AYDIN UNIVERSITY FACULTY OF ENGİNEERİNG SOFTWARE ENGINEERING THE PROJECT OF THE INSTRUCTION SET COMPUTER ORGANIZATION GÖZDE ARAS B1205.090015 Instructor: Prof. Dr. HASAN HÜSEYİN BALIK DECEMBER

### Unit 3 Boolean Algebra (Continued)

Unit 3 Boolean Algebra (Continued) 1. Exclusive-OR Operation 2. Consensus Theorem Department of Communication Engineering, NCTU 1 3.1 Multiplying Out and Factoring Expressions Department of Communication

### Introduction to MIPS Assembly Programming

1 / 26 Introduction to MIPS Assembly Programming January 23 25, 2013 2 / 26 Outline Overview of assembly programming MARS tutorial MIPS assembly syntax Role of pseudocode Some simple instructions Integer

### Digital Logic Design. Basics Combinational Circuits Sequential Circuits. Pu-Jen Cheng

Digital Logic Design Basics Combinational Circuits Sequential Circuits Pu-Jen Cheng Adapted from the slides prepared by S. Dandamudi for the book, Fundamentals of Computer Organization and Design. Introduction

### 1 Classical Universal Computer 3

Chapter 6: Machine Language and Assembler Christian Jacob 1 Classical Universal Computer 3 1.1 Von Neumann Architecture 3 1.2 CPU and RAM 5 1.3 Arithmetic Logical Unit (ALU) 6 1.4 Arithmetic Logical Unit

### Number Representation

Number Representation CS10001: Programming & Data Structures Pallab Dasgupta Professor, Dept. of Computer Sc. & Engg., Indian Institute of Technology Kharagpur Topics to be Discussed How are numeric data

### Chapter 5 Instructor's Manual

The Essentials of Computer Organization and Architecture Linda Null and Julia Lobur Jones and Bartlett Publishers, 2003 Chapter 5 Instructor's Manual Chapter Objectives Chapter 5, A Closer Look at Instruction

### MACHINE INSTRUCTIONS AND PROGRAMS

CHAPTER 2 MACHINE INSTRUCTIONS AND PROGRAMS CHAPTER OBJECTIVES In this chapter you will learn about: Machine instructions and program execution, including branching and subroutine call and return operations

### Stack machines The MIPS assembly language A simple source language Stack-machine implementation of the simple language Readings: 9.1-9.

Code Generation I Stack machines The MIPS assembly language A simple source language Stack-machine implementation of the simple language Readings: 9.1-9.7 Stack Machines A simple evaluation model No variables

### Combinational circuits

Combinational circuits Combinational circuits are stateless The outputs are functions only of the inputs Inputs Combinational circuit Outputs 3 Thursday, September 2, 3 Enabler Circuit (High-level view)

### Chapter 2 Topics. 2.1 Classification of Computers & Instructions 2.2 Classes of Instruction Sets 2.3 Informal Description of Simple RISC Computer, SRC

Chapter 2 Topics 2.1 Classification of Computers & Instructions 2.2 Classes of Instruction Sets 2.3 Informal Description of Simple RISC Computer, SRC See Appendix C for Assembly language information. 2.4

### exclusive-or and Binary Adder R eouven Elbaz reouven@uwaterloo.ca Office room: DC3576

exclusive-or and Binary Adder R eouven Elbaz reouven@uwaterloo.ca Office room: DC3576 Outline exclusive OR gate (XOR) Definition Properties Examples of Applications Odd Function Parity Generation and Checking

### HOMEWORK # 2 SOLUTIO

HOMEWORK # 2 SOLUTIO Problem 1 (2 points) a. There are 313 characters in the Tamil language. If every character is to be encoded into a unique bit pattern, what is the minimum number of bits required to

### Translating C code to MIPS

Translating C code to MIPS why do it C is relatively simple, close to the machine C can act as pseudocode for assembler program gives some insight into what compiler needs to do what's under the hood do

### Bachelors of Computer Application Programming Principle & Algorithm (BCA-S102T)

Unit- I Introduction to c Language: C is a general-purpose computer programming language developed between 1969 and 1973 by Dennis Ritchie at the Bell Telephone Laboratories for use with the Unix operating

### Instruction Set Design

Instruction Set Design Instruction Set Architecture: to what purpose? ISA provides the level of abstraction between the software and the hardware One of the most important abstraction in CS It s narrow,

### To convert an arbitrary power of 2 into its English equivalent, remember the rules of exponential arithmetic:

Binary Numbers In computer science we deal almost exclusively with binary numbers. it will be very helpful to memorize some binary constants and their decimal and English equivalents. By English equivalents

### Lecture 8: Binary Multiplication & Division

Lecture 8: Binary Multiplication & Division Today s topics: Addition/Subtraction Multiplication Division Reminder: get started early on assignment 3 1 2 s Complement Signed Numbers two = 0 ten 0001 two

### Computer Science 281 Binary and Hexadecimal Review

Computer Science 281 Binary and Hexadecimal Review 1 The Binary Number System Computers store everything, both instructions and data, by using many, many transistors, each of which can be in one of two

### 5 Combinatorial Components. 5.0 Full adder. Full subtractor

5 Combatorial Components Use for data transformation, manipulation, terconnection, and for control: arithmetic operations - addition, subtraction, multiplication and division. logic operations - AND, OR,

### CSI 333 Lecture 1 Number Systems

CSI 333 Lecture 1 Number Systems 1 1 / 23 Basics of Number Systems Ref: Appendix C of Deitel & Deitel. Weighted Positional Notation: 192 = 2 10 0 + 9 10 1 + 1 10 2 General: Digit sequence : d n 1 d n 2...

### Systems I: Computer Organization and Architecture

Systems I: Computer Organization and Architecture Lecture 2: Number Systems and Arithmetic Number Systems - Base The number system that we use is base : 734 = + 7 + 3 + 4 = x + 7x + 3x + 4x = x 3 + 7x

### EE 261 Introduction to Logic Circuits. Module #2 Number Systems

EE 261 Introduction to Logic Circuits Module #2 Number Systems Topics A. Number System Formation B. Base Conversions C. Binary Arithmetic D. Signed Numbers E. Signed Arithmetic F. Binary Codes Textbook

### 10CS35: Data Structures Using C

CS35: Data Structures Using C QUESTION BANK REVIEW OF STRUCTURES AND POINTERS, INTRODUCTION TO SPECIAL FEATURES OF C OBJECTIVE: Learn : Usage of structures, unions - a conventional tool for handling a

### Today. Binary addition Representing negative numbers. Andrew H. Fagg: Embedded Real- Time Systems: Binary Arithmetic

Today Binary addition Representing negative numbers 2 Binary Addition Consider the following binary numbers: 0 0 1 0 0 1 1 0 0 0 1 0 1 0 1 1 How do we add these numbers? 3 Binary Addition 0 0 1 0 0 1 1

### Oct: 50 8 = 6 (r = 2) 6 8 = 0 (r = 6) Writing the remainders in reverse order we get: (50) 10 = (62) 8

ECE Department Summer LECTURE #5: Number Systems EEL : Digital Logic and Computer Systems Based on lecture notes by Dr. Eric M. Schwartz Decimal Number System: -Our standard number system is base, also

### Digital Design. Assoc. Prof. Dr. Berna Örs Yalçın

Digital Design Assoc. Prof. Dr. Berna Örs Yalçın Istanbul Technical University Faculty of Electrical and Electronics Engineering Office Number: 2318 E-mail: siddika.ors@itu.edu.tr Grading 1st Midterm -

### COMPUTER SCIENCE 1999 (Delhi Board)

COMPUTER SCIENCE 1999 (Delhi Board) Time allowed: 3 hours Max. Marks: 70 Instructions: (i) All the questions are compulsory. (ii) Programming Language: C++ QUESTION l. (a) Why main function is special?

### plc numbers - 13.1 Encoded values; BCD and ASCII Error detection; parity, gray code and checksums

plc numbers - 3. Topics: Number bases; binary, octal, decimal, hexadecimal Binary calculations; s compliments, addition, subtraction and Boolean operations Encoded values; BCD and ASCII Error detection;

### CPU Organization and Assembly Language

COS 140 Foundations of Computer Science School of Computing and Information Science University of Maine October 2, 2015 Outline 1 2 3 4 5 6 7 8 Homework and announcements Reading: Chapter 12 Homework:

### CHAPTER 3 Boolean Algebra and Digital Logic

CHAPTER 3 Boolean Algebra and Digital Logic 3.1 Introduction 121 3.2 Boolean Algebra 122 3.2.1 Boolean Expressions 123 3.2.2 Boolean Identities 124 3.2.3 Simplification of Boolean Expressions 126 3.2.4

### DNA Data and Program Representation. Alexandre David 1.2.05 adavid@cs.aau.dk

DNA Data and Program Representation Alexandre David 1.2.05 adavid@cs.aau.dk Introduction Very important to understand how data is represented. operations limits precision Digital logic built on 2-valued

### PART B QUESTIONS AND ANSWERS UNIT I

PART B QUESTIONS AND ANSWERS UNIT I 1. Explain the architecture of 8085 microprocessor? Logic pin out of 8085 microprocessor Address bus: unidirectional bus, used as high order bus Data bus: bi-directional

### MIPS Assembler and Simulator

MIPS Assembler and Simulator Reference Manual Last Updated, December 1, 2005 Xavier Perséguers (ing. info. dipl. EPF) Swiss Federal Institude of Technology xavier.perseguers@a3.epfl.ch Preface MIPS Assembler

### 1. Convert the following base 10 numbers into 8-bit 2 s complement notation 0, -1, -12

C5 Solutions 1. Convert the following base 10 numbers into 8-bit 2 s complement notation 0, -1, -12 To Compute 0 0 = 00000000 To Compute 1 Step 1. Convert 1 to binary 00000001 Step 2. Flip the bits 11111110

### Intel 8086 architecture

Intel 8086 architecture Today we ll take a look at Intel s 8086, which is one of the oldest and yet most prevalent processor architectures around. We ll make many comparisons between the MIPS and 8086

### Gates, Circuits, and Boolean Algebra

Gates, Circuits, and Boolean Algebra Computers and Electricity A gate is a device that performs a basic operation on electrical signals Gates are combined into circuits to perform more complicated tasks

### Binary Division. Decimal Division. Hardware for Binary Division. Simple 16-bit Divider Circuit

Decimal Division Remember 4th grade long division? 43 // quotient 12 521 // divisor dividend -480 41-36 5 // remainder Shift divisor left (multiply by 10) until MSB lines up with dividend s Repeat until

### Systems I: Computer Organization and Architecture

Systems I: Computer Organization and Architecture Lecture 9 - Register Transfer and Microoperations Microoperations Digital systems are modular in nature, with modules containing registers, decoders, arithmetic

### 2011, The McGraw-Hill Companies, Inc. Chapter 3

Chapter 3 3.1 Decimal System The radix or base of a number system determines the total number of different symbols or digits used by that system. The decimal system has a base of 10 with the digits 0 through

### SECTION C [short essay] [Not to exceed 120 words, Answer any SIX questions. Each question carries FOUR marks] 6 x 4=24 marks

UNIVERSITY OF KERALA First Degree Programme in Computer Applications Model Question Paper Semester I Course Code- CP 1121 Introduction to Computer Science TIME : 3 hrs Maximum Mark: 80 SECTION A [Very

### Levent EREN levent.eren@ieu.edu.tr A-306 Office Phone:488-9882 INTRODUCTION TO DIGITAL LOGIC

Levent EREN levent.eren@ieu.edu.tr A-306 Office Phone:488-9882 1 Number Systems Representation Positive radix, positional number systems A number with radix r is represented by a string of digits: A n

### Today s topics. Digital Computers. More on binary. Binary Digits (Bits)

Today s topics! Binary Numbers! Brookshear.-.! Slides from Prof. Marti Hearst of UC Berkeley SIMS! Upcoming! Networks Interactive Introduction to Graph Theory http://www.utm.edu/cgi-bin/caldwell/tutor/departments/math/graph/intro

### Sistemas Digitais I LESI - 2º ano

Sistemas Digitais I LESI - 2º ano Lesson 6 - Combinational Design Practices Prof. João Miguel Fernandes (miguel@di.uminho.pt) Dept. Informática UNIVERSIDADE DO MINHO ESCOLA DE ENGENHARIA - PLDs (1) - The

### B.Sc.(Computer Science) and. B.Sc.(IT) Effective From July 2011

NEW Detailed Syllabus of B.Sc.(Computer Science) and B.Sc.(IT) Effective From July 2011 SEMESTER SYSTEM Scheme & Syllabus for B.Sc. (CS) Pass and Hons. Course Effective from July 2011 and onwards CLASS

### CDA 3200 Digital Systems. Instructor: Dr. Janusz Zalewski Developed by: Dr. Dahai Guo Spring 2012

CDA 3200 Digital Systems Instructor: Dr. Janusz Zalewski Developed by: Dr. Dahai Guo Spring 2012 Outline Data Representation Binary Codes Why 6-3-1-1 and Excess-3? Data Representation (1/2) Each numbering

### FORDHAM UNIVERSITY CISC 3593. Dept. of Computer and Info. Science Spring, 2011. Lab 2. The Full-Adder

FORDHAM UNIVERSITY CISC 3593 Fordham College Lincoln Center Computer Organization Dept. of Computer and Info. Science Spring, 2011 Lab 2 The Full-Adder 1 Introduction In this lab, the student will construct

### Z80 Instruction Set. Z80 Assembly Language

75 Z80 Assembly Language The assembly language allows the user to write a program without concern for memory addresses or machine instruction formats. It uses symbolic addresses to identify memory locations

### 150127-Microprocessor & Assembly Language

Chapter 3 Z80 Microprocessor Architecture The Z 80 is one of the most talented 8 bit microprocessors, and many microprocessor-based systems are designed around the Z80. The Z80 microprocessor needs an

### Overview. CISC Developments. RISC Designs. CISC Designs. VAX: Addressing Modes. Digital VAX

Overview CISC Developments Over Twenty Years Classic CISC design: Digital VAX VAXÕs RISC successor: PRISM/Alpha IntelÕs ubiquitous 80x86 architecture Ð 8086 through the Pentium Pro (P6) RJS 2/3/97 Philosophy

### Logic Reference Guide

Logic eference Guide Advanced Micro evices INTOUCTION Throughout this data book and design guide we have assumed that you have a good working knowledge of logic. Unfortunately, there always comes a time

### Typy danych. Data types: Literals:

Lab 10 MIPS32 Typy danych Data types: Instructions are all 32 bits byte(8 bits), halfword (2 bytes), word (4 bytes) a character requires 1 byte of storage an integer requires 1 word (4 bytes) of storage

### Chapter 7D The Java Virtual Machine

This sub chapter discusses another architecture, that of the JVM (Java Virtual Machine). In general, a VM (Virtual Machine) is a hypothetical machine (implemented in either hardware or software) that directly

### 18-447 Computer Architecture Lecture 3: ISA Tradeoffs. Prof. Onur Mutlu Carnegie Mellon University Spring 2013, 1/18/2013

18-447 Computer Architecture Lecture 3: ISA Tradeoffs Prof. Onur Mutlu Carnegie Mellon University Spring 2013, 1/18/2013 Reminder: Homeworks for Next Two Weeks Homework 0 Due next Wednesday (Jan 23), right

### EE361: Digital Computer Organization Course Syllabus

EE361: Digital Computer Organization Course Syllabus Dr. Mohammad H. Awedh Spring 2014 Course Objectives Simply, a computer is a set of components (Processor, Memory and Storage, Input/Output Devices)

### Digital System Design Prof. D Roychoudhry Department of Computer Science and Engineering Indian Institute of Technology, Kharagpur

Digital System Design Prof. D Roychoudhry Department of Computer Science and Engineering Indian Institute of Technology, Kharagpur Lecture - 04 Digital Logic II May, I before starting the today s lecture

### a storage location directly on the CPU, used for temporary storage of small amounts of data during processing.

CS143 Handout 18 Summer 2008 30 July, 2008 Processor Architectures Handout written by Maggie Johnson and revised by Julie Zelenski. Architecture Vocabulary Let s review a few relevant hardware definitions:

### Chapter 2 Basic Structure of Computers. Jin-Fu Li Department of Electrical Engineering National Central University Jungli, Taiwan

Chapter 2 Basic Structure of Computers Jin-Fu Li Department of Electrical Engineering National Central University Jungli, Taiwan Outline Functional Units Basic Operational Concepts Bus Structures Software

### 2) Write in detail the issues in the design of code generator.

COMPUTER SCIENCE AND ENGINEERING VI SEM CSE Principles of Compiler Design Unit-IV Question and answers UNIT IV CODE GENERATION 9 Issues in the design of code generator The target machine Runtime Storage

### Chapter 5, The Instruction Set Architecture Level

Chapter 5, The Instruction Set Architecture Level 5.1 Overview Of The ISA Level 5.2 Data Types 5.3 Instruction Formats 5.4 Addressing 5.5 Instruction Types 5.6 Flow Of Control 5.7 A Detailed Example: The

### Discrete Structures. Rajmohan Rajaraman Eric Ropiak Chris Burrows Ravi Sundaram

Discrete Structures Harriet Fell Javed A. Aslam Rajmohan Rajaraman Eric Ropiak Chris Burrows Ravi Sundaram Discrete Structures Version 2.1 Harriet Fell Javed A. Aslam Rajmohan Rajaraman Eric Ropiak Chris

### Lecture 2. Binary and Hexadecimal Numbers

Lecture 2 Binary and Hexadecimal Numbers Purpose: Review binary and hexadecimal number representations Convert directly from one base to another base Review addition and subtraction in binary representations

### CSE 141 Introduction to Computer Architecture Summer Session I, 2005. Lecture 1 Introduction. Pramod V. Argade June 27, 2005

CSE 141 Introduction to Computer Architecture Summer Session I, 2005 Lecture 1 Introduction Pramod V. Argade June 27, 2005 CSE141: Introduction to Computer Architecture Instructor: Pramod V. Argade (p2argade@cs.ucsd.edu)

### Design and Development of Virtual Instrument (VI) Modules for an Introductory Digital Logic Course

Session ENG 206-6 Design and Development of Virtual Instrument (VI) Modules for an Introductory Digital Logic Course Nikunja Swain, Ph.D., PE South Carolina State University swain@scsu.edu Raghu Korrapati,

### Computer Architecture Lecture 2: Instruction Set Principles (Appendix A) Chih Wei Liu 劉 志 尉 National Chiao Tung University cwliu@twins.ee.nctu.edu.

Computer Architecture Lecture 2: Instruction Set Principles (Appendix A) Chih Wei Liu 劉 志 尉 National Chiao Tung University cwliu@twins.ee.nctu.edu.tw Review Computers in mid 50 s Hardware was expensive

### Microprocessor and Microcontroller Architecture

Microprocessor and Microcontroller Architecture 1 Von Neumann Architecture Stored-Program Digital Computer Digital computation in ALU Programmable via set of standard instructions input memory output Internal

### COMBINATIONAL CIRCUITS

COMBINATIONAL CIRCUITS http://www.tutorialspoint.com/computer_logical_organization/combinational_circuits.htm Copyright tutorialspoint.com Combinational circuit is a circuit in which we combine the different

### Q. Consider a dynamic instruction execution (an execution trace, in other words) that consists of repeats of code in this pattern:

Pipelining HW Q. Can a MIPS SW instruction executing in a simple 5-stage pipelined implementation have a data dependency hazard of any type resulting in a nop bubble? If so, show an example; if not, prove

### Computer Organization

Computer Organization and Architecture Designing for Performance Ninth Edition William Stallings International Edition contributions by R. Mohan National Institute of Technology, Tiruchirappalli PEARSON

### Winter 2002 MID-SESSION TEST Friday, March 1 6:30 to 8:00pm

University of Calgary Department of Electrical and Computer Engineering ENCM 369: Computer Organization Instructors: Dr. S. A. Norman (L01) and Dr. S. Yanushkevich (L02) Winter 2002 MID-SESSION TEST Friday,

### MICROPROCESSOR AND MICROCOMPUTER BASICS

Introduction MICROPROCESSOR AND MICROCOMPUTER BASICS At present there are many types and sizes of computers available. These computers are designed and constructed based on digital and Integrated Circuit

### An Introduction to Assembly Programming with the ARM 32-bit Processor Family

An Introduction to Assembly Programming with the ARM 32-bit Processor Family G. Agosta Politecnico di Milano December 3, 2011 Contents 1 Introduction 1 1.1 Prerequisites............................. 2

### 3.Basic Gate Combinations

3.Basic Gate Combinations 3.1 TTL NAND Gate In logic circuits transistors play the role of switches. For those in the TTL gate the conducting state (on) occurs when the baseemmiter signal is high, and

### CHAPTER 7: The CPU and Memory

CHAPTER 7: The CPU and Memory The Architecture of Computer Hardware, Systems Software & Networking: An Information Technology Approach 4th Edition, Irv Englander John Wiley and Sons 2010 PowerPoint slides