ANALOG I/O. Open Loop Control. Closed Loop Control. Converter (DAC) Digital to Analog Converter (Analog Output) Operational Amplifier

Transcription

1 ANALOG I/O Inerfacing wih he analog world. Open Loop Conrol EG Speed conrol of moor Topics: Open and Closed Loop Conrol o Converer Operaional Amplifier o Conversion Nyquis Sampling Theorem µp Parallel I/O o Driver Moor No Feedback o Processor o confirm ha moor is running a righ speed 1 Closed Loop Conrol o Converer () µp Parallel I/O o Driver Moor Imporan Componen of Compuer Sysem I/O: also forms he basis for mos o Converers o Condi ioning Tacho Generaor 3 Binary sae of digial inpu conrols a se of solidsae swiches ha allow curren o flow hru a bank of binary weighed resisors Operaional amplifier acs as a buffer beween he weighed resisor bank and he circui being driven on he oupu of he o Converer ( Oupu) Operaional Amplifier Basic building block for analog compuers MSB F 8 LSB Oupu Invering s NonInvering Oupu IDEALLY: Typical 1 Infinie Gain ~ 10 6 Infinie Impedance ~ 0 MΩ 5 6 1

2 Op Amp used as Invering Amplifier V i G Negaive Feedback Negaive Feedback provides a means of conrolling he gain of an operaional amplifier f Where: G Gain V i Volage Oupu Volage Then: = G V i Oupu volage canno be greaer han supply volage V s, which is ofen symmeric i.e. 5V and 5V Oupu will be linear beween V s and V s The inpu impedance is high, and inpu volage is virually V i i * 1) Invering inpu is a 0 Vols since gain is infinie Wih negaive feedback, he amplifier oupu always akes on a value o drive he inpu back o zero ) The curren flowing ino he amplifier is zero: * Virual Earh Gain wih Negaive Feedback V i f i f i i i * * Virual Earh i 3 3 VB 3 i VB F i 1 1 VB 1 i 0 0 VB 0 Oupu Volage a invering inpu is zero: 1 i i = V i / i (Ohm's law) i f = / f (Ohm's law) 3 i i i f = 0 (Kirchhoff's curren law) Subsiuing 1 and ino 3 gives: V i / i = / f ie G = / V i = f / i (he acual gain of he circui) 9 Consider he inpu currens: i 3 i i 1 i 0 i f = 0 ie VB 3 / 3 VB / VB 1 / 1 VB 0 / 0 = / f or = f (VB 3 / 3 VB / VB 1 / 1 VB 0 / 0 ) 10 (coninued) = f (VB 3 / 3 VB / VB 1 / 1 VB 0 / 0 ) Oupu from a Le k = (3k) f where k [0, 3] eg if for one paricular inpu condiion VB k = V ref = 5 Vols (ie inpu is binary 1111) hen = 5 x 15 / 8 Vols /8 Vol seps "Quanisaion Error" Binary eg for inpu 0011 > = 5 x 3 / 8 Vols ie The circui behaves as a digial o analog converer 11 o Conversion: FAST < 1 µsecond CHEAP ~$5 1

3 Binary Weighed esisor Nework (Disadvanages) o Converer ( ) esisors mus be in accurae binary raios Very difficul o produce resisors wih a wide range of values and o a grea accuracy µp Parallel I/O o Driver Moor This prevens he use of Binary weighed resisor neworks in pracical circuis. Insead an resisor "ladder" is used ha is composed of only resisors of wo values, one being wice he oher. o Condi ioning Tacho Generaor 13 1 ADC Mehods Techniques for convering analog signals o digial signals include: 1 COUNTE AMP SUCCESSIVE APPOXIMATION 3 FLASH (or Parallel) Oupu Couner amp ADC Sar Finished Couner Clock Clock & Conrol Clear Comparaor V > V > 1 V < V > Couner amp Timing Couner amp Operaion STAT FINISHED Clock 1 Conversion requesed by signalling STAT Couner cleared and Clock enabled 3 Sysem couns up unil O/P > I/P Clock disabled and FINISHED signalled 5 oupu read by hos Advanages: Simple Hardware > Cheap Oupu 17 Disadvanages: Time O( n ) for nbi converer (wors case) Slow: a 10 MHz 8bi akes 5.6 µs (wors case) ie sample rae of ~0,000 conversions per second 18 3

4 Successive Approximaion ADC Oupu Sar Finished Clock B 3 B B 1 B 0 Clock & Conrol Clear Comparaor V > V > 1 V < V > 0 egiser 19 Successive Approximaion ADC Operaion 1 STAT clears oupu regiser MSB of regiser se o 1 (O/P of is half full scale) 3 IF Comparaor O/P = 0 (ie > ) THEN leave regiser bi = 1 ELSE regiser bi = 0 epea seps and 3 for each nex mos significan bi unil all he bis of he regiser have been esed. 5 FINISHED 0 Successive Approximaion ADC Cond. MSB LSB Convered Value Advanages: FAST Time ~ O(n) for n bi converer Disadvanages: may no be fas enough for some applicaions 1 n Comparaors FLASH (Parallel) ADC Vref = V 3 V V V 0 V o line Prioriy Encoder 5V I3 I I1 I0 Overflow B 1 B 0 Oupu Prioriy Encoder: Binary oupu is he number corresponding o he mos significan inpu ha is se high Flash ADC Operaion Flash ADC Characerisics (Vols) V ref 3V ref V ref V ref I 3 I I 1 I 0 B 1 B 0 Overflow VEY FAST: Time O(1). Time delays are due o propagaion hrough comparaors and prioriy encoder, here is no cycling or looping o ge he convered resul Typical Time for conversion < 10 ns ie conversion rae: > 100 MHz Cos: High. Large gae coun n comparaors (speed is bough by hrowing hardware a he problem) Typical Device: 8bi 10 ns and coss ~$0 Typical Applicaions: Video, Sonar, adar, High speed signal processing

5 o Conversion The process of convering an analog signal ino a numeric represenaion in a compuer inroduces wo sources of possible errors: Ampliude Quanisaion Quanised 0111 q 1 AMPLITUDE QUANTISATION. signal is represened in digial by a number wih a finie word lengh (number of bis). The range of ampliudes is quanised ino small seps SAMPLING The analog signal has o be sampled a discree ime inervals usually uniformly. 5 ADC Error q/ q/ 6 Quanisaion Error SAMPLING Quanised = Noise xq() = x() e() Under cerain reasonable condiions (eg all inpu analog volages are equally likely) he error erm has he following properies: An analog signal is sampled a discree ime inervals hen sored as a sequence of numbers in he memory of a µcompuer. e() is zero mean ie is average value is zero e() has variance (Mean Square) q / 1 Suiable value for q is o make i equal o he Variance of he noise presen in he analog signal BEFOE digiisaion 7 τ? HOW OFTEN TO SAMPLE? 8 Nyquis Sampling Theorem f sample > f max An analog signal can be compleely reconsruced if i is sampled a a uniform rae greaer han wice he highes frequency componen of he original signal. econsrucion fsample > fsignal_max

6 f sample = f max f sample < f max econsrucion econsrucion 31 3 Aliasing Aliasing occurs when Nyquis's crierion is NOT me: ie when f sample < f max Conen Typical Specrum of and Noise We can only represen signals in he range: 0 o f sample Any frequencies above f sample / become "aliased" back ino he frequencies 0 o f sample / The aliased componens corrup he represenaion of he signal ONCE THE SIGNAL IS SAMPLED ANY ALIASING CANNOT BE UNDONE 33 0 fsample/ Noise fsample frequency Noise over Nyquis limi (f sample /) is aliased back ino he range of frequencies conaining he signal unless we filer i ou before convering o digial form. 3 Processing (concep) Summary Ampliude Filer PassBand Filer Noise fsample/ Frequency Filer allows signal hrough and only ha par of he noise wihin he passband of he filer ges hrough. Open and Closed Loop Conrol o Converer Operaional Amplifier Virual Earh Gain and Negaive Feedback o Converer Couneramp Successive Approximaion Flash Ampliude Quanisaion Error Sampling rae Nyquis & Aliasing