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1 EN: This Datasheet is presented by the m anufacturer. Please v isit our website for pricing and availability at ore.hu.

2 Single-Channel: 6N7, HCPL-6, HCPL-6 Dual-Channel: HCPL-6, HCPL-6 High Speed- MBit/s Logic Gate Optocouplers Features Very high speed- MBit/s Superior CMR- kv/µs Double working voltage-4v Fan-out of over -4 C to +5 C Logic gate output Strobable output Wired OR-open collector U.L. recognized (File # E97) Applications Ground loop elimination LSTTL to TTL, LSTTL or 5-volt CMOS Line receiver, data transmission Data multiplexing Switching power supplies Pulse transformer replacement Computer-peripheral interface Package Truth Table (Positive Logic) Description July 6 The 6N7, HCPL-6/6 single-channel and HCPL-6/ 6 dual-channel optocouplers consist of a 5 nm AlGaAS LED, optically coupled to a very high speed integrated photodetector logic gate with a strobable output. This output features an open collector, thereby permitting wired OR outputs. The coupled parameters are guaranteed over the temperature range of -4 C to +5 C. A maximum input signal of 5 ma will provide a minimum output sink current of ma (fan out of ). An internal noise shield provides superior common mode rejection of typically kv/µs. The HCPL- 6 and HCPL- 6 has a minimum CMR of 5 kv/µs. The HCPL-6 has a minimum CMR of kv/µs. Schematic N/C A.µF bypass capacitor must be connected between pins and 5. (See note ) + V F _ N/C 4 5 GND 6N7 HCPL-6 HCPL V CC V E V O + V F V F 7 V 6 V GND HCPL-6 HCPL-6 Input Enable Output H H L L H H H L H L L H H NC L L NC H V CC tm 5 Fairchild Semiconductor Corporation

3 Absolute Maximum Ratings (T A = 5 C unless otherwise specified) Parameter Symbol Value Units Storage Temperature T STG -55 to +5 C Operating Temperature T OPR -4 to +5 C Lead Solder Temperature T SOL 6 for sec C EMITTER DC/Average Forward Single Channel I F 5 ma Input Current Dual Channel (Each Channel) Enable Input Voltage Not to exceed V CC by more than 5 mv Recommended Operating Conditions Single Channel V E 5.5 V Reverse Input Voltage Each Channel V R 5. V Power Dissipation Single Channel P I mw DETECTOR Supply Voltage Dual Channel (Each Channel) 45 V CC ( minute max) 7. V Output Current Single Channel I O 5 ma Dual Channel (Each Channel) 5 Output Voltage Each Channel V O 7. V Collector Output Single Channel P O 5 mw Power Dissipation Dual Channel (Each Channel) 6 Parameter Symbol Min Max Units Input Current, Low Level I FL 5 µa Input Current, High Level I FH *6. 5 ma Supply Voltage, Output V CC V Enable Voltage, Low Level V EL. V Enable Voltage, High Level V EH. V CC V Low Level Supply Current T A C Fan Out (TTL load) N *6.mA is a guard banded value which allows for at least % CTR degradation. Initial input current threshold value is 5. ma or less.

4 Electrical Characteristics (T A = to 7 C Unless otherwise specified) Individual Component Characteristics Parameter Test Conditions Symbol Min Typ** Max Unit EMITTER (I F = ma) V F. V Input Forward Voltage T A = 5 C.4.75 Input Reverse Breakdown Voltage (I R = µa) B VR 5. V Input Capacitance (V F =, f = MHz) C IN 6 pf Input Diode Temperature Coefficient (I F = ma) V F / T A -.4 mv/ C DETECTOR High Level Supply Current Single Channel (V CC = 5.5 V, I F = ma) I CCH 7 ma Dual Channel (V E =.5V) 5 Low Level Supply Current Single Channel (V CC = 5.5 V, I F = ma) I CCL 9 ma Dual Channel (V E =.5V) 4 Low Level Enable Current (V CC = 5.5 V, V E =.5V) I EL ma High Level Enable Current (V CC = 5.5 V, V E =.V) I EH ma High Level Enable Voltage (V CC = 5.5 V, I F = ma) V EH. V Low Level Enable Voltage (V CC = 5.5 V, I F = ma)(note ) V EL. V Switching Characteristics (T A = -4 C to +5 C, V CC = 5 V, I F = 7.5 ma Unless otherwise specified) AC Characteristics Test Conditions Symbol Min Typ** Max Unit Propagation Delay Time to Output High Level Propagation Delay Time to Output Low Level (Note 4) (T A = 5 C) T PLH ns (R L = 5Ω, C L = 5 pf) (Fig. ) (Note 5) (T A = 5 C) T PHL ns (R L = 5Ω, C L = 5 pf) (Fig. ) Pulse Width Distortion (R L = 5Ω, C L = 5 pf) (Fig. ) T PHL - T PLH Output Rise Time (-9%) Output Rise Time (9-%) Enable Propagation Delay Time to Output High Level Enable Propagation Delay Time to Output Low Level Common Mode Transient Immunity (at Output High Level) Common Mode Transient Immunity (at Output Low Level) 6N7, HCPL-6 HCPL-6, HCPL-6 (R L = 5Ω, C L = 5 pf) (Note 6) (Fig. ) (R L = 5Ω, C L = 5 pf) (Note 7) (Fig. ) (I F = 7.5 ma, V EH =.5 V) (R L = 5Ω, C L = 5 pf) (Note ) (Fig. ) (I F = 7.5 ma, V EH =.5 V) (R L = 5Ω, C L = 5 pf) (Note 9) (Fig. ) (T A = 5 C) V CM = 5V, (Peak) (I F = ma, V OH (Min.) =.V) 5 ns t r 5 ns t f ns t ELH ns t EHL ns CM H (R L = 5Ω) (Note ) (Fig. 4) 5,, HCPL-6 V CM = 4V, 5, V/µs (R L = 5Ω) (I F = 7.5 ma, V OL (Max.) =.V CM L, V/µs 6N7, HCPL-6 V CM = 5V (Peak) HCPL-6, HCPL-6 (T A = 5 C)(Note )(Fig. 4) 5, HCPL-6(T A = 5 C) V CM = 4V, 5,

5 Transfer Characteristics (T A = -4 to +5 C Unless otherwise specified) DC Characteristics Test Conditions Symbol Min Typ** Max Unit High Level Output Current (V CC = 5.5 V, V O = 5.5 V) (I F = 5 µa, V E =. V) (Note ) Low Level Output Current Isolation Characteristics (T A = -4 C to +5 C Unless otherwise specified.) ** All Typicals at V CC = 5V, T A = 5 C (V CC = 5.5 V, I F = 5 ma) (V E =. V, I CL = ma) (Note ) Input Threshold Current (V CC = 5.5 V, V O =.6 V, V E =. V, I OL = ma) I OH µa V OL.5.6 V I FT 5 ma Characteristics Test Conditions Symbol Min Typ** Max Unit Input-Output Insulation Leakage Current Withstand Insulation Test Voltage (Relative humidity = 45%) (T A = 5 C, t = 5 s) (V I-O = VDC) (Note ) (RH < 5%, T A = 5 C) (I I-O µa) (Note ) ( t = min.) I I-O.* µa V ISO 5 V RMS Resistance (Input to Output) (V I-O = 5 V) (Note ) R I-O Ω Capacitance (Input to Output) (f = MHz) (Note ) C I-O.6 pf NOTES. The V CC supply to each optoisolator must be bypassed by a.µf capacitor or larger. This can be either a ceramic or solid tantalum capacitor with good high frequency characteristic and should be connected as close as possible to the package V CC and GND pins of each device.. Each channel.. Enable Input - No pull up resistor required as the device has an internal pull up resistor. 4. t PLH -Propagation delay is measured from the.75 ma level on the HIGH to LOW transition of the input current pulse to the.5 V level on the LOW to HIGH transition of the output voltage pulse. 5. t PHL -Propagation delay is measured from the.75 ma level on the LOW to HIGH transition of the input current pulse to the.5 V level on the HIGH to LOW transition of the output voltage pulse. 6. t r -Rise time is measured from the 9% to the % levels on the LOW to HIGH transition of the output pulse. 7. t f -Fall time is measured from the % to the 9% levels on the HIGH to LOW transition of the output pulse.. t ELH -Enable input propagation delay is measured from the.5 V level on the HIGH to LOW transition of the input voltage pulse to the.5 V level on the LOW to HIGH transition of the output voltage pulse. 9. t EHL -Enable input propagation delay is measured from the.5 V level on the LOW to HIGH transition of the input voltage pulse to the.5 V level on the HIGH to LOW transition of the output voltage pulse.. CM H -The maximum tolerable rate of rise of the common mode voltage to ensure the output will remain in the high state (i.e., V OUT >. V). Measured in volts per microsecond (V/µs).. CM L -The maximum tolerable rate of rise of the common mode voltage to ensure the output will remain in the low output state (i.e., V OUT <. V). Measured in volts per microsecond (V/µs).. Device considered a two-terminal device: Pins,, and 4 shorted together, and Pins 5,6,7 and shorted together. 4

6 VOL - Low Level Output Voltage (V) TP - Propagation Delay (ns) IFT - Input Threshold Current (ma) Fig. Low Level Output Voltage vs. Ambient Temperature I OL = 6 ma I OL = 9.6 ma. I OL = 6.4 ma Conditions: I F = 5 ma V E = V V CC = 5.5V V CC = 5 V Conditions: V CC = 5. V V O =.6 V I OL =. ma T A - Ambient Temperature ( C) Fig. Switching Time vs. Forward Current R L = 5 Ω (T PLH ) I F - Forward Current (ma) Fig. 5 Input Threshold Current vs. Ambient Temperature R L = 5 R L = kω R L = 4 kω (T PLH ) R L = kω R L = 4 kω (T PHL ) R L = 5 kω R L = 4kΩ T A - Ambient Temperature ( C) R L = kω (T PLH ) IF - Forward Current (ma) IOL - Low Level Output Current (ma) VO - Output Voltage (V) Fig. 4 Low Level Output Current vs. Ambient Temperature I F = 5 ma I F = ma I F = 5 ma T A - Ambient Temperature ( C) Fig. 6 Output Voltage vs. Input Forward Current R L =4kΩ Fig. Input Diode Forward Voltage vs. Forward Current V F - Forward Voltage (V) R L = 5Ω R L = kω I F - Forward Current (ma) Conditions: V CC = 5 V V E = V V OL =.6 V

7 IOH - High Level Output Current (µa) TE - Enable Propagation Delay (ns) PWD - Pulse Width Distortion (ns) Fig. 7 Pulse Width Distortion vs. Temperature Conditions: I F = 7.5 ma VCC = 5 V RL = kω RL = 4 kω RL = 5Ω T A - Temperature ( C) Fig. 9 Enable Propagation Delay vs. Temperature RL = 4 kω (TELH) RL = kω (TELH) RL = 5Ω (TELH) RL = 5Ω RL = kω (TEHL) RL = 4 kω T A - Temperature ( C) 5 5 TP - Propagation Delay (ns) Tr/Tf - Rise and Fall Time (ns) Conditions: IF = 7.5 ma VCC = 5 V T A - Temperature ( C) Fig. Rise and Fall Time vs. Temperature RL = kω (tr) R L = 4 kω (tr) T A - Temperature ( C) RL = kω RL = 4 kω TPHL RL = 5Ω Fig. High Level Output Current vs. Temperature 6 4 T A - Temperature ( C) RL = 5Ω (tr) RL = kω RL = 4 kω RL = 5Ω Fig. Switching Time vs. Temperature Conditions: V CC = 5.5 V V O = 5.5 V V E =. V I F = 5 µa RL = kω TPLH RL = 4 kω TPLH RL = 5Ω TPLH (tf) 6

8 Input Monitor (I F) Pulse Generator tr = 5ns Z O= 5Ω 47 Pulse Generator tr = 5ns Z O= 5Ω 7.5 ma 4 GND 5 4 V CC V CC GND µf bypass R L C L +5V Output (V ) O +5V Input (I F) t PHL Output (V O) Output (V ) O Fig. Test Circuit and Waveforms for t PLH, t PHL, t r and t f. Input Monitor (V E). µf bypass R L C L Output (V O) Input (V ) E tehl Output (V O) Fig. Test Circuit t EHL and t ELH. tf 9% % t PLH t ELH tr I F = 7.5 ma I =.75 ma F.5 V. V.5 V.5 V 7

9 VCM V 5V VO VO.5 V V FF B A I F 4 Peak V CC GND V CM Pulse Gen Switching Pos. (A), I = F V (Min) O V O (Max). µf bypass Switching Pos. (B), I = 7.5 ma F 5Ω +5V Output (V O) Fig. 4 Test Circuit Common Mode Transient Immunity CM H CM L

10 SEATING PLANE Package Dimensions (Through Hole). (5.).4 (.55). (.56).6 (.4) (9.9).7 (9.4). (.54) TYP PIN ID..7 (6.6).5 (6.5).7 (.7).45 (.4).54 (.9). (.5). (.5) MIN.6 (.4). (.) NOTE All dimensions are in inches (millimeters) 5 MAX. (7.6) TYP Package Dimensions (.4"Lead Spacing) SEATING PLANE. (5.).4 (.55). (.56).6 (.4) (9.9).7 (9.4). (.54) TYP PIN ID..7 (6.6).5 (6.5).7 (.7).45 (.4).54 (.9). (.5).4 (.) MIN.6 (.4). (.) to 5.4 (.6) TYP Package Dimensions (Surface Mount) 4.9 (9.9).7 (9.4) (.54) TYP Lead Coplanarity :.4 (.) MAX.7 (6.6).5 (6.5).7 (.7).45 (.4). (.56).6 (.4) PIN ID.. (.5) MIN. (7.6) TYP.45 [.4].5 (.) MIN.45 (.) MIN.6 (.4). (.) Recommended Pad Layout for Surface Mount Leadform.45 (.54).95 (7.49). (.54).7 (.7).6 (.5). (.76) 9

11 Ordering Information Option Example Part Number Description S 6N7S Surface Mount Lead Bend SD 6N7SD Surface Mount; Tape and reel W 6N7W.4" Lead Spacing V 6N7V VDE4 WV 6N7WV VDE4;.4 lead spacing SV 6N7SV VDE4; surface mount SDV 6N7SDV VDE4; surface mount; tape and reel QT Carrier Tape Specifications ( D Taping Orientation). ±. 4.9 ±. 4. ±. Ø.55 ±.5. ±.5 4. ±..75 ±. 7.5 ±.. ±. 6. ±.. MAX. ±.. ±. Ø.6 ±. User Direction of Feed

12 Marking Information Reflow Profile Definitions Temperature ( C) Fairchild logo Device number 4 5 VDE mark (Note: Only appears on parts ordered with VDE option See order entry table) 4 Two digit year code, e.g., 5 Two digit work week ranging from to 5 6 Assembly package code V 5 C peak XX Ramp up = C/sec Time (Minute) YY 6 T 5 C, s Time above C, 6 5 sec Peak reflow temperature: 5C (package surface temperature) Time of temperature higher than C for 6 5 seconds One time soldering reflow is recommended 6

13 TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACEx ActiveArray Bottomless Build it Now CoolFET CROSSVOLT DOME EcoSPARK E CMOS EnSigna FACT FAST FASTr FPS FRFET FACT Quiet Series GlobalOptoisolator GTO HiSeC I C i-lo ImpliedDisconnect IntelliMAX ISOPLANAR LittleFET MICROCOUPLER MicroFET MicroPak MICROWIRE MSX MSXPro Across the board. Around the world. The Power Franchise Programmable Active Droop DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD S WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE PRODUCTS. LIFE SUPPORT POLICY FAIRCHILD S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein:. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms OCX OCXPro OPTOLOGIC OPTOPLANAR PACMAN POP Power47 PowerEdge PowerSaver PowerTrench QFET QS QT Optoelectronics Quiet Series RapidConfigure RapidConnect µserdes ScalarPump SILENT SWITCHER SMART START SPM Stealth SuperFET SuperSOT - SuperSOT -6 SuperSOT - SyncFET TCM TinyBoost TinyBuck TinyPWM TinyPower TinyLogic TINYOPTO TruTranslation UHC. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. Datasheet Identification Product Status Definition UniFET UltraFET VCX Wire Advance Information Formative or In Design This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. Preliminary First Production This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design. No Identification Needed Full Production This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design. Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. Rev. I