MM74C150 MM82C19 16-Line to 1-Line Multiplexer 3-STATE 16-Line to 1-Line Multiplexer
|
|
|
- Patrick Wiggins
- 5 years ago
- Views:
Transcription
1 MM74C150 MM82C19 16-Line to 1-Line Multiplexer 3-STATE 16-Line to 1-Line Multiplexer General Description The MM74C150 and MM82C19 multiplex 16 digital lines to 1 output. A 4-bit address code determines the particular 1- of-16 inputs which is routed to the output. The data is inverted from input to output. A strobe override places the output of MM74C150 in the logical 1 state and the output of MM82C19 in the highimpedance state. Ordering Code: Connection Diagram October 1987 Revised January 1999 All inputs are protected from damage due to static discharge by diode clamps to V CC and GND. Features Pin Assignments for DIP Wide supply voltage range: 3.0V to 15V Guaranteed noise margin: 1.0V High noise immunity: 0.45 V CC (typ.) TTL compatibility: Drive 1 TTL Load Order Number Package Number Package Description MM74C150N N24A 24-Lead plastic Dual-In-Line Package (PDIP), JEDEC MS-010, Wide MM82C19N N24A 24-Lead plastic Dual-In-Line Package (PDIP), JEDEC MS-010, Wide MM74C150 MM82C19 16-Line to 1-Line Multiplexer 3-STATE 16-Line to 1-Line Multiplexer 1999 Fairchild Semiconductor Corporation DS prf
2 MM74C150 MM82C19 Truth Table MM74C150 Inputs Output D C B A STROBE E0 E1 E2 E3 E4 E5 E6 E7 E8 E9 E10 E11 E12 E13 E14 E15 W X X X X 1 X X X X X X X X X X X X X X X X 1 (Note 1) X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X 0 X X X X X X X X X X X X X X X 1 X X X X X X X X X X X X X X X X 0 X X X X X X X X X X X X X X X 1 X X X X X X X X X X X X X X X X 0 X X X X X X X X X X X X X X X 1 X X X X X X X X X X X X X X X X 0 X X X X X X X X X X X X X X X 1 X X X X X X X X X X X X X X X X 0 X X X X X X X X X X X X X X X 1 X X X X X X X X X X X X X X X X 0 X X X X X X X X X X X X X X X 1 X X X X X X X X X X X X X X X X 0 X X X X X X X X X X X X X X X 1 X X X X X X X X X X X X X X X X 0 X X X X X X X X X X X X X X X 1 X X X X X X X X X X X X X X X X 0 X X X X X X X X X X X X X X X 1 X X X X X X X X X X X X X X X X 0 X X X X X X X X X X X X X X X 1 X X X X X X X X X X X X X X X X 0 X X X X X X X X X X X X X X X 1 X X X X X X X X X X X X X X X X 0 X X X X X X X X X X X X X X X 1 X X X X X X X X X X X X X X X X 0 X X X X X X X X X X X X X X X 1 X X X X X X X X X X X X X X X X 0 X X X X X X X X X X X X X X X 1 X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X 1 0 Note 1: For MM72C19/MM82C19 this would be Hi-Z, everything else is the same. 2
3 Logic Diagrams MM74C150 MM74C150 MM82C19 3
4 MM74C150 MM82C19 Logic Diagrams (Continued) MM82C19 4
5 Absolute Maximum Ratings(Note 2) Voltage at Any Pin Operating Temperature Range Storage Temperature Range Power Dissipation Dual-In-Line Small Outline Operating V CC Range DC Electrical Characteristics 0.3V to V CC +0.3V 40 C to +85 C 65 C to +150 C 700 mw 500 mw 3.0V to 15V Min/Max limits apply across temperature range unless otherwise noted. V CC 18V Lead Temperature (soldering, 10 seconds) 260 C Note 2: Absolute Maximum Ratings are those values beyond which the safety of the device cannot be guaranteed. Except for Operating Temperature Range they are not meant to imply that the devices should be operated at these limits. The Electrical Characteristic table provides conditions for actual device operation. Symbol Parameter Conditions Min Typ Max Units CMOS to CMOS V IN(1) Logical 1 Input Voltage V CC = 5.0V 3.5 V V CC = 10V 8.0 V V IN(0) Logical 0 Input Voltage V CC = 5.0V 1.5 V V CC = 10V 2.0 V V OUT(1) Logical 1 Output Voltage V CC = 5.0V, I O = 10 µa 4.5 V V CC = 10V, I O = 10 µa 9.0 V V OUT(0) Logical 0 Output Voltage V CC = 5.0V, I O = +10 µa 0.5 V V CC = 10V, I O = +10 µa 1.0 V I IN(1) Logical 1 Input Current V CC = 15V, V IN = 15V V I IN(0) Logical 0 Input Current V CC = 15V, V IN = 0V µa I OZ Output Current in High Impedance State MM82C19 V CC = 15V, V O = 15V µa V CC = 15V, V O = 0V µa I CC Supply Current V CC = 15V µa CMOS/LPTTL Interface V IN(1) Logical 1 Input Voltage 74C, 82C, V CC = 4.75V V CC 1.5 V V IN(0) Logical 0 Input Voltage 74C, 82C, V CC = 4.75V 0.8 V V OUT(1) Logical 1 Output Voltage 74C, 82C, V CC = 4.75V, I O = 1.6 ma 2.4 V V OUT(0) Logical 0 Output Voltage 74C, 82C, V CC = 4.75V, I O = 1.6 ma 0.4 V Output Drive (Short Circuit Current) I SOURCE Output Source Current V CC = 5.0V, V OUT = 0V, T A = 25 C ma (P-Channel) I SOURCE Output Source Current V CC = 10V, V OUT = 0V, T A = 25 C ma (P-Channel) I SINK Output Sink Current V CC = 5.0V, V OUT = V CC, T A = 25 C ma (N-Channel) I SINK Output Sink Current V CC = 10V, V OUT = V CC, T A = 25 C ma (N-Channel) MM74C150 MM82C19 5
6 MM74C150 MM82C19 AC Electrical Characteristics (Note 3) T A = 25 C, C L = 50 pf, unless otherwise noted Symbol Parameter Conditions Min Typ Max Units t pd0, t pd1 Propagation Delay Time to a V CC = 5.0V ns Logical 0 or Logical 1 V CC = 10V ns from Data Inputs to Output V CC = 5.0V, C L = 150 pf ns V CC = 10V, C L = 150 pf ns t pd0, t pd1 Propagation Delay Time to a V CC = 5.0V ns Logical 0 or Logical 1 V CC = 10V ns from Data Select Inputs to Output t pd0, t pd1 Propagation Delay Time to a V CC = 5.0V ns Logical 0 or Logical 1 V CC = 10V ns from Strobe to Output MM74C150 t 1H, t 0H Delay from Strobe to High V CC = 5.0V, R L = 10k, C L = 5 pf ns Impedance State V CC = 10V, R L = 10k, C L = 5 pf ns MM82C19 t H1, t H0 Delay from Strobe to Logical V CC = 5.0V, R L = 10k, C L = 5 pf ns 1 Level or to Logical 0 V CC = 10V, R L = 10k, C L = 5 pf ns Level (from High Impedance State) MM82C19 C IN Input Capacitance Any Input (Note 4) 5.0 pf C OUT Output Capacitance (Note 4) 11.0 pf MM82C19 C PD Power Dissipation Capacitance (Note 5) 100 pf Note 3: AC Parameters are guaranteed by DC correlated testing. Note 4: Capacitance is guaranteed by periodic testing. Note 5: C PD determines the no load AC power consumption of any CMOS device. For complete explanation, see Family Characteristics, application note AN
7 Switching Time Waveforms CMOS to CMOS MM74C150 MM82C19 t 1H and t H1 t 1H t H1 t 0H and t H0 t 0H t H0 Note: Delays measured with input t r, t f 20 ns. 7
8 MM74C150 MM82C19 16-Line to 1-Line Multiplexer 3-STATE 16-Line to 1-Line Multiplexer Physical Dimensions inches (millimeters) unless otherwise noted LIFE SUPPORT POLICY 24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-010, Wide Package Number N24A FAIRCHILD S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.
MM74C150 MM82C19 16-Line to 1-Line Multiplexer 3-STATE 16-Line to 1-Line Multiplexer
MM74C150 MM82C19 16-Line to 1-Line Multiplexer 3-STATE 16-Line to 1-Line Multiplexer General Description The MM74C150 and MM82C19 multiplex 16 digital lines to 1 output. A 4-bit address code determines
MM54C150 MM74C150 16-Line to 1-Line Multiplexer
MM54C150 MM74C150 16-Line to 1-Line Multiplexer MM72C19 MM82C19 TRI-STATE 16-Line to 1-Line Multiplexer General Description The MM54C150 MM74C150 and MM72C19 MM82C19 multiplex 16 digital lines to 1 output
MM74HC14 Hex Inverting Schmitt Trigger
MM74HC14 Hex Inverting Schmitt Trigger General Description The MM74HC14 utilizes advanced silicon-gate CMOS technology to achieve the low power dissipation and high noise immunity of standard CMOS, as
CD4043BC CD4044BC Quad 3-STATE NOR R/S Latches Quad 3-STATE NAND R/S Latches
CD4043BC CD4044BC Quad 3-STATE NOR R/S Latches Quad 3-STATE NAND R/S Latches General Description The CD4043BC are quad cross-couple 3-STATE CMOS NOR latches, and the CD4044BC are quad cross-couple 3- STATE
MM74C74 Dual D-Type Flip-Flop
Dual D-Type Flip-Flop General Description The MM74C74 dual D-type flip-flop is a monolithic complementary MOS (CMOS) integrated circuit cotructed with N- and P-channel enhancement traistors. Each flip-flop
CD4001BC/CD4011BC Quad 2-Input NOR Buffered B Series Gate Quad 2-Input NAND Buffered B Series Gate
CD4001BC/CD4011BC Quad 2-Input NOR Buffered B Series Gate Quad 2-Input NAND Buffered B Series Gate General Description The CD4001BC and CD4011BC quad gates are monolithic complementary MOS (CMOS) integrated
DM74LS157 DM74LS158 Quad 2-Line to 1-Line Data Selectors/Multiplexers
September 1986 Revised April 2000 DM74LS157 DM74LS158 Quad 2-Line to 1-Line Data Selectors/Multiplexers General Description These data selectors/multiplexers contain inverters and drivers to supply full
DM74LS153 Dual 1-of-4 Line Data Selectors/Multiplexers
Dual 1-of-4 Line Data Selectors/Multiplexers General Description Each of these data selectors/multiplexers contains inverters and drivers to supply fully complementary, on-chip, binary decoding data selection
CD40174BC CD40175BC Hex D-Type Flip-Flop Quad D-Type Flip-Flop
Hex D-Type Flip-Flop Quad D-Type Flip-Flop General Description The CD40174BC consists of six positive-edge triggered D- type flip-flops; the true outputs from each flip-flop are externally available. The
MM74HC174 Hex D-Type Flip-Flops with Clear
Hex D-Type Flip-Flops with Clear General Description The MM74HC174 edge triggered flip-flops utilize advanced silicon-gate CMOS technology to implement D-type flipflops. They possess high noise immunity,
DM74LS151 1-of-8 Line Data Selector/Multiplexer
1-of-8 Line Data Selector/Multiplexer General Description This data selector/multiplexer contains full on-chip decoding to select the desired data source. The DM74LS151 selects one-of-eight data sources.
MM74HC273 Octal D-Type Flip-Flops with Clear
MM74HC273 Octal D-Type Flip-Flops with Clear General Description The MM74HC273 edge triggered flip-flops utilize advanced silicon-gate CMOS technology to implement D-type flipflops. They possess high noise
CD4013BC Dual D-Type Flip-Flop
CD4013BC Dual D-Type Flip-Flop General Description The CD4013B dual D-type flip-flop is a monolithic complementary MOS (CMOS) integrated circuit constructed with N- and P-channel enhancement mode transistors.
CD4027BC Dual J-K Master/Slave Flip-Flop with Set and Reset
October 1987 Revised March 2002 CD4027BC Dual J-K Master/Slave Flip-Flop with Set and Reset General Description The CD4027BC dual J-K flip-flops are monolithic complementary MOS (CMOS) integrated circuits
MM74HCT373 MM74HCT374 3-STATE Octal D-Type Latch 3-STATE Octal D-Type Flip-Flop
3-STATE Octal D-Type Latch 3-STATE Octal D-Type Flip-Flop General Description The MM74HCT373 octal D-type latches and MM74HCT374 Octal D-type flip flops advanced silicongate CMOS technology, which provides
CD4001BC/CD4011BC Quad 2-Input NOR Buffered B Series Gate Quad 2-Input NAND Buffered B Series Gate
Quad 2-Input NOR Buffered B Series Gate Quad 2-Input NAND Buffered B Series Gate General Description The CD4001BC and CD4011BC quad gates are monolithic complementary MOS (CMOS) integrated circuits cotructed
DM9368 7-Segment Decoder/Driver/Latch with Constant Current Source Outputs
DM9368 7-Segment Decoder/Driver/Latch with Constant Current Source Outputs General Description The DM9368 is a 7-segment decoder driver incorporating input latches and constant current output circuits
DM74LS05 Hex Inverters with Open-Collector Outputs
Hex Inverters with Open-Collector Outputs General Description This device contains six independent gates each of which performs the logic INVERT function. The open-collector outputs require external pull-up
DM74157 Quad 2-Line to 1-Line Data Selectors/Multiplexers
DM74157 Quad 2-Line to 1-Line Data Selectors/Multiplexers General Description These data selectors/multiplexers contain inverters and drivers to supply full on-chip data selection to the four out-put gates.
DM74LS00 Quad 2-Input NAND Gate
DM74LS00 Quad 2-Input NAND Gate General Description This device contains four independent gates each of which performs the logic NAND function. Ordering Code: August 1986 Revised March 2000 Order Number
MM74HC4538 Dual Retriggerable Monostable Multivibrator
MM74HC4538 Dual Retriggerable Monostable Multivibrator General Description The MM74HC4538 high speed monostable multivibrator (one shots) is implemented in advanced silicon-gate CMOS technology. They feature
74AC139 74ACT139 Dual 1-of-4 Decoder/Demultiplexer
Dual 1-of-4 Decoder/Demultiplexer General Description The AC/ACT139 is a high-speed, dual 1-of-4 decoder/ demultiplexer. The device has two independent decoders, each accepting two inputs and providing
DM74LS191 Synchronous 4-Bit Up/Down Counter with Mode Control
August 1986 Revised February 1999 DM74LS191 Synchronous 4-Bit Up/Down Counter with Mode Control General Description The DM74LS191 circuit is a synchronous, reversible, up/ down counter. Synchronous operation
CD4013BC Dual D-Type Flip-Flop
Dual D-Type Flip-Flop General Description The CD4013B dual D-type flip-flop is a monolithic complementary MOS (CMOS) integrated circuit cotructed with N- and P-channel enhancement mode traistors. Each
DM74LS193 Synchronous 4-Bit Binary Counter with Dual Clock
September 1986 Revised March 2000 DM74LS193 Synchronous 4-Bit Binary Counter with Dual Clock General Description The DM74LS193 circuit is a synchronous up/down 4-bit binary counter. Synchronous operation
CD4008BM CD4008BC 4-Bit Full Adder
CD4008BM CD4008BC 4-Bit Full Adder General Description The CD4008B types consist of four full-adder stages with fast look-ahead carry provision from stage to stage Circuitry is included to provide a fast
DM7474 Dual Positive-Edge-Triggered D-Type Flip-Flops with Preset, Clear and Complementary Outputs
DM7474 Dual Positive-Edge-Triggered D-Type Flip-Flops with Preset, Clear and Complementary Outputs General Description This device contains two independent positive-edge-triggered D-type flip-flops with
74VHC574 Octal D-Type Flip-Flop with 3-STATE Outputs
74HC574 Octal D-Type Flip-Flop with 3-STATE Outputs General Description Ordering Code: March 1993 Revised May 2005 The HC574 is an advanced high speed CMOS octal flipflop with 3-STATE output fabricated
74AC138 74ACT138 1-of-8 Decoder/Demultiplexer
1-of-8 Decoder/Demultiplexer General Description The AC/ACT138 is a high-speed 1-of-8 decoder/demultiplexer. This device is ideally suited for high-speed bipolar memory chip select address decoding. The
DM74121 One-Shot with Clear and Complementary Outputs
June 1989 Revised July 2001 DM74121 One-Shot with Clear and Complementary Outputs General Description The DM74121 is a monostable multivibrator featuring both positive and negative edge triggering with
DM74LS112A Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flop with Preset, Clear, and Complementary Outputs
August 1986 Revised March 2000 DM74LS112A Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flop with Preset, Clear, and Complementary General Description This device contains two independent negative-edge-triggered
DM74LS169A Synchronous 4-Bit Up/Down Binary Counter
Synchronous 4-Bit Up/Down Binary Counter General Description This synchronous presettable counter features an internal carry look-ahead for cascading in high-speed counting applications. Synchronous operation
54157 DM54157 DM74157 Quad 2-Line to 1-Line Data Selectors Multiplexers
54157 DM54157 DM74157 Quad 2-Line to 1-Line Data Selectors Multiplexers General Description These data selectors multiplexers contain inverters and drivers to supply full on-chip data selection to the
DM74LS47 BCD to 7-Segment Decoder/Driver with Open-Collector Outputs
DM74LS47 BCD to 7-Segment Decoder/Driver with Open-Collector Outputs General Description The DM74LS47 accepts four lines of BCD (8421) input data, generates their complements internally and decodes the
74F74 Dual D-Type Positive Edge-Triggered Flip-Flop
Dual D-Type Positive Edge-Triggered Flip-Flop General Description The F74 is a dual D-type flip-flop with Direct Clear and Set inputs and complementary (Q, Q) outputs. Information at the input is traferred
Quad 2-Line to 1-Line Data Selectors Multiplexers
54LS157 DM54LS157 DM74LS157 54LS158 DM54LS158 DM74LS158 Quad 2-Line to 1-Line Data Selectors Multiplexers General Description These data selectors multiplexers contain inverters and drivers to supply full
CD4027BM CD4027BC Dual J-K Master Slave Flip-Flop with Set and Reset
CD4027BM CD4027BC Dual J-K Master Slave Flip-Flop with Set and Reset General Description These dual J-K flip-flops are monolithic complementary MOS (CMOS) integrated circuits constructed with N- and P-
CD4093BM CD4093BC Quad 2-Input NAND Schmitt Trigger
CD4093BM CD4093BC Quad 2-Input NAND Schmitt Trigger General Description The CD4093B consists of four Schmitt-trigger circuits Each circuit functions as a 2-input NAND gate with Schmitt-trigger action on
74AC191 Up/Down Counter with Preset and Ripple Clock
74AC191 Up/Down Counter with Preset and Ripple Clock General Description The AC191 is a reversible modulo 16 binary counter. It features synchronous counting and asynchronous presetting. The preset feature
INTEGRATED CIRCUITS. 74LVC08A Quad 2-input AND gate. Product specification IC24 Data Handbook. 1997 Jun 30
INTEGRATED CIRCUITS IC24 Data Handbook 1997 Jun 30 FEATURES Wide supply voltage range of 1.2 V to 3.6 V In accordance with JEDEC standard no. 8-1A Inputs accept voltages up to 5.5 V CMOS low power consumption
.LOW POWER DISSIPATION .HIGH NOISE IMMUNITY M74HC154 4 TO 16 LINE DECODER/DEMULTIPLEXER. HIGH SPEED tpd = 15 ns (TYP.) at VCC =5V
. HIGH SPEED tpd = 15 ns (TYP.) at VCC =5V.LOW POWER DISSIPATION I CC =4µA (MAX.) at T A =25 C.HIGH NOISE IMMUNITY VNIH =VNIL =28%VCC (MIN.) OUTPUT DRIVE CAPABILITY 15 LSTTL LOADS SYMMETRICAL OUTPUT IMPEDANCE
74F675A 16-Bit Serial-In, Serial/Parallel-Out Shift Register
74F675A 16-Bit Serial-In, Serial/Parallel-Out Shift Register General Description The 74F675A contai a 16-bit serial in/serial out shift register and a 16-bit parallel out storage register. Separate serial
5485 DM5485 DM7485 4-Bit Magnitude Comparators
5485 DM5485 DM7485 4-Bit Magnitude Comparators General Description These 4-bit magnitude comparators perform comparison of straight binary or BCD codes Three fully-decoded decisions about two 4-bit words
1-800-831-4242
Distributed by: www.jameco.com 1-800-831-4242 The content and copyrights of the attached material are the property of its owner. DM74LS161A DM74LS163A Synchronous 4-Bit Binary Counters General Description
DM54LS260 DM74LS260 Dual 5-Input NOR Gate
DM54LS260 DM74LS260 Dual 5-Input NOR Gate General Description This device contains two individual five input gates each of which perform the logic NOR function Connection Diagram Dual-In-Line Package TL
CD4511BM CD4511BC BCD-to-7 Segment Latch Decoder Driver
CD4511BM CD4511BC BCD-to-7 Segment Latch Decoder Driver General Description The CD4511BM CD4511BC BCD-to-seven segment latch decoder driver is constructed with complementary MOS (CMOS) enhancement mode
HCF4081B QUAD 2 INPUT AND GATE
QUAD 2 INPUT AND GATE MEDIUM SPEED OPERATION : t PD = 60ns (Typ.) at 10 QUIESCENT CURRENT SPECIFIED UP TO 20 5, 10 AND 15 PARAMETRIC RATINGS INPUT LEAKAGE CURRENT I I = 100nA (MAX) AT DD = 18 T A = 25
High-Speed, Low r ON, SPST Analog Switch (1-Bit Bus Switch)
High-Speed, Low r ON, SPST Analog Switch (1-Bit Bus Switch) DG2301 ishay Siliconix DESCRIPTION The DG2301 is a high-speed, 1-bit, low power, TTLcompatible bus switch. Using sub-micron CMOS technology,
DG2302. High-Speed, Low r ON, SPST Analog Switch. Vishay Siliconix. (1-Bit Bus Switch with Level-Shifter) RoHS* COMPLIANT DESCRIPTION FEATURES
High-Speed, Low r ON, SPST Analog Switch (1-Bit Bus Switch with Level-Shifter) DG2302 DESCRIPTION The DG2302 is a high-speed, 1-bit, low power, TTLcompatible bus switch. Using sub-micron CMOS technology,
5495A DM7495 4-Bit Parallel Access Shift Registers
5495A DM7495 4-Bit Parallel Access Shift Registers General Description These 4-bit registers feature parallel and serial inputs parallel outputs mode control and two clock inputs The registers have three
74LS193 Synchronous 4-Bit Binary Counter with Dual Clock
74LS193 Synchronous 4-Bit Binary Counter with Dual Clock General Description The DM74LS193 circuit is a synchronous up/down 4-bit binary counter. Synchronous operation is provided by having all flip-flops
HCF4056B BCD TO 7 SEGMENT DECODER /DRIVER WITH STROBED LATCH FUNCTION
BCD TO 7 SEGMENT DECODER /DRIVER WITH STROBED LATCH FUNCTION QUIESCENT CURRENT SPECIF. UP TO 20V OPERATION OF LIQUID CRYSTALS WITH CMOS CIRCUITS PROVIDES ULTRA LOW POWER DISPLAY. EQUIVALENT AC OUTPUT DRIVE
CD4040BC, 12-Stage Ripple Carry Binary Counters CD4060BC, 14-Stage Ripple Carry Binary Counters
CD4040BC, 12-Stage Ripple Carry Binary Counters CD4060BC, 14-Stage Ripple Carry Binary Counters Features Wide supply voltage range: 3.0V to 15V High noise immunity: 0.45 V DD (Typ.) Low power TTL compatibility:
HCF4070B QUAD EXCLUSIVE OR GATE
QUAD EXCLUSIE OR GATE MEDIUM-SPEED OPERATION t PHL = t PLH = 70ns (Typ.) at CL = 50 pf and DD = 10 QUIESCENT CURRENT SPECIFIED UP TO 20 5, 10 AND 15 PARAMETRIC RATINGS INPUT LEAKAGE CURRENT I I = 100nA
DM74184 DM74185A BCD-to-Binary and Binary-to-BCD Converters
DM74184 DM74185A BCD-to-Binary and Binary-to-BCD Converters General Description These monolithic converters are derived from the 256-bit read only memories DM5488 and DM7488 Emitter connections are made
Features. Instruction. Decoder Control Logic, And Clock Generators. Address Compare amd Write Enable. Protect Register V PP.
February 1999 NM9366 (MICROWIRE Bus Interface) 4096-Bit Serial EEPROM General Description The NM9366 devices are 4096 bits of CMOS non-volatile electrically erasable memory divided into 256 16-bit registers.
LM566C Voltage Controlled Oscillator
LM566C Voltage Controlled Oscillator General Description The LM566CN is a general purpose voltage controlled oscillator which may be used to generate square and triangular waves the frequency of which
PHOTOTRANSISTOR OPTOCOUPLERS
MCT2 MCT2E MCT20 MCT27 WHITE PACKAGE (-M SUFFIX) BLACK PACKAGE (NO -M SUFFIX) DESCRIPTION The MCT2XXX series optoisolators consist of a gallium arsenide infrared emitting diode driving a silicon phototransistor
MC14001B Series. B Suffix Series CMOS Gates MC14001B, MC14011B, MC14023B, MC14025B, MC14071B, MC14073B, MC14081B, MC14082B
MC4B Series BSuffix Series CMOS Gates MC4B, MC4B, MC4B, MC4B, MC4B, MC4B, MC4B, MC4B The B Series logic gates are constructed with P and N channel enhancement mode devices in a single monolithic structure
CMOS, the Ideal Logic Family
CMOS, the Ideal Logic Family INTRODUCTION Let s talk about the characteristics of an ideal logic family. It should dissipate no power, have zero propagation delay, controlled rise and fall times, and have
DM74LS373/DM74LS374 3-STATE Octal D-Type Transparent Latches and Edge-Triggered Flip-Flops
DM74LS373/DM74LS374 3-STATE Octal D-Type Transparent Latches and Edge-Triggered Flip-Flops General Description These 8-bit registers feature totem-pole 3-STATE outputs designed specifically for driving
3-input EXCLUSIVE-OR gate. The 74LVC1G386 provides a 3-input EXCLUSIVE-OR function.
Rev. 02 3 September 2007 Product data sheet 1. General description The provides a 3-input EXCLUSIVE-OR function. The input can be driven from either 3.3 or 5 V devices. This feature allows the use of these
Fairchild Solutions for 133MHz Buffered Memory Modules
AN-5009 Fairchild Semiconductor Application Note April 1999 Revised December 2000 Fairchild Solutions for 133MHz Buffered Memory Modules Fairchild Semiconductor provides several products that are compatible
HCF4010B HEX BUFFER/CONVERTER (NON INVERTING)
HEX BUFFER/CONVERTER (NON INVERTING) PROPAGATION DELAY TIME: t PD = 50ns (Typ.) at V DD = 10V C L = 50pF HIGH TO LOW LEVEL LOGIC CONVERSION MULTIPLEXER: 1 TO 6 OR 6 TO 1 HIGH "SINK" AND "SOURCE" CURRENT
MC14008B. 4-Bit Full Adder
4-Bit Full Adder The MC4008B 4bit full adder is constructed with MOS PChannel and NChannel enhancement mode devices in a single monolithic structure. This device consists of four full adders with fast
SEMICONDUCTOR TECHNICAL DATA
SEMICONDUCTOR TECHNICAL DATA The B Series logic gates are constructed with P and N channel enhancement mode devices in a single monolithic structure (Complementary MOS). Their primary use is where low
LM78XX Series Voltage Regulators
LM78XX Series Voltage Regulators General Description Connection Diagrams The LM78XX series of three terminal regulators is available with several fixed output voltages making them useful in a wide range
Features INSTRUCTION DECODER CONTROL LOGIC AND CLOCK GENERATORS COMPARATOR AND WRITE ENABLE EEPROM ARRAY READ/WRITE AMPS 16
July 2000 FM9346 (MICROWIRE Bus Interface) 1024- Serial EEPROM General Description FM9346 is a 1024-bit CMOS non-volatile EEPROM organized as 64 x 16-bit array. This device features MICROWIRE interface
INTEGRATED CIRCUITS. For a complete data sheet, please also download:
INTEGRATED CIRCUITS DATA SEET For a complete data sheet, please also download: The IC6 74C/CT/CU/CMOS Logic Family Specifications The IC6 74C/CT/CU/CMOS Logic Package Information The IC6 74C/CT/CU/CMOS
PS323. Precision, Single-Supply SPST Analog Switch. Features. Description. Block Diagram, Pin Configuration, and Truth Table. Applications PS323 PS323
Features ÎÎLow On-Resistance (33-ohm typ.) Minimizes Distortion and Error Voltages ÎÎLow Glitching Reduces Step Errors in Sample-and-Holds. Charge Injection, 2pC typ. ÎÎSingle-Supply Operation (+2.5V to
. HIGH SPEED .LOW POWER DISSIPATION .COMPATIBLE WITH TTL OUTPUTS M54HCT27 M74HCT27 TRIPLE 3-INPUT NOR GATE. tpd = 9 ns (TYP.
M54HCT27 M74HCT27 TRIPLE 3-INPUT NOR GATE. HIGH SPEED tpd = 9 ns (TYP.) AT VCC =5V.LOW POWER DISSIPATION I CC =1µA (MAX.) AT T A =25 C.COMPATIBLE WITH TTL OUTPUTS VIH = 2V (MIN.) VIL = 0.8V (MAX) OUTPUT
FSAL200 Wide Bandwidth Quad 2:1 Analog Multiplexer / De-multiplexer Switch
FSAL200 Wide Bandwidth Quad 2:1 Analog Multiplexer / De-multiplexer Switch Features Typical 6Ω Switch Connection Between Two Ports Minimal Propagation Delay Through the Switch Low I CC Zero Bounce in Flow-Through
LOW POWER SCHOTTKY. http://onsemi.com GUARANTEED OPERATING RANGES ORDERING INFORMATION
The TTL/MSI SN74LS151 is a high speed 8-input Digital Multiplexer. It provides, in one package, the ability to select one bit of data from up to eight sources. The LS151 can be used as a universal function
INTEGRATED CIRCUITS. 74F153 Dual 4-line to 1-line multiplexer. Product specification 1996 Jan 05 IC15 Data Handbook
INTEGRATED CIRCUITS 1996 Jan 05 IC15 Data Handbook FEATURES Non-inverting outputs Separate enable for each section Common select inputs See 74F253 for 3-State version PIN CONFIGURATION Ea 1 S1 2 I3a 3
LM139/LM239/LM339/LM2901/LM3302 Low Power Low Offset Voltage Quad Comparators
Low Power Low Offset Voltage Quad Comparators General Description The LM139 series consists of four independent precision voltage comparators with an offset voltage specification as low as 2 mv max for
www.jameco.com 1-800-831-4242
Distributed by: www.jameco.com 1-800-831-4242 The content and copyrights of the attached material are the property of its owner. LF411 Low Offset, Low Drift JFET Input Operational Amplifier General Description
Features. Applications
LM555 Timer General Description The LM555 is a highly stable device for generating accurate time delays or oscillation. Additional terminals are provided for triggering or resetting if desired. In the
LM118/LM218/LM318 Operational Amplifiers
LM118/LM218/LM318 Operational Amplifiers General Description The LM118 series are precision high speed operational amplifiers designed for applications requiring wide bandwidth and high slew rate. They
HCC/HCF4032B HCC/HCF4038B
HCC/HCF4032B HCC/HCF4038B TRIPLE SERIAL ADDERS INERT INPUTS ON ALL ADDERS FOR SUM COMPLEMENTING APPLICATIONS FULLY STATIC OPERATION...DC TO 10MHz (typ.) @ DD = 10 BUFFERED INPUTS AND OUTPUTS SINGLE-PHASE
HCF4001B QUAD 2-INPUT NOR GATE
QUAD 2-INPUT NOR GATE PROPAGATION DELAY TIME: t PD = 50ns (TYP.) at V DD = 10V C L = 50pF BUFFERED INPUTS AND OUTPUTS STANDARDIZED SYMMETRICAL OUTPUT CHARACTERISTICS QUIESCENT CURRENT SPECIFIED UP TO 20V
INTEGRATED CIRCUITS. For a complete data sheet, please also download:
INTEGRATED CIRCUITS DATA SEET For a complete data sheet, please also download: The IC6 74C/CT/CU/CMOS ogic Family Specifications The IC6 74C/CT/CU/CMOS ogic Package Information The IC6 74C/CT/CU/CMOS ogic
HIGH SPEED-10 MBit/s LOGIC GATE OPTOCOUPLERS
DESCRIPTION The, /6 single-channel and /6 dual-channel optocouplers consist of a 5 nm AlGaAS LED, optically coupled to a very high speed integrated photodetector logic gate with a strobable output. This
4-bit binary full adder with fast carry CIN + (A1 + B1) + 2(A2 + B2) + 4(A3 + B3) + 8(A4 + B4) = = S1 + 2S2 + 4S3 + 8S4 + 16COUT
Rev. 03 11 November 2004 Product data sheet 1. General description 2. Features The is a high-speed Si-gate CMOS device and is pin compatible with low power Schottky TTL (LSTTL). The is specified in compliance
74F257A Quad 2-line to 1-line selector/multiplexer, non-inverting (3-State)
INTEGRATED CIRCUITS Quad 2-line to 1-line selector/multiplexer, non-inverting (3-State) 1995 Mar 31 IC15 Data Handbook Philips Semiconductors Quad 2-line to 1-line selector/multiplexer, non-inverting (3-State)
INTEGRATED CIRCUITS. For a complete data sheet, please also download:
INTEGRATED CIRCUITS DATA SHEET For a complete data sheet, please also download: The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications The IC06 74HC/HCT/HCU/HCMOS Logic Package Information The IC06 74HC/HCT/HCU/HCMOS
LM1036 Dual DC Operated Tone/Volume/Balance Circuit
LM1036 Dual DC Operated Tone/Volume/Balance Circuit General Description The LM1036 is a DC controlled tone (bass/treble), volume and balance circuit for stereo applications in car radio, TV and audio systems.
NTE2053 Integrated Circuit 8 Bit MPU Compatible A/D Converter
NTE2053 Integrated Circuit 8 Bit MPU Compatible A/D Converter Description: The NTE2053 is a CMOS 8 bit successive approximation Analog to Digital converter in a 20 Lead DIP type package which uses a differential
FAN7680. PC Power Supply Outputs Monitoring IC. Features. Description. Typical Application. www.fairchildsemi.com FPO OVP UVP PGO PSON
PC Power Supply Outputs Monitoring IC www.fairchildsemi.com Features PC Power Supply Output Monitor Circuitry Few External Components Over Voltage Protection for.v, V and V(Vcc) Outputs Under Voltage Protection
Low-power configurable multiple function gate
Rev. 7 10 September 2014 Product data sheet 1. General description The provides configurable multiple functions. The output state is determined by eight patterns of 3-bit input. The user can choose the
L293B L293E PUSH-PULL FOUR CHANNEL DRIVERS. OUTPUT CURRENT 1A PER CHANNEL PEAK OUTPUT CURRENT 2A PER CHANNEL (non repetitive) INHIBIT FACILITY
L293B L293E PUSH-PULL FOUR CHANNEL DRIVERS OUTPUT CURRENT 1A PER CHANNEL PEAK OUTPUT CURRENT 2A PER CHANNEL (non repetitive) INHIBIT FACILITY. HIGH NOISE IMMUNITY SEPARATE LOGIC SUPPLY OVERTEMPERATURE
CAT28C64B F R E E. 64K-Bit CMOS PARALLEL EEPROM L E A D FEATURES DESCRIPTION BLOCK DIAGRAM
64K-Bit CMOS PARALLEL EEPROM FEATURES Fast read access times: 90/120/150ns Low power CMOS dissipation: Active: 25 ma max. Standby: 100 µa max. Simple write operation: On-chip address and data latches Self-timed
INTEGRATED CIRCUITS. For a complete data sheet, please also download:
INTEGRATED CIRCUITS DATA SEET For a complete data sheet, please also download: The IC06 74C/CT/CU/CMOS ogic Family Specifications The IC06 74C/CT/CU/CMOS ogic Package Information The IC06 74C/CT/CU/CMOS
54191 DM54191 DM74191 Synchronous Up Down 4-Bit Binary Counter with Mode Control
54191 DM54191 DM74191 Synchronous Up Down 4-Bit Binary Counter with Mode Control General Description This circuit is a synchronous reversible up down counter The 191 is a 4-bit binary counter Synchronous
3-to-8 line decoder, demultiplexer with address latches
Rev. 7 29 January 2016 Product data sheet 1. General description The is a high-speed Si-gate CMOS device and is pin compatible with low-power Schottky TTL (LSTTL). The is specified in compliance with JEDEC
How to Read a Datasheet
How to Read a Datasheet Prepared for the WIMS outreach program 5/6/02, D. Grover In order to use a PIC microcontroller, a flip-flop, a photodetector, or practically any electronic device, you need to consult
256K (32K x 8) Static RAM
256K (32K x 8) Static RAM Features High speed: 55 ns and 70 ns Voltage range: 4.5V 5.5V operation Low active power (70 ns, LL version) 275 mw (max.) Low standby power (70 ns, LL version) 28 µw (max.) Easy
DS1220Y 16k Nonvolatile SRAM
19-5579; Rev 10/10 NOT RECOENDED FOR NEW DESIGNS 16k Nonvolatile SRAM www.maxim-ic.com FEATURES 10 years minimum data retention in the absence of external power Data is automatically protected during power
LM380 Audio Power Amplifier
LM380 Audio Power Amplifier General Description The LM380 is a power audio amplifier for consumer application In order to hold system cost to a minimum gain is internally fixed at 34 db A unique input
LM1596 LM1496 Balanced Modulator-Demodulator
LM1596 LM1496 Balanced Modulator-Demodulator General Description The LM1596 LM1496 are doubled balanced modulator-demodulators which produce an output voltage proportional to the product of an input (signal)
PI5C3244 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012
Features: Near-Zero propagation delay 5-ohm switches connect inputs to outputs when enabled Direct bus connection when switches are ON Ultra Low Quiescent Power (0.2µA Typical) Ideally suited for notebook