MM74C150 MM82C19 16-Line to 1-Line Multiplexer 3-STATE 16-Line to 1-Line Multiplexer
|
|
|
- Patrick Wiggins
- 2 years ago
- Views:
Transcription
1 MM74C150 MM82C19 16-Line to 1-Line Multiplexer 3-STATE 16-Line to 1-Line Multiplexer General Description The MM74C150 and MM82C19 multiplex 16 digital lines to 1 output. A 4-bit address code determines the particular 1- of-16 inputs which is routed to the output. The data is inverted from input to output. A strobe override places the output of MM74C150 in the logical 1 state and the output of MM82C19 in the highimpedance state. Ordering Code: Connection Diagram October 1987 Revised January 1999 All inputs are protected from damage due to static discharge by diode clamps to V CC and GND. Features Pin Assignments for DIP Wide supply voltage range: 3.0V to 15V Guaranteed noise margin: 1.0V High noise immunity: 0.45 V CC (typ.) TTL compatibility: Drive 1 TTL Load Order Number Package Number Package Description MM74C150N N24A 24-Lead plastic Dual-In-Line Package (PDIP), JEDEC MS-010, Wide MM82C19N N24A 24-Lead plastic Dual-In-Line Package (PDIP), JEDEC MS-010, Wide MM74C150 MM82C19 16-Line to 1-Line Multiplexer 3-STATE 16-Line to 1-Line Multiplexer 1999 Fairchild Semiconductor Corporation DS prf
2 MM74C150 MM82C19 Truth Table MM74C150 Inputs Output D C B A STROBE E0 E1 E2 E3 E4 E5 E6 E7 E8 E9 E10 E11 E12 E13 E14 E15 W X X X X 1 X X X X X X X X X X X X X X X X 1 (Note 1) X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X 0 X X X X X X X X X X X X X X X 1 X X X X X X X X X X X X X X X X 0 X X X X X X X X X X X X X X X 1 X X X X X X X X X X X X X X X X 0 X X X X X X X X X X X X X X X 1 X X X X X X X X X X X X X X X X 0 X X X X X X X X X X X X X X X 1 X X X X X X X X X X X X X X X X 0 X X X X X X X X X X X X X X X 1 X X X X X X X X X X X X X X X X 0 X X X X X X X X X X X X X X X 1 X X X X X X X X X X X X X X X X 0 X X X X X X X X X X X X X X X 1 X X X X X X X X X X X X X X X X 0 X X X X X X X X X X X X X X X 1 X X X X X X X X X X X X X X X X 0 X X X X X X X X X X X X X X X 1 X X X X X X X X X X X X X X X X 0 X X X X X X X X X X X X X X X 1 X X X X X X X X X X X X X X X X 0 X X X X X X X X X X X X X X X 1 X X X X X X X X X X X X X X X X 0 X X X X X X X X X X X X X X X 1 X X X X X X X X X X X X X X X X 0 X X X X X X X X X X X X X X X 1 X X X X X X X X X X X X X X X X 0 X X X X X X X X X X X X X X X 1 X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X X 1 0 Note 1: For MM72C19/MM82C19 this would be Hi-Z, everything else is the same. 2
3 Logic Diagrams MM74C150 MM74C150 MM82C19 3
4 MM74C150 MM82C19 Logic Diagrams (Continued) MM82C19 4
5 Absolute Maximum Ratings(Note 2) Voltage at Any Pin Operating Temperature Range Storage Temperature Range Power Dissipation Dual-In-Line Small Outline Operating V CC Range DC Electrical Characteristics 0.3V to V CC +0.3V 40 C to +85 C 65 C to +150 C 700 mw 500 mw 3.0V to 15V Min/Max limits apply across temperature range unless otherwise noted. V CC 18V Lead Temperature (soldering, 10 seconds) 260 C Note 2: Absolute Maximum Ratings are those values beyond which the safety of the device cannot be guaranteed. Except for Operating Temperature Range they are not meant to imply that the devices should be operated at these limits. The Electrical Characteristic table provides conditions for actual device operation. Symbol Parameter Conditions Min Typ Max Units CMOS to CMOS V IN(1) Logical 1 Input Voltage V CC = 5.0V 3.5 V V CC = 10V 8.0 V V IN(0) Logical 0 Input Voltage V CC = 5.0V 1.5 V V CC = 10V 2.0 V V OUT(1) Logical 1 Output Voltage V CC = 5.0V, I O = 10 µa 4.5 V V CC = 10V, I O = 10 µa 9.0 V V OUT(0) Logical 0 Output Voltage V CC = 5.0V, I O = +10 µa 0.5 V V CC = 10V, I O = +10 µa 1.0 V I IN(1) Logical 1 Input Current V CC = 15V, V IN = 15V V I IN(0) Logical 0 Input Current V CC = 15V, V IN = 0V µa I OZ Output Current in High Impedance State MM82C19 V CC = 15V, V O = 15V µa V CC = 15V, V O = 0V µa I CC Supply Current V CC = 15V µa CMOS/LPTTL Interface V IN(1) Logical 1 Input Voltage 74C, 82C, V CC = 4.75V V CC 1.5 V V IN(0) Logical 0 Input Voltage 74C, 82C, V CC = 4.75V 0.8 V V OUT(1) Logical 1 Output Voltage 74C, 82C, V CC = 4.75V, I O = 1.6 ma 2.4 V V OUT(0) Logical 0 Output Voltage 74C, 82C, V CC = 4.75V, I O = 1.6 ma 0.4 V Output Drive (Short Circuit Current) I SOURCE Output Source Current V CC = 5.0V, V OUT = 0V, T A = 25 C ma (P-Channel) I SOURCE Output Source Current V CC = 10V, V OUT = 0V, T A = 25 C ma (P-Channel) I SINK Output Sink Current V CC = 5.0V, V OUT = V CC, T A = 25 C ma (N-Channel) I SINK Output Sink Current V CC = 10V, V OUT = V CC, T A = 25 C ma (N-Channel) MM74C150 MM82C19 5
6 MM74C150 MM82C19 AC Electrical Characteristics (Note 3) T A = 25 C, C L = 50 pf, unless otherwise noted Symbol Parameter Conditions Min Typ Max Units t pd0, t pd1 Propagation Delay Time to a V CC = 5.0V ns Logical 0 or Logical 1 V CC = 10V ns from Data Inputs to Output V CC = 5.0V, C L = 150 pf ns V CC = 10V, C L = 150 pf ns t pd0, t pd1 Propagation Delay Time to a V CC = 5.0V ns Logical 0 or Logical 1 V CC = 10V ns from Data Select Inputs to Output t pd0, t pd1 Propagation Delay Time to a V CC = 5.0V ns Logical 0 or Logical 1 V CC = 10V ns from Strobe to Output MM74C150 t 1H, t 0H Delay from Strobe to High V CC = 5.0V, R L = 10k, C L = 5 pf ns Impedance State V CC = 10V, R L = 10k, C L = 5 pf ns MM82C19 t H1, t H0 Delay from Strobe to Logical V CC = 5.0V, R L = 10k, C L = 5 pf ns 1 Level or to Logical 0 V CC = 10V, R L = 10k, C L = 5 pf ns Level (from High Impedance State) MM82C19 C IN Input Capacitance Any Input (Note 4) 5.0 pf C OUT Output Capacitance (Note 4) 11.0 pf MM82C19 C PD Power Dissipation Capacitance (Note 5) 100 pf Note 3: AC Parameters are guaranteed by DC correlated testing. Note 4: Capacitance is guaranteed by periodic testing. Note 5: C PD determines the no load AC power consumption of any CMOS device. For complete explanation, see Family Characteristics, application note AN
7 Switching Time Waveforms CMOS to CMOS MM74C150 MM82C19 t 1H and t H1 t 1H t H1 t 0H and t H0 t 0H t H0 Note: Delays measured with input t r, t f 20 ns. 7
8 MM74C150 MM82C19 16-Line to 1-Line Multiplexer 3-STATE 16-Line to 1-Line Multiplexer Physical Dimensions inches (millimeters) unless otherwise noted LIFE SUPPORT POLICY 24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-010, Wide Package Number N24A FAIRCHILD S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications.
MM74C150 MM82C19 16-Line to 1-Line Multiplexer 3-STATE 16-Line to 1-Line Multiplexer
MM74C150 MM82C19 16-Line to 1-Line Multiplexer 3-STATE 16-Line to 1-Line Multiplexer General Description The MM74C150 and MM82C19 multiplex 16 digital lines to 1 output. A 4-bit address code determines
MM54C150 MM74C150 16-Line to 1-Line Multiplexer
MM54C150 MM74C150 16-Line to 1-Line Multiplexer MM72C19 MM82C19 TRI-STATE 16-Line to 1-Line Multiplexer General Description The MM54C150 MM74C150 and MM72C19 MM82C19 multiplex 16 digital lines to 1 output
MM74HC14 Hex Inverting Schmitt Trigger
MM74HC14 Hex Inverting Schmitt Trigger General Description The MM74HC14 utilizes advanced silicon-gate CMOS technology to achieve the low power dissipation and high noise immunity of standard CMOS, as
CD4043BC CD4044BC Quad 3-STATE NOR R/S Latches Quad 3-STATE NAND R/S Latches
CD4043BC CD4044BC Quad 3-STATE NOR R/S Latches Quad 3-STATE NAND R/S Latches General Description The CD4043BC are quad cross-couple 3-STATE CMOS NOR latches, and the CD4044BC are quad cross-couple 3- STATE
MM74C74 Dual D-Type Flip-Flop
Dual D-Type Flip-Flop General Description The MM74C74 dual D-type flip-flop is a monolithic complementary MOS (CMOS) integrated circuit cotructed with N- and P-channel enhancement traistors. Each flip-flop
CD4001BC/CD4011BC Quad 2-Input NOR Buffered B Series Gate Quad 2-Input NAND Buffered B Series Gate
CD4001BC/CD4011BC Quad 2-Input NOR Buffered B Series Gate Quad 2-Input NAND Buffered B Series Gate General Description The CD4001BC and CD4011BC quad gates are monolithic complementary MOS (CMOS) integrated
DM74LS157 DM74LS158 Quad 2-Line to 1-Line Data Selectors/Multiplexers
September 1986 Revised April 2000 DM74LS157 DM74LS158 Quad 2-Line to 1-Line Data Selectors/Multiplexers General Description These data selectors/multiplexers contain inverters and drivers to supply full
DM74LS153 Dual 1-of-4 Line Data Selectors/Multiplexers
Dual 1-of-4 Line Data Selectors/Multiplexers General Description Each of these data selectors/multiplexers contains inverters and drivers to supply fully complementary, on-chip, binary decoding data selection
MM74HC174 Hex D-Type Flip-Flops with Clear
Hex D-Type Flip-Flops with Clear General Description The MM74HC174 edge triggered flip-flops utilize advanced silicon-gate CMOS technology to implement D-type flipflops. They possess high noise immunity,
CD40174BC CD40175BC Hex D-Type Flip-Flop Quad D-Type Flip-Flop
Hex D-Type Flip-Flop Quad D-Type Flip-Flop General Description The CD40174BC consists of six positive-edge triggered D- type flip-flops; the true outputs from each flip-flop are externally available. The
DM74LS151 1-of-8 Line Data Selector/Multiplexer
1-of-8 Line Data Selector/Multiplexer General Description This data selector/multiplexer contains full on-chip decoding to select the desired data source. The DM74LS151 selects one-of-eight data sources.
MM74HC273 Octal D-Type Flip-Flops with Clear
MM74HC273 Octal D-Type Flip-Flops with Clear General Description The MM74HC273 edge triggered flip-flops utilize advanced silicon-gate CMOS technology to implement D-type flipflops. They possess high noise
CD4013BC Dual D-Type Flip-Flop
CD4013BC Dual D-Type Flip-Flop General Description The CD4013B dual D-type flip-flop is a monolithic complementary MOS (CMOS) integrated circuit constructed with N- and P-channel enhancement mode transistors.
CD4094BC 8-Bit Shift Register/Latch with 3-STATE Outputs
8-Bit Shift Register/Latch with 3-STATE Outputs General Description The CD4094BC consists of an 8-bit shift register and a 3-STATE 8-bit latch. Data is shifted serially through the shift register on the
CD4027BC Dual J-K Master/Slave Flip-Flop with Set and Reset
October 1987 Revised March 2002 CD4027BC Dual J-K Master/Slave Flip-Flop with Set and Reset General Description The CD4027BC dual J-K flip-flops are monolithic complementary MOS (CMOS) integrated circuits
MM74HCT373 MM74HCT374 3-STATE Octal D-Type Latch 3-STATE Octal D-Type Flip-Flop
3-STATE Octal D-Type Latch 3-STATE Octal D-Type Flip-Flop General Description The MM74HCT373 octal D-type latches and MM74HCT374 Octal D-type flip flops advanced silicongate CMOS technology, which provides
CD4001BC/CD4011BC Quad 2-Input NOR Buffered B Series Gate Quad 2-Input NAND Buffered B Series Gate
Quad 2-Input NOR Buffered B Series Gate Quad 2-Input NAND Buffered B Series Gate General Description The CD4001BC and CD4011BC quad gates are monolithic complementary MOS (CMOS) integrated circuits cotructed
DM9368 7-Segment Decoder/Driver/Latch with Constant Current Source Outputs
DM9368 7-Segment Decoder/Driver/Latch with Constant Current Source Outputs General Description The DM9368 is a 7-segment decoder driver incorporating input latches and constant current output circuits
DM74LS05 Hex Inverters with Open-Collector Outputs
Hex Inverters with Open-Collector Outputs General Description This device contains six independent gates each of which performs the logic INVERT function. The open-collector outputs require external pull-up
DM74157 Quad 2-Line to 1-Line Data Selectors/Multiplexers
DM74157 Quad 2-Line to 1-Line Data Selectors/Multiplexers General Description These data selectors/multiplexers contain inverters and drivers to supply full on-chip data selection to the four out-put gates.
74VHCT574A Octal D-Type Flip-Flop with 3-STATE Outputs
74VHCT574A Octal D-Type Flip-Flop with 3-STATE Outputs General Description The VHCT574A is an advanced high speed CMOS octal flip-flop with 3-STATE output fabricated with silicon gate CMOS technology.
DM74LS00 Quad 2-Input NAND Gate
DM74LS00 Quad 2-Input NAND Gate General Description This device contains four independent gates each of which performs the logic NAND function. Ordering Code: August 1986 Revised March 2000 Order Number
MM74HC4538 Dual Retriggerable Monostable Multivibrator
MM74HC4538 Dual Retriggerable Monostable Multivibrator General Description The MM74HC4538 high speed monostable multivibrator (one shots) is implemented in advanced silicon-gate CMOS technology. They feature
Is Now Part of To learn more about ON Semiconductor, please visit our website at
Is Now Part of To learn more about ON Semiconductor, please visit our website at www.oemi.com ON Semiconductor and the ON Semiconductor logo are trademarks of Semiconductor Components Industries, LLC dba
74F174 Hex D-Type Flip-Flop with Master Reset
Hex D-Type Flip-Flop with Master Reset General Description The 74F174 is a high-speed hex D-type flip-flop. The device is used primarily as a 6-bit edge-triggered storage register. The information on the
74AC139 74ACT139 Dual 1-of-4 Decoder/Demultiplexer
Dual 1-of-4 Decoder/Demultiplexer General Description The AC/ACT139 is a high-speed, dual 1-of-4 decoder/ demultiplexer. The device has two independent decoders, each accepting two inputs and providing
CD4013BC Dual D-Type Flip-Flop
Dual D-Type Flip-Flop General Description The CD4013B dual D-type flip-flop is a monolithic complementary MOS (CMOS) integrated circuit cotructed with N- and P-channel enhancement mode traistors. Each
DM74LS191 Synchronous 4-Bit Up/Down Counter with Mode Control
August 1986 Revised February 1999 DM74LS191 Synchronous 4-Bit Up/Down Counter with Mode Control General Description The DM74LS191 circuit is a synchronous, reversible, up/ down counter. Synchronous operation
CD4008BM CD4008BC 4-Bit Full Adder
CD4008BM CD4008BC 4-Bit Full Adder General Description The CD4008B types consist of four full-adder stages with fast look-ahead carry provision from stage to stage Circuitry is included to provide a fast
DM74LS193 Synchronous 4-Bit Binary Counter with Dual Clock
September 1986 Revised March 2000 DM74LS193 Synchronous 4-Bit Binary Counter with Dual Clock General Description The DM74LS193 circuit is a synchronous up/down 4-bit binary counter. Synchronous operation
74VHC574 Octal D-Type Flip-Flop with 3-STATE Outputs
74HC574 Octal D-Type Flip-Flop with 3-STATE Outputs General Description Ordering Code: March 1993 Revised May 2005 The HC574 is an advanced high speed CMOS octal flipflop with 3-STATE output fabricated
DM7474 Dual Positive-Edge-Triggered D-Type Flip-Flops with Preset, Clear and Complementary Outputs
DM7474 Dual Positive-Edge-Triggered D-Type Flip-Flops with Preset, Clear and Complementary Outputs General Description This device contains two independent positive-edge-triggered D-type flip-flops with
74AC138 74ACT138 1-of-8 Decoder/Demultiplexer
1-of-8 Decoder/Demultiplexer General Description The AC/ACT138 is a high-speed 1-of-8 decoder/demultiplexer. This device is ideally suited for high-speed bipolar memory chip select address decoding. The
DM74121 One-Shot with Clear and Complementary Outputs
June 1989 Revised July 2001 DM74121 One-Shot with Clear and Complementary Outputs General Description The DM74121 is a monostable multivibrator featuring both positive and negative edge triggering with
DM74LS112A Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flop with Preset, Clear, and Complementary Outputs
August 1986 Revised March 2000 DM74LS112A Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flop with Preset, Clear, and Complementary General Description This device contains two independent negative-edge-triggered
MM74HC4046 CMOS Phase Lock Loop
CMOS Phase Lock Loop General Description The MM74HC4046 is a low power phase lock loop utilizing advanced silicon-gate CMOS technology to obtain high frequency operation both in the phase comparator and
DM74LS169A Synchronous 4-Bit Up/Down Binary Counter
Synchronous 4-Bit Up/Down Binary Counter General Description This synchronous presettable counter features an internal carry look-ahead for cascading in high-speed counting applications. Synchronous operation
54157 DM54157 DM74157 Quad 2-Line to 1-Line Data Selectors Multiplexers
54157 DM54157 DM74157 Quad 2-Line to 1-Line Data Selectors Multiplexers General Description These data selectors multiplexers contain inverters and drivers to supply full on-chip data selection to the
DM74LS47 BCD to 7-Segment Decoder/Driver with Open-Collector Outputs
DM74LS47 BCD to 7-Segment Decoder/Driver with Open-Collector Outputs General Description The DM74LS47 accepts four lines of BCD (8421) input data, generates their complements internally and decodes the
CD4034BM CD4034BC 8-Stage TRI-STATE Bidirectional Parallel Serial Input Output Bus Register
February 1988 CD4034BM CD4034BC 8-Stage TRI-STATE Bidirectional Parallel Serial Input Output Bus Register General Description The CD4034BM CD4034BC is an 8-bit CMOS static shift register with two parallel
NC7SV86 TinyLogic ULP-A 2-Input Exclusive-OR Gate
TinyLogic ULP-A 2-Input Exclusive-OR Gate General Description The NC7SV86 is a single 2-Input Exclusive-OR Gate from Fairchild s Ultra Low Power-A (ULP-A) Series of TinyLogic. ULP-A is ideal for applications
74F74 Dual D-Type Positive Edge-Triggered Flip-Flop
Dual D-Type Positive Edge-Triggered Flip-Flop General Description The F74 is a dual D-type flip-flop with Direct Clear and Set inputs and complementary (Q, Q) outputs. Information at the input is traferred
CD4042BM CD4042BC Quad Clocked D Latch
CD4042BM CD4042BC Quad Clocked D Latch General Description The CD4042BM CD4042BC quad clocked D latch is a monolithic complementary MOS (CMOS) integrated circuit constructed with P- and N-channel enhancement
Quad 2-Line to 1-Line Data Selectors Multiplexers
54LS157 DM54LS157 DM74LS157 54LS158 DM54LS158 DM74LS158 Quad 2-Line to 1-Line Data Selectors Multiplexers General Description These data selectors multiplexers contain inverters and drivers to supply full
CD4027BM CD4027BC Dual J-K Master Slave Flip-Flop with Set and Reset
CD4027BM CD4027BC Dual J-K Master Slave Flip-Flop with Set and Reset General Description These dual J-K flip-flops are monolithic complementary MOS (CMOS) integrated circuits constructed with N- and P-
CD4093BM CD4093BC Quad 2-Input NAND Schmitt Trigger
CD4093BM CD4093BC Quad 2-Input NAND Schmitt Trigger General Description The CD4093B consists of four Schmitt-trigger circuits Each circuit functions as a 2-input NAND gate with Schmitt-trigger action on
INTEGRATED CIRCUITS. 74LVC08A Quad 2-input AND gate. Product specification IC24 Data Handbook. 1997 Jun 30
INTEGRATED CIRCUITS IC24 Data Handbook 1997 Jun 30 FEATURES Wide supply voltage range of 1.2 V to 3.6 V In accordance with JEDEC standard no. 8-1A Inputs accept voltages up to 5.5 V CMOS low power consumption
CD4511BC BCD-to-7 Segment Latch/Decoder/Driver
CD4511BC BCD-to-7 Segment Latch/Decoder/Driver General Description The CD4511BC BCD-to-seven segment latch/decoder/ driver is cotructed with complementary MOS (CMOS) enhancement mode devices and NPN bipolar
74F181 4-Bit Arithmetic Logic Unit
4-Bit Arithmetic Logic Unit General Description The 74F181 is a 4-bit Arithmetic logic Unit (ALU) which can perform all the possible 16 logic operatio on two variables and a variety of arithmetic operatio.
74AC191 Up/Down Counter with Preset and Ripple Clock
74AC191 Up/Down Counter with Preset and Ripple Clock General Description The AC191 is a reversible modulo 16 binary counter. It features synchronous counting and asynchronous presetting. The preset feature
.LOW POWER DISSIPATION .HIGH NOISE IMMUNITY M74HC154 4 TO 16 LINE DECODER/DEMULTIPLEXER. HIGH SPEED tpd = 15 ns (TYP.) at VCC =5V
. HIGH SPEED tpd = 15 ns (TYP.) at VCC =5V.LOW POWER DISSIPATION I CC =4µA (MAX.) at T A =25 C.HIGH NOISE IMMUNITY VNIH =VNIL =28%VCC (MIN.) OUTPUT DRIVE CAPABILITY 15 LSTTL LOADS SYMMETRICAL OUTPUT IMPEDANCE
74F675A 16-Bit Serial-In, Serial/Parallel-Out Shift Register
74F675A 16-Bit Serial-In, Serial/Parallel-Out Shift Register General Description The 74F675A contai a 16-bit serial in/serial out shift register and a 16-bit parallel out storage register. Separate serial
74AC163 74ACT163 Synchronous Presettable Binary Counter
74AC163 74ACT163 Synchronous Presettable Binary Counter General Description The AC/ACT163 are high-speed synchronous modulo-16 binary counters. They are synchronously presettable for application in programmable
M74HC4078TTR 8-INPUT NOR/OR GATE
8-INPUT NOR/OR GATE HIGH SPEED: t PD = 10ns (TYP.) at V CC = 6V LOW POWER DISSIPATION: I CC = 1µA(MAX.) at T A =25 C HIGH NOISE IMMUNITY: V NIH = V NIL = 28 % V CC (MIN.) SYMMETRICAL OUTPUT IMPEDANCE:
5485 DM5485 DM7485 4-Bit Magnitude Comparators
5485 DM5485 DM7485 4-Bit Magnitude Comparators General Description These 4-bit magnitude comparators perform comparison of straight binary or BCD codes Three fully-decoded decisions about two 4-bit words
DM54LS260 DM74LS260 Dual 5-Input NOR Gate
DM54LS260 DM74LS260 Dual 5-Input NOR Gate General Description This device contains two individual five input gates each of which perform the logic NOR function Connection Diagram Dual-In-Line Package TL
1-800-831-4242
Distributed by: www.jameco.com 1-800-831-4242 The content and copyrights of the attached material are the property of its owner. DM74LS161A DM74LS163A Synchronous 4-Bit Binary Counters General Description
CD4511BM CD4511BC BCD-to-7 Segment Latch Decoder Driver
CD4511BM CD4511BC BCD-to-7 Segment Latch Decoder Driver General Description The CD4511BM CD4511BC BCD-to-seven segment latch decoder driver is constructed with complementary MOS (CMOS) enhancement mode
HCF4081B QUAD 2 INPUT AND GATE
QUAD 2 INPUT AND GATE MEDIUM SPEED OPERATION : t PD = 60ns (Typ.) at 10 QUIESCENT CURRENT SPECIFIED UP TO 20 5, 10 AND 15 PARAMETRIC RATINGS INPUT LEAKAGE CURRENT I I = 100nA (MAX) AT DD = 18 T A = 25
DM8898 DM8899 TRI-STATE BCD to Binary Binary to BCD Converters
DM8898 DM8899 TRI-STATE BCD to Binary Binary to BCD Converters General Description These circuits are the TRI-STATE versions of the popular BCD to binary and binary to BCD converters DM74184 and DM74185A
High-Speed, Low r ON, SPST Analog Switch (1-Bit Bus Switch)
High-Speed, Low r ON, SPST Analog Switch (1-Bit Bus Switch) DG2301 ishay Siliconix DESCRIPTION The DG2301 is a high-speed, 1-bit, low power, TTLcompatible bus switch. Using sub-micron CMOS technology,
5495A DM7495 4-Bit Parallel Access Shift Registers
5495A DM7495 4-Bit Parallel Access Shift Registers General Description These 4-bit registers feature parallel and serial inputs parallel outputs mode control and two clock inputs The registers have three
DG2302. High-Speed, Low r ON, SPST Analog Switch. Vishay Siliconix. (1-Bit Bus Switch with Level-Shifter) RoHS* COMPLIANT DESCRIPTION FEATURES
High-Speed, Low r ON, SPST Analog Switch (1-Bit Bus Switch with Level-Shifter) DG2302 DESCRIPTION The DG2302 is a high-speed, 1-bit, low power, TTLcompatible bus switch. Using sub-micron CMOS technology,
74LS193 Synchronous 4-Bit Binary Counter with Dual Clock
74LS193 Synchronous 4-Bit Binary Counter with Dual Clock General Description The DM74LS193 circuit is a synchronous up/down 4-bit binary counter. Synchronous operation is provided by having all flip-flops
CD4040BC, 12-Stage Ripple Carry Binary Counters CD4060BC, 14-Stage Ripple Carry Binary Counters
CD4040BC, 12-Stage Ripple Carry Binary Counters CD4060BC, 14-Stage Ripple Carry Binary Counters Features Wide supply voltage range: 3.0V to 15V High noise immunity: 0.45 V DD (Typ.) Low power TTL compatibility:
PHOTOTRANSISTOR OPTOCOUPLERS
MCT2 MCT2E MCT20 MCT27 WHITE PACKAGE (-M SUFFIX) BLACK PACKAGE (NO -M SUFFIX) DESCRIPTION The MCT2XXX series optoisolators consist of a gallium arsenide infrared emitting diode driving a silicon phototransistor
MC14001B Series. B Suffix Series CMOS Gates MC14001B, MC14011B, MC14023B, MC14025B, MC14071B, MC14073B, MC14081B, MC14082B
MC4B Series BSuffix Series CMOS Gates MC4B, MC4B, MC4B, MC4B, MC4B, MC4B, MC4B, MC4B The B Series logic gates are constructed with P and N channel enhancement mode devices in a single monolithic structure
HCF4056B BCD TO 7 SEGMENT DECODER /DRIVER WITH STROBED LATCH FUNCTION
BCD TO 7 SEGMENT DECODER /DRIVER WITH STROBED LATCH FUNCTION QUIESCENT CURRENT SPECIF. UP TO 20V OPERATION OF LIQUID CRYSTALS WITH CMOS CIRCUITS PROVIDES ULTRA LOW POWER DISPLAY. EQUIVALENT AC OUTPUT DRIVE
DM74184 DM74185A BCD-to-Binary and Binary-to-BCD Converters
DM74184 DM74185A BCD-to-Binary and Binary-to-BCD Converters General Description These monolithic converters are derived from the 256-bit read only memories DM5488 and DM7488 Emitter connections are made
LM566C Voltage Controlled Oscillator
LM566C Voltage Controlled Oscillator General Description The LM566CN is a general purpose voltage controlled oscillator which may be used to generate square and triangular waves the frequency of which
HCF4070B QUAD EXCLUSIVE OR GATE
QUAD EXCLUSIE OR GATE MEDIUM-SPEED OPERATION t PHL = t PLH = 70ns (Typ.) at CL = 50 pf and DD = 10 QUIESCENT CURRENT SPECIFIED UP TO 20 5, 10 AND 15 PARAMETRIC RATINGS INPUT LEAKAGE CURRENT I I = 100nA
Features. Instruction. Decoder Control Logic, And Clock Generators. Address Compare amd Write Enable. Protect Register V PP.
February 1999 NM9366 (MICROWIRE Bus Interface) 4096-Bit Serial EEPROM General Description The NM9366 devices are 4096 bits of CMOS non-volatile electrically erasable memory divided into 256 16-bit registers.
DM74LS373/DM74LS374 3-STATE Octal D-Type Transparent Latches and Edge-Triggered Flip-Flops
DM74LS373/DM74LS374 3-STATE Octal D-Type Transparent Latches and Edge-Triggered Flip-Flops General Description These 8-bit registers feature totem-pole 3-STATE outputs designed specifically for driving
CMOS, the Ideal Logic Family
CMOS, the Ideal Logic Family INTRODUCTION Let s talk about the characteristics of an ideal logic family. It should dissipate no power, have zero propagation delay, controlled rise and fall times, and have
MM54HC181 MM74HC181 Arithmetic Logic Units Function Generators
MM54HC181 MM74HC181 Arithmetic Logic Units Function Generators General Description These arithmetic logic units (ALU) function generators utilize advanced silicon-gate CMOS technology They possess the
Obsolete Product(s) - Obsolete Product(s)
DUAL D TYPE FLIP FLOP WITH PRESET AND CLEAR HIGH SPEED : f MAX = 48MHz (TYP.) at V CC = 4.5V LOW POWER DISSIPATION: I CC =2µA(MAX.) at T A =25 C COMPATIBLE WITH TTL OUTPUTS : V IH = 2V (MIN.) V IL = 0.8V
3-input EXCLUSIVE-OR gate. The 74LVC1G386 provides a 3-input EXCLUSIVE-OR function.
Rev. 02 3 September 2007 Product data sheet 1. General description The provides a 3-input EXCLUSIVE-OR function. The input can be driven from either 3.3 or 5 V devices. This feature allows the use of these
Fairchild Solutions for 133MHz Buffered Memory Modules
AN-5009 Fairchild Semiconductor Application Note April 1999 Revised December 2000 Fairchild Solutions for 133MHz Buffered Memory Modules Fairchild Semiconductor provides several products that are compatible
HCF4010B HEX BUFFER/CONVERTER (NON INVERTING)
HEX BUFFER/CONVERTER (NON INVERTING) PROPAGATION DELAY TIME: t PD = 50ns (Typ.) at V DD = 10V C L = 50pF HIGH TO LOW LEVEL LOGIC CONVERSION MULTIPLEXER: 1 TO 6 OR 6 TO 1 HIGH "SINK" AND "SOURCE" CURRENT
MC14008B. 4-Bit Full Adder
4-Bit Full Adder The MC4008B 4bit full adder is constructed with MOS PChannel and NChannel enhancement mode devices in a single monolithic structure. This device consists of four full adders with fast
SEMICONDUCTOR TECHNICAL DATA
SEMICONDUCTOR TECHNICAL DATA The B Series logic gates are constructed with P and N channel enhancement mode devices in a single monolithic structure (Complementary MOS). Their primary use is where low
. HIGH SPEED .LOW POWER DISSIPATION .COMPATIBLE WITH TTL OUTPUTS M54HCT27 M74HCT27 TRIPLE 3-INPUT NOR GATE. tpd = 9 ns (TYP.
M54HCT27 M74HCT27 TRIPLE 3-INPUT NOR GATE. HIGH SPEED tpd = 9 ns (TYP.) AT VCC =5V.LOW POWER DISSIPATION I CC =1µA (MAX.) AT T A =25 C.COMPATIBLE WITH TTL OUTPUTS VIH = 2V (MIN.) VIL = 0.8V (MAX) OUTPUT
LM78XX Series Voltage Regulators
LM78XX Series Voltage Regulators General Description Connection Diagrams The LM78XX series of three terminal regulators is available with several fixed output voltages making them useful in a wide range
54LS113 Dual JK Edge-Triggered Flip-Flop
54LS113 Dual JK Edge-Triggered Flip-Flop General Description The 54LS113 offers individual J K Set and Clock inputs When the clock goes HIGH the inputs are enabled and data may be entered The logic level
Features INSTRUCTION DECODER CONTROL LOGIC AND CLOCK GENERATORS COMPARATOR AND WRITE ENABLE EEPROM ARRAY READ/WRITE AMPS 16
July 2000 FM9346 (MICROWIRE Bus Interface) 1024- Serial EEPROM General Description FM9346 is a 1024-bit CMOS non-volatile EEPROM organized as 64 x 16-bit array. This device features MICROWIRE interface
PS323. Precision, Single-Supply SPST Analog Switch. Features. Description. Block Diagram, Pin Configuration, and Truth Table. Applications PS323 PS323
Features ÎÎLow On-Resistance (33-ohm typ.) Minimizes Distortion and Error Voltages ÎÎLow Glitching Reduces Step Errors in Sample-and-Holds. Charge Injection, 2pC typ. ÎÎSingle-Supply Operation (+2.5V to
FSAL200 Wide Bandwidth Quad 2:1 Analog Multiplexer / De-multiplexer Switch
FSAL200 Wide Bandwidth Quad 2:1 Analog Multiplexer / De-multiplexer Switch Features Typical 6Ω Switch Connection Between Two Ports Minimal Propagation Delay Through the Switch Low I CC Zero Bounce in Flow-Through
. HIGH SPEED .COMPATIBLE WITH TTL OUTPUTS . LOW POWER DISSIPATION .OUTPUT DRIVE CAPABILITY M74HCT651 M74HCT652
M74HCT651 M74HCT652 HCT651 OCTAL BUS TRANSCEIVER/REGISTER (3-STATE, INV.) HCT652 OCTAL BUS TRANSCEIVER/REGISTER (3-STATE). HIGH SPEED fmax = 60 MHz (TYP.) AT VCC =5V.COMPATIBLE WITH TTL OUTPUTS V IH =
INTEGRATED CIRCUITS. For a complete data sheet, please also download:
INTEGRATED CIRCUITS DATA SEET For a complete data sheet, please also download: The IC6 74C/CT/CU/CMOS Logic Family Specifications The IC6 74C/CT/CU/CMOS Logic Package Information The IC6 74C/CT/CU/CMOS
54LS245 DM54LS245 DM74LS245 TRI-STATE Octal Bus Transceiver
54LS245 DM54LS245 DM74LS245 TRI-STATE Octal Bus Transceiver General Description These octal bus transceivers are designed for asynchronous two-way communication between data buses The control function
LM723/LM723C Voltage Regulator
LM723/LM723C Voltage Regulator General Description The LM723/LM723C is a voltage regulator designed primarily for series regulator applications. By itself, it will supply output currents up to 150 ma;
LOW POWER SCHOTTKY. http://onsemi.com GUARANTEED OPERATING RANGES ORDERING INFORMATION
The TTL/MSI SN74LS151 is a high speed 8-input Digital Multiplexer. It provides, in one package, the ability to select one bit of data from up to eight sources. The LS151 can be used as a universal function
MC74VHC138/D. 3-to-8 Line Decoder
MCHC8 -to-8 Line Decoder The MCHC8 is an advanced high speed CMOS to 8 decoder fabricated with silicon gate CMOS technology. It achieves high speed operation similar to equivalent Bipolar Schottky TTL
INTEGRATED CIRCUITS. 74F153 Dual 4-line to 1-line multiplexer. Product specification 1996 Jan 05 IC15 Data Handbook
INTEGRATED CIRCUITS 1996 Jan 05 IC15 Data Handbook FEATURES Non-inverting outputs Separate enable for each section Common select inputs See 74F253 for 3-State version PIN CONFIGURATION Ea 1 S1 2 I3a 3
DC Noise Immunity of CMOS Logic Gates
DC Noise Immunity of CMOS Logic Gates Introduction The immunity of a CMOS logic gate to noise signals is a function of many variables, such as individual chip differences, fan-in and fan-out, stray inductance
MM74HC74A Dual D-Type Flip-Flop with Preset and Clear
MM74HC74A Dual D-Type Flip-Flop with Preset and Clear Features Typical propagation delay: 20ns Wide power supply range: 2V 6V Low quiescent current: 40µA maximum (74HC Series) Low input current: 1µA maximum
LM139/LM239/LM339/LM2901/LM3302 Low Power Low Offset Voltage Quad Comparators
Low Power Low Offset Voltage Quad Comparators General Description The LM139 series consists of four independent precision voltage comparators with an offset voltage specification as low as 2 mv max for
Features. Applications
LM555 Timer General Description The LM555 is a highly stable device for generating accurate time delays or oscillation. Additional terminals are provided for triggering or resetting if desired. In the
www.jameco.com 1-800-831-4242
Distributed by: www.jameco.com 1-800-831-4242 The content and copyrights of the attached material are the property of its owner. LF411 Low Offset, Low Drift JFET Input Operational Amplifier General Description
74F1071 18-Bit Undershoot Overshoot Clamp and ESD Protection Device
74F1071 18-Bit Undershoot Overshoot Clamp and ESD Protection Device General Description The F1071 is an 18-bit undershoot overshoot clamp which is designed to limit bus voltages and also to protect more