Digital Circuits Laboratory LAB no. 2. LOGIC GATES

Transcription

1 Digital Circuits Labat. Introduction LOGIC GATES Combinational logic sstems, no matter how complicated the are, the are realized with logic gates. An elementar logic gate implements a two variables unction. Thus, the elementar unctions are AND, OR, NOT, NAND, NOR and XOR. In practice the logic gates can be ound as integrated circuits. On such circuit,, 2, 3, 4 6 gates are availbale accding to the number o inputs... AND gate The unction AND has the ollowing intendment: - i at least one input is logic, then the output is logic. - i both inputs are logic, then the output is logic. AND gate smbol: Truth table: Logic ecuation:.3. NOT gate The unction NOT has the ollowing intendment: = =.2. OR gate The unction OR has the ollowing intendment: - the output is true (logic ) i at least one input is true (logic ). - the output is alse (logic ) i both inputs are alse ( logic). OR gate smbol: Truth table: Logic ecuation: =+ =

2 Digital Circuits Labat - the output is true (logic ) i the input is alse (logic ) - the output is alse (logic ) i the input is true (logic ). NOT gate smbol: Truth table: Logic ecuation: =.4. NAND gate The unction NAND has the ollowing interpretation: - the output is alse (logic ) i both inputs are true (logic ) - the output is true (logic ) i at least one input is alse (logic ). NAND gate smbol: Truth table: Logic ecuation: = =.5. NOR gate The unction OR has the ollowing intendment: - the output is alse (logic ) i at least one input is true (logic ). - the output is true (logic ) i both inputs are alse ( logic). NOR gate smbol: Truth table: Logic ecuation: =+ =.6. XOR gate (eclussive OR) The unction XOR has the ollowing intendment: - the output is alse (logic ) i both inputs are in the same logic state - the output is true i the inputs are in opposite logic states. 2

3 Digital Circuits Labat The XOR gate signals the coincidence o the inputs when its output is alse. It realizes the modulo 2 sum. XOR gate smbol: Truth table: Logic ecuation: 2. Implementation o elementar logic unctions using other logic unctions An o the above elementar logic unctions can be realized using other elementar unctions. This is useul when implementing a schematic with integrated circuits (IC) in der to minimize the number o ICs used capsules. Thus, ou can use ree gates available on eisting ICs capsules. F eample, i ou need an inverter (NOT) it is not economic to introduce an IC containing 6 inverters. It can simpl be replaced b a gate "NAND" "NOR" with the inputs tied together. Finall, ou will get a price reduction our circuit. 2.. Implementing the unction NOT a) using NAND NOR gates = = = ( ) = (+ ) = = b) using XOR gate = = + = V CC = 2.2. Implementing the unction AND a) = b) = = (+ ) 3

4 Digital Circuits Labat = = = = 2.3. Implementing the unction OR = + = + = ( + ) = + = + = + = ( ) = Implementing the unction NOR = + = = + 4

5 Digital Circuits Labat 2.5. Implementing the unction NAND = = + = 2.6. Implementing the unction XOR = = + = 3. Lab wks Complete the ollowing sheet accding to the indications. 5

6 Digital Circuits Labat LAB SHEET Veri the operation o the elementar logic gates (AND, OR, NOT, NAND, NOR, XOR) using MaPlusII. Setup in the sc ile the input signals as shown below and draw the output as obtained rom simulation. Etract each o the gates the truth table rom the simulation wavems and measure the dela time between the inputs and the output. Compare the etracted truth tables with the tables given above. AND: t dela = NOT: t dela = OR: t dela = NAND: t dela = NOR: t dela = XOR: t dela = 6